Catena cyber 9217582b9f Fixes shift for ARM memory operand (#1162) ...

Shift is for same operand as index register

2018-06-06 06:09:53 +08:00

..

ARMAddressingModes.h

Fix undefined shifts (#1156)

2018-06-02 16:51:40 +08:00

ARMBaseInfo.h

Constify backend data (#1040)

2017-10-22 08:45:40 +08:00

ARMDisassembler.c

Fix undefined shifts (#1156)

2018-06-02 16:51:40 +08:00

ARMDisassembler.h

arm: add new mode CS_MODE_MCLASS for Cortex-M series. updated Python & Java bindings accordingly

2014-08-13 23:08:40 +08:00

ARMGenAsmWriter.inc

Constify backend data (#1040)

2017-10-22 08:45:40 +08:00

ARMGenDisassemblerTables.inc

Constify backend data (#1040)

2017-10-22 08:45:40 +08:00

ARMGenInstrInfo.inc

Constify backend data (#1040)

2017-10-22 08:45:40 +08:00

ARMGenRegisterInfo.inc

Constify backend data (#1040)

2017-10-22 08:45:40 +08:00

ARMGenSubtargetInfo.inc

arm: update core. this added a new instruction UDF. also updated Python+Java bindings accordingly

2014-08-13 22:38:15 +08:00

ARMInstPrinter.c

Fixes shift for ARM memory operand (#1162)

2018-06-06 06:09:53 +08:00

ARMInstPrinter.h

arm: update core with a lot more details provided in detail mode now. update Python & Java bindings to reflect the core's changes

2014-09-01 23:27:24 +08:00

ARMMapping.c

Constify backend data (#1040)

2017-10-22 08:45:40 +08:00

ARMMapping.h

arm: update core with a lot more details provided in detail mode now. update Python & Java bindings to reflect the core's changes

2014-09-01 23:27:24 +08:00

ARMModule.c

prefix cs_ to global variables to avoid link problems (#1102)

2018-03-19 22:23:09 +08:00