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capstone/suite/synctools
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Wu ChenXu ba3effd320 Merge pull request #1925 from FinnWilkinson/next 
Fixed SME index alias printing issue.
2022-10-24 19:10:17 +08:00
..
strinforeduce add suite/synctools 2019-05-07 12:26:19 +08:00
tablegen Merge pull request #1907 from FinnWilkinson/AArch64-Armv9.2-update 2022-10-06 17:27:20 +08:00
.gitignore Updated suite/synctools/.gitignore to ignore generated insn_list.txt file. 2022-09-30 15:27:36 +01:00
arm64_gen_vreg.c add suite/synctools 2019-05-07 12:26:19 +08:00
asmwriter.py Merge pull request #1925 from FinnWilkinson/next 2022-10-24 19:10:17 +08:00
compare_mapping_insn.py add suite/synctools 2019-05-07 12:26:19 +08:00
disassemblertables2.c add suite/synctools 2019-05-07 12:26:19 +08:00
disassemblertables_reduce.py add suite/synctools 2019-05-07 12:26:19 +08:00
disassemblertables-arch.py Updated synctool scripts to extract new functions and match type/formatting changes in LLVM 14.0.5 tablegen files. 2022-09-30 15:34:50 +01:00
disassemblertables.py add suite/synctools 2019-05-07 12:26:19 +08:00
genall-arch.sh Changed AArch64 filegen order to resepct inter-file dependancies. 2022-09-30 15:25:36 +01:00
genall-full.sh synctools: udpate somes scripts 2019-05-10 16:51:23 +08:00
genall-reduce.sh add suite/synctools 2019-05-07 12:26:19 +08:00
insn3.py add suite/synctools 2019-05-07 12:26:19 +08:00
insn_check.py add suite/synctools 2019-05-07 12:26:19 +08:00
insn.py add suite/synctools 2019-05-07 12:26:19 +08:00
instrinfo-arch.py Constify backends (#1549) 2019-12-23 20:30:57 +08:00
instrinfo.py add suite/synctools 2019-05-07 12:26:19 +08:00
Makefile synctools: udpate somes scripts 2019-05-10 16:51:23 +08:00
mapping_insn_name-arch.py add suite/synctools 2019-05-07 12:26:19 +08:00
mapping_insn_name.py add suite/synctools 2019-05-07 12:26:19 +08:00
mapping_insn_op-arch.py add suite/synctools 2019-05-07 12:26:19 +08:00
mapping_insn_op.py add suite/synctools 2019-05-07 12:26:19 +08:00
mapping_insn-arch.py Updated synctool scripts to extract new functions and match type/formatting changes in LLVM 14.0.5 tablegen files. 2022-09-30 15:34:50 +01:00
mapping_insn.py add suite/synctools 2019-05-07 12:26:19 +08:00
mapping_reg.py add suite/synctools 2019-05-07 12:26:19 +08:00
README add suite/synctools 2019-05-07 12:26:19 +08:00
register.py add suite/synctools 2019-05-07 12:26:19 +08:00
registerinfo.py Updated synctool scripts to extract new functions and match type/formatting changes in LLVM 14.0.5 tablegen files. 2022-09-30 15:34:50 +01:00
subtargetinfo.py add suite/synctools 2019-05-07 12:26:19 +08:00
systemoperand.py Updated synctool scripts to extract new functions and match type/formatting changes in LLVM 14.0.5 tablegen files. 2022-09-30 15:34:50 +01:00
systemregister.py Constify backends (#1549) 2019-12-23 20:30:57 +08:00
X86DisassemblerDecoderCommon.h add suite/synctools 2019-05-07 12:26:19 +08:00

README 

Sync tools to port LLVM inc files to Capstone.

For X86
=======
0. cd tablegen/, then follow its README.

1. Run genall-{full|reduce}.sh, then copy generated .inc files to arch/<ARCH>/ directory

    $ ./genall-full.sh tablegen ~/projects/tmp/capstone777.git/arch/X86
    $ ./genall-reduce.sh tablegen ~/projects/tmp/capstone777.git/arch/X86

2. Run disassemblertables_reduce2 & disassemblertables_reduce2 to generate optimized (index table) X86GenDisassemblerTables2.inc & X86GenDisassemblerTables_reduce2.inc

    # use 2x name to avoid overwritting X86GenDisassemblerTables2.inc & X86GenDisassemblerTables_reduce2.inc

    $ make
    $ ./disassemblertables2 > X86GenDisassemblerTables2x.inc
    $ ./disassemblertables_reduce2 > X86GenDisassemblerTables_reduce2x.inc

3. cd strinforeduce/, and follow its README.

4. Copy all generated .inc files to arch/X86/

    $ cp X86GenAsmWriter_reduce.inc ~/projects/capstone.git/arch/X86
    $ cp X86GenAsmWriter1_reduce.inc ~/projects/capstone.git/arch/X86
    $ cp X86MappingInsnName_reduce.inc ~/projects/capstone.git/arch/X86
    $ cp X86MappingInsn_reduce.inc ~/projects/capstone.git/arch/X86
    $ cp X86MappingInsnOp_reduce.inc ~/projects/capstone.git/arch/X86
    $ cp X86GenInstrInfo_reduce.inc ~/projects/capstone.git/arch/X86
    $ cp X86GenDisassemblerTables_reduce.inc ~/projects/capstone.git/arch/X86
    $ cp X86GenDisassemblerTables_reduce2x.inc ~/projects/capstone.git/arch/X86/X86GenDisassemblerTables_reduce2.inc

    $ cp X86GenAsmWriter.inc ~/projects/capstone.git/arch/X86
    $ cp X86GenAsmWriter1.inc ~/projects/capstone.git/arch/X86
    $ cp X86MappingInsnName.inc ~/projects/capstone.git/arch/X86
    $ cp X86MappingInsn.inc ~/projects/capstone.git/arch/X86
    $ cp X86MappingInsnOp.inc ~/projects/capstone.git/arch/X86
    $ cp X86GenInstrInfo.inc ~/projects/capstone.git/arch/X86
    $ cp X86GenDisassemblerTables.inc ~/projects/capstone.git/arch/X86
    $ cp X86GenDisassemblerTables2x.inc ~/projects/capstone.git/arch/X86/X86GenDisassemblerTables2.inc

5. copy insn_list.txt to include/capstone/<arch.h>

For non-X86
===========

0. cd tablegen/, then follow its README.

	1. Run gen-tablegen-arch.sh

2. Run genall-arch.sh

   ./genall-arch.sh tablegen ~/projects/capstone.git/arch/ARM ARM
   ./genall-arch.sh tablegen ~/projects/capstone.git/arch/ARM AArch64
   ./genall-arch.sh tablegen ~/projects/capstone.git/arch/ARM PowerPC

3. Copy generated *.inc files to arch/<arch>/