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3a2cd3c331
* Fix CID 508418 - Uninitialized struct * Fix CID 509089 - Fix OOB read and write * Fix CID 509088 - OOB. Also adds tests and to ensure no OOB access. * Fix CID 509085 - Resource leak. * Fix CID 508414 and companions - Using undefined values. * Fix CID 508405 - Use of uninitialized value * Remove unnecessary and badly implemented dev fuzz code. * Fix CID 508396 - Uninitialzied variable. * Fix CID 508393, 508365 -- OOB read. * Fix CID 432207 - OVerlapping memory access. * Remove unused functions * Fix CID 432170 - Overlapping memory access. * Fix CID 166022 - Check for negative index * Let strncat not depend n src operand. * Fix 509083 and 509084 - NULL dereference * Remove duplicated code. * Initialize sysop * Fix resource leak * Remove unreachable code. * Remove duplicate code. * Add assert to check return value of cmoack * Fixed: d should be a signed value, since it is checked against < 0 * Add missing break. * Add NULL check * Fix signs of binary search comparisons. * Add explicit cast of or result * Fix correct scope of case. * Handle invalid integer type. * Return UINT_MAX instead of implicitly casted -1 * Remove dead code * Fix type of im * Fix type of d * Remove duplicated code. * Add returns after CS_ASSERTS * Check for len == 0 case. * Ensure shift operates on uint64 * Replace strcpy with strncpy. * Handle edge cases for 32bit rotate * Fix some out of enum warnings * Replace a strcpy with strncpy. * Fix increment of address * Skip some linting * Fix: set instruction id * Remove unused enum * Replace the last usages of strcpy with SStream functions. * Increase number of allowed AArch64 operands. * Check safety of incrementing t the next operand. * Fix naming of operand * Update python constants * Fix option setup of CS_OPT_DETAIL_REAL * Document DETAIL_REAL has to be used with CS_OPT_ON. * Run Coverity scan every Monday. * Remove dead code * Fix OOB read * Rename macro to reflect it is only used with sstreams * Fix rebase issues
97 lines
3.0 KiB
C
97 lines
3.0 KiB
C
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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#ifndef CS_X86_MAP_H
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#define CS_X86_MAP_H
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#include "capstone/capstone.h"
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#include "../../cs_priv.h"
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// map instruction to its characteristics
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typedef struct insn_map_x86 {
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unsigned short id;
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unsigned short mapid;
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unsigned char is64bit;
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#ifndef CAPSTONE_DIET
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uint16_t regs_use[12]; // list of implicit registers used by this instruction
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uint16_t regs_mod[20]; // list of implicit registers modified by this instruction
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unsigned char groups[8]; // list of group this instruction belong to
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bool branch; // branch instruction?
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bool indirect_branch; // indirect branch instruction?
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#endif
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} insn_map_x86;
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extern const insn_map_x86 insns[];
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// map sib_base to x86_reg
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x86_reg x86_map_sib_base(int r);
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// map sib_index to x86_reg
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x86_reg x86_map_sib_index(int r);
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// map seg_override to x86_reg
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x86_reg x86_map_segment(int r);
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// return name of register in friendly string
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const char *X86_reg_name(csh handle, unsigned int reg);
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// given internal insn id, return public instruction info
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void X86_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id);
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// return insn name, given insn id
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const char *X86_insn_name(csh handle, unsigned int id);
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// return group name, given group id
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const char *X86_group_name(csh handle, unsigned int id);
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// return register of given instruction id
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// return 0 if not found
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// this is to handle instructions embedding accumulate registers into AsmStrs[]
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x86_reg X86_insn_reg_intel(unsigned int id, enum cs_ac_type *access);
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x86_reg X86_insn_reg_att(unsigned int id, enum cs_ac_type *access);
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bool X86_insn_reg_intel2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2);
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bool X86_insn_reg_att2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2);
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extern const uint64_t arch_masks[9];
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// handle LOCK/REP/REPNE prefixes
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// return True if we patch mnemonic, like in MULPD case
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bool X86_lockrep(MCInst *MI, SStream *O);
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// map registers to sizes
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extern const uint8_t regsize_map_32[];
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extern const uint8_t regsize_map_64[];
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void op_addReg(MCInst *MI, int reg);
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void op_addImm(MCInst *MI, int v);
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void op_addAvxBroadcast(MCInst *MI, x86_avx_bcast v);
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void op_addXopCC(MCInst *MI, int v);
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void op_addSseCC(MCInst *MI, int v);
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void op_addAvxCC(MCInst *MI, int v);
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void op_addAvxZeroOpmask(MCInst *MI);
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void op_addAvxSae(MCInst *MI);
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void op_addAvxRoundingMode(MCInst *MI, int v);
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// given internal insn id, return operand access info
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const uint8_t *X86_get_op_access(cs_struct *h, unsigned int id, uint64_t *eflags);
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void X86_reg_access(const cs_insn *insn,
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cs_regs regs_read, uint8_t *regs_read_count,
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cs_regs regs_write, uint8_t *regs_write_count);
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// given the instruction id, return the size of its immediate operand (or 0)
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uint8_t X86_immediate_size(unsigned int id, uint8_t *enc_size);
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unsigned short X86_register_map(unsigned short id);
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unsigned int find_insn(unsigned int id);
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void X86_postprinter(csh handle, cs_insn *insn, SStream *mnem, MCInst *mci);
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#endif
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