mirror of
https://github.com/capstone-engine/capstone.git
synced 2024-12-02 10:36:38 +00:00
e8d1f1d4d2
* Added new M680X target. Supports M6800/1/2/3/9, HD6301 * M680X: Reformat for coding guide lines. Set alphabetical order in HACK.TXT * M680X: Prepare for python binding. Move cs_m680x, m680x_insn to m680x_info. Chec > k cpu type, no default. * M680X: Add python bindings. Added python tests. * M680X: Added cpu types to usage message. * cstool: Avoid segfault for invalid <arch+mode>. * Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). Keep xprint.py untouched. * M680X: Update CMake/make for m680x support. Update .gitignore. * M680X: Reduce compiler warnings. * M680X: Reduce compiler warnings. * M680X: Reduce compiler warnings. * M680X: Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). * M680X: Add ocaml bindings and tests. * M680X: Add java bindings and tests. * M680X: Added tests for all indexed addressing modes. C/Python/Ocaml * M680X: Naming, use page1 for PAGE1 instructions (without prefix). * M680X: Naming, use page1 for PAGE1 instructions (without prefix). * M680X: Used M680X_FIRST_OP_IN_MNEM in tests C/python/java/ocaml. * M680X: Added access property to cs_m680x_op. * M680X: Added operand size. * M680X: Remove compiler warnings. * M680X: Added READ/WRITE access property per operator. * M680X: Make reg_inherent_hdlr independent of CPU type. * M680X: Add HD6309 support + bug fixes * M680X: Remove errors and warning. * M680X: Add Bcc/LBcc to group BRAREL (relative branch). * M680X: Add group JUMP to BVS/BVC/LBVS/LBVC. Remove BRAREL from BRN/LBRN. * M680X: Remove LBRN from group BRAREL. * M680X: Refactored cpu_type initialization for better readability. * M680X: Add two operands for insn having two reg. in mnemonic. e.g. ABX. * M680X: Remove typo in cstool.c * M680X: Some format improvements in changed_regs. * M680X: Remove insn id string list from tests (C/python/java/ocaml). * M680X: SEXW, set access of reg. D to WRITE. * M680X: Sort changed_regs in increasing m680x_insn order. * M680X: Add M68HC11 support + Reduced from two to one INDEXED operand. * M680X: cstool, also write '(in mnemonic)' for second reg. operand. * M680X: Add BRN/LBRN to group JUMP and BRAREL. * M680X: For Bcc/LBcc/BRSET/BRCLR set reg. CC to read access. * M680X: Correctly print negative immediate values with option CS_OPT_UNSIGNED. * M680X: Rename some instruction handlers. * M680X: Add M68HC05 support. * M680X: Dont print prefix '<' for direct addr. mode. * M680X: Add M68HC08 support + resorted tables + bug fixes. * M680X: Add Freescale HCS08 support. * M680X: Changed group names, avoid spaces. * M680X: Refactoring, rename addessing mode handlers. * M680X: indexed addr. mode, changed pre/post inc-/decrement representation. * M680X: Rename some M6809/HD6309 specific functions. * M680X: Add CPU12 (68HC12/HCS12) support. * M680X: Correctly display illegal instruction as FCB . * M680X: bugfix: BRA/BRN/BSR/LBRA/LBRN/LBSR does not read CC reg. * M680X: bugfix: Correctly check for sufficient code size for M6809 indexed addressing. * M680X: Better support for changing insn id within handler for addessing mode. * M680X: Remove warnings. * M680X: In set_changed_regs_read_write_counts use own access_mode. * M680X: Split cpu specific tables into separate *.inc files. * M680X: Remove warnings. * M680X: Removed address_mode. Addressing mode is available in operand.type * M680X: Bugfix: BSET/BCLR/BRSET/BRCLR correct read/modify CC reg. * M680X: Remove register TMP1. It is first visible in CPU12X. * M680X: Performance improvement + bug fixes. * M680X: Performance improvement, make cpu_tables const static. * M680X: Simplify operand decoding by using two handlers. * M680X: Replace M680X_OP_INDEX by M680X_OP_CONSTANT + bugfix in java/python/ocaml bindings. * M680X: Format with astyle. * M680X: Update documentation. * M680X: Corrected author for m680x specific files. * M680X: Make max. number of architectures single source.
61 lines
2.5 KiB
C
61 lines
2.5 KiB
C
|
|
// Additional instructions only supported on HCS08
|
|
static const inst_pageX g_hcs08_inst_overlay_table[] = {
|
|
{ 0x32, M680X_INS_LDHX, ext_hid, inh_hid },
|
|
{ 0x3e, M680X_INS_CPHX, ext_hid, inh_hid },
|
|
{ 0x82, M680X_INS_BGND, inh_hid, inh_hid },
|
|
{ 0x96, M680X_INS_STHX, ext_hid, inh_hid },
|
|
};
|
|
|
|
// HCS08 PAGE2 instructions (prefix 0x9E)
|
|
static const inst_pageX g_hcs08_inst_page2_table[] = {
|
|
{ 0x60, M680X_INS_NEG, idxS_hid, inh_hid },
|
|
{ 0x61, M680X_INS_CBEQ, idxS_hid,rel8_hid },
|
|
{ 0x63, M680X_INS_COM, idxS_hid, inh_hid },
|
|
{ 0x64, M680X_INS_LSR, idxS_hid, inh_hid },
|
|
{ 0x66, M680X_INS_ROR, idxS_hid, inh_hid },
|
|
{ 0x67, M680X_INS_ASR, idxS_hid, inh_hid },
|
|
{ 0x68, M680X_INS_LSL, idxS_hid, inh_hid },
|
|
{ 0x69, M680X_INS_ROL, idxS_hid, inh_hid },
|
|
{ 0x6a, M680X_INS_DEC, idxS_hid, inh_hid },
|
|
{ 0x6b, M680X_INS_DBNZ, idxS_hid,rel8_hid },
|
|
{ 0x6c, M680X_INS_INC, idxS_hid, inh_hid },
|
|
{ 0x6d, M680X_INS_TST, idxS_hid, inh_hid },
|
|
{ 0x6f, M680X_INS_CLR, idxS_hid, inh_hid },
|
|
{ 0xae, M680X_INS_LDHX, idxX0_hid, inh_hid },
|
|
{ 0xbe, M680X_INS_LDHX, idxX16_hid, inh_hid },
|
|
{ 0xce, M680X_INS_LDHX, idxX_hid, inh_hid },
|
|
{ 0xd0, M680X_INS_SUB, idxS16_hid, inh_hid },
|
|
{ 0xd1, M680X_INS_CMP, idxS16_hid, inh_hid },
|
|
{ 0xd2, M680X_INS_SBC, idxS16_hid, inh_hid },
|
|
{ 0xd3, M680X_INS_CPX, idxS16_hid, inh_hid },
|
|
{ 0xd4, M680X_INS_AND, idxS16_hid, inh_hid },
|
|
{ 0xd5, M680X_INS_BIT, idxS16_hid, inh_hid },
|
|
{ 0xd6, M680X_INS_LDA, idxS16_hid, inh_hid },
|
|
{ 0xd7, M680X_INS_STA, idxS16_hid, inh_hid },
|
|
{ 0xd8, M680X_INS_EOR, idxS16_hid, inh_hid },
|
|
{ 0xd9, M680X_INS_ADC, idxS16_hid, inh_hid },
|
|
{ 0xda, M680X_INS_ORA, idxS16_hid, inh_hid },
|
|
{ 0xdb, M680X_INS_ADD, idxS16_hid, inh_hid },
|
|
{ 0xde, M680X_INS_LDX, idxS16_hid, inh_hid },
|
|
{ 0xdf, M680X_INS_STX, idxS16_hid, inh_hid },
|
|
{ 0xe0, M680X_INS_SUB, idxS_hid, inh_hid },
|
|
{ 0xe1, M680X_INS_CMP, idxS_hid, inh_hid },
|
|
{ 0xe2, M680X_INS_SBC, idxS_hid, inh_hid },
|
|
{ 0xe3, M680X_INS_CPX, idxS_hid, inh_hid },
|
|
{ 0xe4, M680X_INS_AND, idxS_hid, inh_hid },
|
|
{ 0xe5, M680X_INS_BIT, idxS_hid, inh_hid },
|
|
{ 0xe6, M680X_INS_LDA, idxS_hid, inh_hid },
|
|
{ 0xe7, M680X_INS_STA, idxS_hid, inh_hid },
|
|
{ 0xe8, M680X_INS_EOR, idxS_hid, inh_hid },
|
|
{ 0xe9, M680X_INS_ADC, idxS_hid, inh_hid },
|
|
{ 0xea, M680X_INS_ORA, idxS_hid, inh_hid },
|
|
{ 0xeb, M680X_INS_ADD, idxS_hid, inh_hid },
|
|
{ 0xee, M680X_INS_LDX, idxS_hid, inh_hid },
|
|
{ 0xef, M680X_INS_STX, idxS_hid, inh_hid },
|
|
{ 0xf3, M680X_INS_CPHX, idxS_hid, inh_hid },
|
|
{ 0xfe, M680X_INS_LDHX, idxS_hid, inh_hid },
|
|
{ 0xff, M680X_INS_STHX, idxS_hid, inh_hid },
|
|
};
|
|
|