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capstone/arch/M680X/m6805.inc
Wolfgang Schwotzer e8d1f1d4d2 M680X: Target ready for pull request (#1034) 
* Added new M680X target. Supports M6800/1/2/3/9, HD6301

* M680X: Reformat for coding guide lines. Set alphabetical order in HACK.TXT

* M680X: Prepare for python binding. Move cs_m680x, m680x_insn to m680x_info. Chec
> k cpu type, no default.

* M680X: Add python bindings. Added python tests.

* M680X: Added cpu types to usage message.

* cstool: Avoid segfault for invalid <arch+mode>.

* Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). Keep xprint.py untouched.

* M680X: Update CMake/make for m680x support. Update .gitignore.

* M680X: Reduce compiler warnings.

* M680X: Reduce compiler warnings.

* M680X: Reduce compiler warnings.

* M680X: Make test_m680x.c/test_m680x.py output comparable (diff params: -bu).

* M680X: Add ocaml bindings and tests.

* M680X: Add java bindings and tests.

* M680X: Added tests for all indexed addressing modes. C/Python/Ocaml

* M680X: Naming, use page1 for PAGE1 instructions (without prefix).

* M680X: Naming, use page1 for PAGE1 instructions (without prefix).

* M680X: Used M680X_FIRST_OP_IN_MNEM in tests C/python/java/ocaml.

* M680X: Added access property to cs_m680x_op.

* M680X: Added operand size.

* M680X: Remove compiler warnings.

* M680X: Added READ/WRITE access property per operator.

* M680X: Make reg_inherent_hdlr independent of CPU type.

* M680X: Add HD6309 support + bug fixes

* M680X: Remove errors and warning.

* M680X: Add Bcc/LBcc to group BRAREL (relative branch).

* M680X: Add group JUMP to BVS/BVC/LBVS/LBVC. Remove BRAREL from BRN/LBRN.

* M680X: Remove LBRN from group BRAREL.

* M680X: Refactored cpu_type initialization for better readability.

* M680X: Add two operands for insn having two reg. in mnemonic. e.g. ABX.

* M680X: Remove typo in cstool.c

* M680X: Some format improvements in changed_regs.

* M680X: Remove insn id string list from tests (C/python/java/ocaml).

* M680X: SEXW, set access of reg. D to WRITE.

* M680X: Sort changed_regs in increasing m680x_insn order.

* M680X: Add M68HC11 support + Reduced from two to one INDEXED operand.

* M680X: cstool, also write '(in mnemonic)' for second reg. operand.

* M680X: Add BRN/LBRN to group JUMP and BRAREL.

* M680X: For Bcc/LBcc/BRSET/BRCLR set reg. CC to read access.

* M680X: Correctly print negative immediate values with option CS_OPT_UNSIGNED.

* M680X: Rename some instruction handlers.

* M680X: Add M68HC05 support.

* M680X: Dont print prefix '<' for direct addr. mode.

* M680X: Add M68HC08 support + resorted tables + bug fixes.

* M680X: Add Freescale HCS08 support.

* M680X: Changed group names, avoid spaces.

* M680X: Refactoring, rename addessing mode handlers.

* M680X: indexed addr. mode, changed pre/post inc-/decrement representation.

* M680X: Rename some M6809/HD6309 specific functions.

* M680X: Add CPU12 (68HC12/HCS12) support.

* M680X: Correctly display illegal instruction as FCB .

* M680X: bugfix: BRA/BRN/BSR/LBRA/LBRN/LBSR does not read CC reg.

* M680X: bugfix: Correctly check for sufficient code size for M6809 indexed addressing.

* M680X: Better support for changing insn id within handler for addessing mode.

* M680X: Remove warnings.

* M680X: In set_changed_regs_read_write_counts use own access_mode.

* M680X: Split cpu specific tables into separate *.inc files.

* M680X: Remove warnings.

* M680X: Removed address_mode. Addressing mode is available in operand.type

* M680X: Bugfix: BSET/BCLR/BRSET/BRCLR correct read/modify CC reg.

* M680X: Remove register TMP1. It is first visible in CPU12X.

* M680X: Performance improvement + bug fixes.

* M680X: Performance improvement, make cpu_tables const static.

* M680X: Simplify operand decoding by using two handlers.

* M680X: Replace M680X_OP_INDEX by M680X_OP_CONSTANT + bugfix in java/python/ocaml bindings.

* M680X: Format with astyle.

* M680X: Update documentation.

* M680X: Corrected author for m680x specific files.

* M680X: Make max. number of architectures single source.
2017-10-21 21:44:36 +08:00

278 lines
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// M68HC05 instructions
static const inst_page1 g_m6805_inst_page1_table[256] = {
// 0x0x, bit manipulation instructions
{ M680X_INS_BRSET, opidxdr_hid, inh_hid },
{ M680X_INS_BRCLR, opidxdr_hid, inh_hid },
{ M680X_INS_BRSET, opidxdr_hid, inh_hid },
{ M680X_INS_BRCLR, opidxdr_hid, inh_hid },
{ M680X_INS_BRSET, opidxdr_hid, inh_hid },
{ M680X_INS_BRCLR, opidxdr_hid, inh_hid },
{ M680X_INS_BRSET, opidxdr_hid, inh_hid },
{ M680X_INS_BRCLR, opidxdr_hid, inh_hid },
{ M680X_INS_BRSET, opidxdr_hid, inh_hid },
{ M680X_INS_BRCLR, opidxdr_hid, inh_hid },
{ M680X_INS_BRSET, opidxdr_hid, inh_hid },
{ M680X_INS_BRCLR, opidxdr_hid, inh_hid },
{ M680X_INS_BRSET, opidxdr_hid, inh_hid },
{ M680X_INS_BRCLR, opidxdr_hid, inh_hid },
{ M680X_INS_BRSET, opidxdr_hid, inh_hid },
{ M680X_INS_BRCLR, opidxdr_hid, inh_hid },
// 0x1x, bit set/clear instructions
{ M680X_INS_BCLR, opidx_hid, dir_hid },
{ M680X_INS_BSET, opidx_hid, dir_hid },
{ M680X_INS_BCLR, opidx_hid, dir_hid },
{ M680X_INS_BSET, opidx_hid, dir_hid },
{ M680X_INS_BCLR, opidx_hid, dir_hid },
{ M680X_INS_BSET, opidx_hid, dir_hid },
{ M680X_INS_BCLR, opidx_hid, dir_hid },
{ M680X_INS_BSET, opidx_hid, dir_hid },
{ M680X_INS_BCLR, opidx_hid, dir_hid },
{ M680X_INS_BSET, opidx_hid, dir_hid },
{ M680X_INS_BCLR, opidx_hid, dir_hid },
{ M680X_INS_BSET, opidx_hid, dir_hid },
{ M680X_INS_BCLR, opidx_hid, dir_hid },
{ M680X_INS_BSET, opidx_hid, dir_hid },
{ M680X_INS_BCLR, opidx_hid, dir_hid },
{ M680X_INS_BSET, opidx_hid, dir_hid },
// 0x2x, relative branch instructions
{ M680X_INS_BRA, rel8_hid, inh_hid },
{ M680X_INS_BRN, rel8_hid, inh_hid },
{ M680X_INS_BHI, rel8_hid, inh_hid },
{ M680X_INS_BLS, rel8_hid, inh_hid },
{ M680X_INS_BCC, rel8_hid, inh_hid },
{ M680X_INS_BCS, rel8_hid, inh_hid },
{ M680X_INS_BNE, rel8_hid, inh_hid },
{ M680X_INS_BEQ, rel8_hid, inh_hid },
{ M680X_INS_BHCC, rel8_hid, inh_hid },
{ M680X_INS_BHCS, rel8_hid, inh_hid },
{ M680X_INS_BPL, rel8_hid, inh_hid },
{ M680X_INS_BMI, rel8_hid, inh_hid },
{ M680X_INS_BMC, rel8_hid, inh_hid },
{ M680X_INS_BMS, rel8_hid, inh_hid },
{ M680X_INS_BIL, rel8_hid, inh_hid },
{ M680X_INS_BIH, rel8_hid, inh_hid },
// 0x3x, direct instructions
{ M680X_INS_NEG, dir_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_COM, dir_hid, inh_hid },
{ M680X_INS_LSR, dir_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ROR, dir_hid, inh_hid },
{ M680X_INS_ASR, dir_hid, inh_hid },
{ M680X_INS_LSL, dir_hid, inh_hid },
{ M680X_INS_ROL, dir_hid, inh_hid },
{ M680X_INS_DEC, dir_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_INC, dir_hid, inh_hid },
{ M680X_INS_TST, dir_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_CLR, dir_hid, inh_hid },
// 0x4x, inherent instructions
{ M680X_INS_NEGA, inh_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_MUL, inh_hid, inh_hid },
{ M680X_INS_COMA, inh_hid, inh_hid },
{ M680X_INS_LSRA, inh_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_RORA, inh_hid, inh_hid },
{ M680X_INS_ASRA, inh_hid, inh_hid },
{ M680X_INS_LSLA, inh_hid, inh_hid },
{ M680X_INS_ROLA, inh_hid, inh_hid },
{ M680X_INS_DECA, inh_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_INCA, inh_hid, inh_hid },
{ M680X_INS_TSTA, inh_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_CLRA, inh_hid, inh_hid },
// 0x5x, inherent instructions
{ M680X_INS_NEGX, inh_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_COMX, inh_hid, inh_hid },
{ M680X_INS_LSRX, inh_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_RORX, inh_hid, inh_hid },
{ M680X_INS_ASRX, inh_hid, inh_hid },
{ M680X_INS_LSLX, inh_hid, inh_hid },
{ M680X_INS_ROLX, inh_hid, inh_hid },
{ M680X_INS_DECX, inh_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_INCX, inh_hid, inh_hid },
{ M680X_INS_TSTX, inh_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_CLRX, inh_hid, inh_hid },
// 0x6x, indexed, 1 byte offset instructions
{ M680X_INS_NEG, idxX_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_COM, idxX_hid, inh_hid },
{ M680X_INS_LSR, idxX_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ROR, idxX_hid, inh_hid },
{ M680X_INS_ASR, idxX_hid, inh_hid },
{ M680X_INS_LSL, idxX_hid, inh_hid },
{ M680X_INS_ROL, idxX_hid, inh_hid },
{ M680X_INS_DEC, idxX_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_INC, idxX_hid, inh_hid },
{ M680X_INS_TST, idxX_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_CLR, idxX_hid, inh_hid },
// 0x7x, indexed, no offset instructions
{ M680X_INS_NEG, idxX0_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_COM, idxX0_hid, inh_hid },
{ M680X_INS_LSR, idxX0_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ROR, idxX0_hid, inh_hid },
{ M680X_INS_ASR, idxX0_hid, inh_hid },
{ M680X_INS_LSL, idxX0_hid, inh_hid },
{ M680X_INS_ROL, idxX0_hid, inh_hid },
{ M680X_INS_DEC, idxX0_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_INC, idxX0_hid, inh_hid },
{ M680X_INS_TST, idxX0_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_CLR, idxX0_hid, inh_hid },
// 0x8x, inherent instructions
{ M680X_INS_RTI, inh_hid, inh_hid },
{ M680X_INS_RTS, inh_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_SWI, inh_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_STOP, inh_hid, inh_hid },
{ M680X_INS_WAIT, inh_hid, inh_hid },
// 0x9x, inherent instructions
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_TAX, inh_hid, inh_hid },
{ M680X_INS_CLC, inh_hid, inh_hid },
{ M680X_INS_SEC, inh_hid, inh_hid },
{ M680X_INS_CLI, inh_hid, inh_hid },
{ M680X_INS_SEI, inh_hid, inh_hid },
{ M680X_INS_RSP, inh_hid, inh_hid },
{ M680X_INS_NOP, inh_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_TXA, inh_hid, inh_hid },
// 0xAx, immediate instructions with reg. A
{ M680X_INS_SUB, imm8_hid, inh_hid },
{ M680X_INS_CMP, imm8_hid, inh_hid },
{ M680X_INS_SBC, imm8_hid, inh_hid },
{ M680X_INS_CPX, imm8_hid, inh_hid },
{ M680X_INS_AND, imm8_hid, inh_hid },
{ M680X_INS_BIT, imm8_hid, inh_hid },
{ M680X_INS_LDA, imm8_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_EOR, imm8_hid, inh_hid },
{ M680X_INS_ADC, imm8_hid, inh_hid },
{ M680X_INS_ORA, imm8_hid, inh_hid },
{ M680X_INS_ADD, imm8_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
{ M680X_INS_BSR, rel8_hid, inh_hid },
{ M680X_INS_LDX, imm8_hid, inh_hid },
{ M680X_INS_ILLGL, illgl_hid, inh_hid },
// 0xBx, direct instructions with reg. A
{ M680X_INS_SUB, dir_hid, inh_hid },
{ M680X_INS_CMP, dir_hid, inh_hid },
{ M680X_INS_SBC, dir_hid, inh_hid },
{ M680X_INS_CPX, dir_hid, inh_hid },
{ M680X_INS_AND, dir_hid, inh_hid },
{ M680X_INS_BIT, dir_hid, inh_hid },
{ M680X_INS_LDA, dir_hid, inh_hid },
{ M680X_INS_STA, dir_hid, inh_hid },
{ M680X_INS_EOR, dir_hid, inh_hid },
{ M680X_INS_ADC, dir_hid, inh_hid },
{ M680X_INS_ORA, dir_hid, inh_hid },
{ M680X_INS_ADD, dir_hid, inh_hid },
{ M680X_INS_JMP, dir_hid, inh_hid },
{ M680X_INS_JSR, dir_hid, inh_hid },
{ M680X_INS_LDX, dir_hid, inh_hid },
{ M680X_INS_STX, dir_hid, inh_hid },
// 0xCx, extended instructions with reg. A
{ M680X_INS_SUB, ext_hid, inh_hid },
{ M680X_INS_CMP, ext_hid, inh_hid },
{ M680X_INS_SBC, ext_hid, inh_hid },
{ M680X_INS_CPX, ext_hid, inh_hid },
{ M680X_INS_AND, ext_hid, inh_hid },
{ M680X_INS_BIT, ext_hid, inh_hid },
{ M680X_INS_LDA, ext_hid, inh_hid },
{ M680X_INS_STA, ext_hid, inh_hid },
{ M680X_INS_EOR, ext_hid, inh_hid },
{ M680X_INS_ADC, ext_hid, inh_hid },
{ M680X_INS_ORA, ext_hid, inh_hid },
{ M680X_INS_ADD, ext_hid, inh_hid },
{ M680X_INS_JMP, ext_hid, inh_hid },
{ M680X_INS_JSR, ext_hid, inh_hid },
{ M680X_INS_LDX, ext_hid, inh_hid },
{ M680X_INS_STX, ext_hid, inh_hid },
// 0xDx, indexed with 2 byte offset instructions with reg. A
{ M680X_INS_SUB, idxX16_hid, inh_hid },
{ M680X_INS_CMP, idxX16_hid, inh_hid },
{ M680X_INS_SBC, idxX16_hid, inh_hid },
{ M680X_INS_CPX, idxX16_hid, inh_hid },
{ M680X_INS_AND, idxX16_hid, inh_hid },
{ M680X_INS_BIT, idxX16_hid, inh_hid },
{ M680X_INS_LDA, idxX16_hid, inh_hid },
{ M680X_INS_STA, idxX16_hid, inh_hid },
{ M680X_INS_EOR, idxX16_hid, inh_hid },
{ M680X_INS_ADC, idxX16_hid, inh_hid },
{ M680X_INS_ORA, idxX16_hid, inh_hid },
{ M680X_INS_ADD, idxX16_hid, inh_hid },
{ M680X_INS_JMP, idxX16_hid, inh_hid },
{ M680X_INS_JSR, idxX16_hid, inh_hid },
{ M680X_INS_LDX, idxX16_hid, inh_hid },
{ M680X_INS_STX, idxX16_hid, inh_hid },
// 0xEx, indexed with 1 byte offset instructions with reg. A
{ M680X_INS_SUB, idxX_hid, inh_hid },
{ M680X_INS_CMP, idxX_hid, inh_hid },
{ M680X_INS_SBC, idxX_hid, inh_hid },
{ M680X_INS_CPX, idxX_hid, inh_hid },
{ M680X_INS_AND, idxX_hid, inh_hid },
{ M680X_INS_BIT, idxX_hid, inh_hid },
{ M680X_INS_LDA, idxX_hid, inh_hid },
{ M680X_INS_STA, idxX_hid, inh_hid },
{ M680X_INS_EOR, idxX_hid, inh_hid },
{ M680X_INS_ADC, idxX_hid, inh_hid },
{ M680X_INS_ORA, idxX_hid, inh_hid },
{ M680X_INS_ADD, idxX_hid, inh_hid },
{ M680X_INS_JMP, idxX_hid, inh_hid },
{ M680X_INS_JSR, idxX_hid, inh_hid },
{ M680X_INS_LDX, idxX_hid, inh_hid },
{ M680X_INS_STX, idxX_hid, inh_hid },
// 0xFx, indexed without offset instructions with reg. A
{ M680X_INS_SUB, idxX0_hid, inh_hid },
{ M680X_INS_CMP, idxX0_hid, inh_hid },
{ M680X_INS_SBC, idxX0_hid, inh_hid },
{ M680X_INS_CPX, idxX0_hid, inh_hid },
{ M680X_INS_AND, idxX0_hid, inh_hid },
{ M680X_INS_BIT, idxX0_hid, inh_hid },
{ M680X_INS_LDA, idxX0_hid, inh_hid },
{ M680X_INS_STA, idxX0_hid, inh_hid },
{ M680X_INS_EOR, idxX0_hid, inh_hid },
{ M680X_INS_ADC, idxX0_hid, inh_hid },
{ M680X_INS_ORA, idxX0_hid, inh_hid },
{ M680X_INS_ADD, idxX0_hid, inh_hid },
{ M680X_INS_JMP, idxX0_hid, inh_hid },
{ M680X_INS_JSR, idxX0_hid, inh_hid },
{ M680X_INS_LDX, idxX0_hid, inh_hid },
{ M680X_INS_STX, idxX0_hid, inh_hid },
};
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