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51 lines
1.5 KiB
C++
51 lines
1.5 KiB
C++
//===-- X86BaseInfo.h - Top level definitions for X86 -------- --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains small standalone helper functions and enum definitions for
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// the X86 target useful for the compiler back-end and the MC libraries.
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// As such, it deliberately does not include references to LLVM core
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// code gen types, passes, etc..
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//
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//===----------------------------------------------------------------------===//
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#ifndef CS_X86_BASEINFO_H
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#define CS_X86_BASEINFO_H
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/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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// Enums for memory operand decoding. Each memory operand is represented with
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// a 5 operand sequence in the form:
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// [BaseReg, ScaleAmt, IndexReg, Disp, Segment]
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// These enums help decode this.
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enum {
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X86_AddrBaseReg = 0,
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X86_AddrScaleAmt = 1,
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X86_AddrIndexReg = 2,
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X86_AddrDisp = 3,
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/// AddrSegmentReg - The operand # of the segment in the memory operand.
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X86_AddrSegmentReg = 4,
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/// AddrNumOperands - Total number of operands in a memory reference.
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X86_AddrNumOperands = 5
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};
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enum IPREFIXES {
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X86_IP_NO_PREFIX = 0,
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X86_IP_HAS_OP_SIZE = 1,
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X86_IP_HAS_AD_SIZE = 2,
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X86_IP_HAS_REPEAT_NE = 4,
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X86_IP_HAS_REPEAT = 8,
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X86_IP_HAS_LOCK = 16,
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X86_IP_HAS_NOTRACK = 64
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};
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#endif
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