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f8eae0ac15
capstone/arch
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vit9696 f8eae0ac15 Refactor confusing if for xacquire/xrelease (#1173) 
Sync with https://github.com/llvm-mirror/llvm/blob/7cdce81/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp#L362
2018-06-13 22:14:53 +08:00
..
AArch64 Fix undefined shifts (#1158) 2018-06-03 22:29:58 +08:00
ARM Fix ARM operand subtracted field (#1163) 2018-06-05 22:20:02 +08:00
EVM EVM: add missing files 2018-03-31 17:32:22 +08:00
M68K We can read more registers from M68K (#1151) 2018-06-02 01:08:54 +08:00
M680X prefix cs_ to global variables to avoid link problems (#1108) 2018-03-29 22:17:37 +08:00
Mips Undefined shifts (#1154) 2018-06-02 16:49:36 +08:00
PowerPC Undefined shifts (#1154) 2018-06-02 16:49:36 +08:00
Sparc Undefined shifts (#1154) 2018-06-02 16:49:36 +08:00
SystemZ prefix cs_ to global variables to avoid link problems (#1108) 2018-03-29 22:17:37 +08:00
TMS320C64x prefix cs_ to global variables to avoid link problems (#1108) 2018-03-29 22:17:37 +08:00
X86 Refactor confusing if for xacquire/xrelease (#1173) 2018-06-13 22:14:53 +08:00
XCore Undefined shifts (#1154) 2018-06-02 16:49:36 +08:00