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Bug 1050291 - ARM Simulator: Fix vmovl quad register encoding. r=nbp
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@ -3862,7 +3862,9 @@ Simulator::decodeSpecialCondition(SimInstruction *instr)
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case 5:
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if (instr->bits(18, 16) == 0 && instr->bits(11, 6) == 0x28 && instr->bit(4) == 1) {
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// vmovl signed
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int Vd = (instr->bit(22) << 4) | instr->vdValue();
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if ((instr->vdValue() & 1) != 0)
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MOZ_CRASH("Undefined behavior");
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int Vd = (instr->bit(22) << 3) | (instr->vdValue() >> 1);
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int Vm = (instr->bit(5) << 4) | instr->vmValue();
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int imm3 = instr->bits(21, 19);
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if (imm3 != 1 && imm3 != 2 && imm3 != 4)
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@ -3885,7 +3887,9 @@ Simulator::decodeSpecialCondition(SimInstruction *instr)
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case 7:
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if (instr->bits(18, 16) == 0 && instr->bits(11, 6) == 0x28 && instr->bit(4) == 1) {
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// vmovl unsigned.
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int Vd = (instr->bit(22) << 4) | instr->vdValue();
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if ((instr->vdValue() & 1) != 0)
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MOZ_CRASH("Undefined behavior");
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int Vd = (instr->bit(22) << 3) | (instr->vdValue() >> 1);
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int Vm = (instr->bit(5) << 4) | instr->vmValue();
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int imm3 = instr->bits(21, 19);
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if (imm3 != 1 && imm3 != 2 && imm3 != 4)
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