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Bug 595728 - nanojit: clarify semantics of shift operations. r=edwsmith.
--HG-- extra : convert_revision : 2a75fed5283f0efb625b10d20db007ad6bfe849a
This commit is contained in:
Nicholas Nethercote
parent
eccb6a7711
commit
0dcc83de7f
@ -150,7 +150,8 @@ void ValidateWriter::checkAccSet(LOpcode op, LIns* base, int32_t disp, AccSet ac
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#endif
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typedef int32_t (FASTCALL *RetInt)();
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typedef double (FASTCALL *RetFloat)();
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typedef int64_t (FASTCALL *RetQuad)();
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typedef double (FASTCALL *RetDouble)();
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typedef GuardRecord* (FASTCALL *RetGuard)();
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struct Function {
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@ -159,9 +160,12 @@ struct Function {
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};
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enum ReturnType {
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RT_INT32 = 1,
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RT_FLOAT = 2,
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RT_GUARD = 4
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RT_INT = 1,
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#ifdef NANOJIT_64BIT
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RT_QUAD = 2,
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#endif
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RT_DOUBLE = 4,
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RT_GUARD = 8
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};
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#ifdef DEBUG
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@ -262,8 +266,11 @@ private:
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class LirasmFragment {
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public:
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union {
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RetFloat rfloat;
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RetInt rint;
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#ifdef NANOJIT_64BIT
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RetQuad rquad;
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#endif
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RetDouble rdouble;
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RetGuard rguard;
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};
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ReturnType mReturnType;
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@ -817,9 +824,14 @@ FragmentAssembler::endFragment()
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if (mReturnTypeBits == 0) {
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cerr << "warning: no return type in fragment '"
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<< mFragName << "'" << endl;
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}
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if (mReturnTypeBits != RT_INT32 && mReturnTypeBits != RT_FLOAT &&
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mReturnTypeBits != RT_GUARD) {
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} else if (mReturnTypeBits != RT_INT &&
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#ifdef NANOJIT_64BIT
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mReturnTypeBits != RT_QUAD &&
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#endif
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mReturnTypeBits != RT_DOUBLE &&
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mReturnTypeBits != RT_GUARD)
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{
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cerr << "warning: multiple return types in fragment '"
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<< mFragName << "'" << endl;
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}
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@ -847,17 +859,26 @@ FragmentAssembler::endFragment()
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f = &mParent.mFragments[mFragName];
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switch (mReturnTypeBits) {
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case RT_INT:
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f->rint = (RetInt)((uintptr_t)mFragment->code());
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f->mReturnType = RT_INT;
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break;
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#ifdef NANOJIT_64BIT
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case RT_QUAD:
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f->rquad = (RetQuad)((uintptr_t)mFragment->code());
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f->mReturnType = RT_QUAD;
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break;
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#endif
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case RT_DOUBLE:
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f->rdouble = (RetDouble)((uintptr_t)mFragment->code());
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f->mReturnType = RT_DOUBLE;
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break;
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case RT_GUARD:
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f->rguard = (RetGuard)((uintptr_t)mFragment->code());
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f->mReturnType = RT_GUARD;
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break;
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case RT_FLOAT:
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f->rfloat = (RetFloat)((uintptr_t)mFragment->code());
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f->mReturnType = RT_FLOAT;
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break;
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default:
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f->rint = (RetInt)((uintptr_t)mFragment->code());
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f->mReturnType = RT_INT32;
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NanoAssert(0);
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break;
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}
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@ -1158,11 +1179,17 @@ FragmentAssembler::assembleFragment(LirTokenStream &in, bool implicitBegin, cons
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break;
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case LIR_reti:
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ins = assemble_ret(RT_INT32);
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ins = assemble_ret(RT_INT);
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break;
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#ifdef NANOJIT_64BIT
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case LIR_retq:
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ins = assemble_ret(RT_QUAD);
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break;
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#endif
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case LIR_retd:
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ins = assemble_ret(RT_FLOAT);
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ins = assemble_ret(RT_DOUBLE);
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break;
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case LIR_label:
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@ -1176,7 +1203,6 @@ FragmentAssembler::assembleFragment(LirTokenStream &in, bool implicitBegin, cons
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case LIR_line:
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case LIR_xtbl:
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case LIR_jtbl:
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CASE64(LIR_retq:)
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nyi(op);
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break;
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@ -2019,7 +2045,7 @@ FragmentAssembler::assembleRandomFragment(int nIns)
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delete[] classGenerator;
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// Return 0.
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mReturnTypeBits |= RT_INT32;
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mReturnTypeBits |= RT_INT;
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mLir->ins1(LIR_reti, mLir->insImmI(0));
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endFragment();
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@ -2072,8 +2098,8 @@ Lirasm::lookupFunction(const string &name, CallInfo *&ci)
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Fragments::const_iterator func = mFragments.find(name);
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if (func != mFragments.end()) {
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// The ABI, arg types and ret type will be overridden by the caller.
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if (func->second.mReturnType == RT_FLOAT) {
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CallInfo target = {(uintptr_t) func->second.rfloat,
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if (func->second.mReturnType == RT_DOUBLE) {
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CallInfo target = {(uintptr_t) func->second.rdouble,
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0, ABI_FASTCALL, /*isPure*/0, ACCSET_STORE_ANY
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verbose_only(, func->first.c_str()) };
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*ci = target;
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@ -2339,20 +2365,24 @@ main(int argc, char **argv)
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if (i == lasm.mFragments.end())
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errMsgAndQuit(opts.progname, "error: at least one fragment must be named 'main'");
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switch (i->second.mReturnType) {
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case RT_FLOAT:
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{
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double res = i->second.rfloat();
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cout << "Output is: " << res << endl;
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break;
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}
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case RT_INT32:
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{
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case RT_INT: {
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int res = i->second.rint();
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cout << "Output is: " << res << endl;
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break;
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}
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case RT_GUARD:
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{
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#ifdef NANOJIT_64BIT
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case RT_QUAD: {
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int res = i->second.rquad();
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cout << "Output is: " << res << endl;
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break;
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}
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#endif
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case RT_DOUBLE: {
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double res = i->second.rdouble();
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cout << "Output is: " << res << endl;
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break;
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}
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case RT_GUARD: {
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LasmSideExit *ls = (LasmSideExit*) i->second.rguard()->exit;
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cout << "Exited block on line: " << ls->line << endl;
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break;
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@ -42,9 +42,6 @@ do
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runtest $infile
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done
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runtest "--random 1000000"
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runtest "--random 1000000 --optimize"
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# ---- Platform-specific tests and configurations. ----
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# 64-bit platforms
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@ -102,5 +99,10 @@ then
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runtest "--random 10000 --optimize --arch 5 --novfp"
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fi
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# ---- Randomized tests, they are run last because they are slow ----
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runtest "--random 1000000"
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runtest "--random 1000000 --optimize"
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rm testoutput.txt
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@ -263,6 +263,9 @@ OP___(andi, 85, Op2, I, 1) // bitwise-AND int
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OP___(ori, 86, Op2, I, 1) // bitwise-OR int
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OP___(xori, 87, Op2, I, 1) // bitwise-XOR int
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// For all three integer shift operations, only the bottom five bits of the
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// second operand are used, and they are treated as unsigned. This matches
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// x86 semantics.
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OP___(lshi, 88, Op2, I, 1) // left shift int
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OP___(rshi, 89, Op2, I, 1) // right shift int (>>)
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OP___(rshui, 90, Op2, I, 1) // right shift unsigned int (>>>)
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@ -274,6 +277,9 @@ OP_64(andq, 93, Op2, Q, 1) // bitwise-AND quad
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OP_64(orq, 94, Op2, Q, 1) // bitwise-OR quad
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OP_64(xorq, 95, Op2, Q, 1) // bitwise-XOR quad
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// For all three quad shift operations, only the bottom six bits of the
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// second operand are used, and they are treated as unsigned. This matches
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// x86-64 semantics.
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OP_64(lshq, 96, Op2, Q, 1) // left shift quad; 2nd operand is an int
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OP_64(rshq, 97, Op2, Q, 1) // right shift quad; 2nd operand is an int
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OP_64(rshuq, 98, Op2, Q, 1) // right shift unsigned quad; 2nd operand is an int
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