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Bug 1562185: Reorganize Cranelift target ISA configuration; r=lth
- rename the cpu.rs file to isa.rs; - create a new function for platform-specific flags, and move x86 flags in there; Differential Revision: https://phabricator.services.mozilla.com/D36321 --HG-- rename : js/src/wasm/cranelift/src/cpu.rs => js/src/wasm/cranelift/src/isa.rs extra : rebase_source : 2611faa2084f82667e73cc264c10ba6f7c97c407 extra : histedit_source : f1db60e45ea7a3178c19153912d2c659c10f7f71
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@ -31,7 +31,7 @@ use cranelift_codegen::Context;
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use cranelift_wasm::{FuncIndex, FuncTranslator, WasmResult};
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use crate::bindings;
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use crate::cpu::make_isa;
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use crate::isa::make_isa;
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use crate::utils::DashResult;
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use crate::wasm2clif::{init_sig, native_pointer_size, TransEnv};
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@ -21,8 +21,6 @@
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//! The main entry point is the `make_isa()` function which allocates a configured `TargetISA`
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//! object.
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use std::str::FromStr;
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use cranelift_codegen::isa;
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use cranelift_codegen::settings::{self, Configurable};
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@ -41,51 +39,6 @@ impl From<settings::SetError> for BasicError {
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}
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}
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/// Allocate a `TargetISA` object that can be used to generate code for the CPU we're running on.
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///
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/// TODO: SM runs on more than x86 chips. Support them.
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///
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/// # Errors
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///
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/// This function fails if Cranelift has not been compiled with support for the current CPU.
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pub fn make_isa(env: &StaticEnvironment) -> DashResult<Box<dyn isa::TargetIsa>> {
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// Start with the ISA-independent settings.
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let shared_flags = make_shared_flags().expect("Cranelift configuration error");
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// We can use `#[cfg(target_arch = "...")]` to conditionally compile code per ISA.
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let mut ib = isa::lookup(triple!("x86_64-unknown-unknown")).map_err(BasicError::from)?;
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if !env.hasSse2 {
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return Err("SSE2 is mandatory for Baldrdash!".into());
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}
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if env.hasSse3 {
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ib.enable("has_sse3").map_err(BasicError::from)?;
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}
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if env.hasSse41 {
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ib.enable("has_sse41").map_err(BasicError::from)?;
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}
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if env.hasSse42 {
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ib.enable("has_sse42").map_err(BasicError::from)?;
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}
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if env.hasPopcnt {
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ib.enable("has_popcnt").map_err(BasicError::from)?;
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}
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if env.hasAvx {
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ib.enable("has_avx").map_err(BasicError::from)?;
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}
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if env.hasBmi1 {
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ib.enable("has_bmi1").map_err(BasicError::from)?;
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}
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if env.hasBmi2 {
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ib.enable("has_bmi2").map_err(BasicError::from)?;
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}
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if env.hasLzcnt {
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ib.enable("has_lzcnt").map_err(BasicError::from)?;
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}
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Ok(ib.finish(shared_flags))
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}
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/// Create a `Flags` object for the shared settings.
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///
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/// This only fails if one of Cranelift's settings has been removed or renamed.
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@ -120,8 +73,60 @@ fn make_shared_flags() -> settings::SetResult<settings::Flags> {
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// Let's optimize for speed.
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sb.set("opt_level", "best")?;
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// TODO: Enable jump tables (requires emitting readonly data separately from text).
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// Enable jump tables.
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sb.set("jump_tables_enabled", "true")?;
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Ok(settings::Flags::new(sb))
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}
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#[cfg(feature = "cranelift_x86")]
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fn make_isa_specific(env: &StaticEnvironment) -> DashResult<isa::Builder> {
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use std::str::FromStr; // for the triple! macro below.
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let mut ib = isa::lookup(triple!("x86_64-unknown-unknown")).map_err(BasicError::from)?;
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if !env.hasSse2 {
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return Err("SSE2 is mandatory for Baldrdash!".into());
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}
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if env.hasSse3 {
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ib.enable("has_sse3").map_err(BasicError::from)?;
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}
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if env.hasSse41 {
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ib.enable("has_sse41").map_err(BasicError::from)?;
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}
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if env.hasSse42 {
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ib.enable("has_sse42").map_err(BasicError::from)?;
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}
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if env.hasPopcnt {
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ib.enable("has_popcnt").map_err(BasicError::from)?;
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}
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if env.hasAvx {
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ib.enable("has_avx").map_err(BasicError::from)?;
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}
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if env.hasBmi1 {
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ib.enable("has_bmi1").map_err(BasicError::from)?;
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}
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if env.hasBmi2 {
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ib.enable("has_bmi2").map_err(BasicError::from)?;
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}
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if env.hasLzcnt {
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ib.enable("has_lzcnt").map_err(BasicError::from)?;
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}
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Ok(ib)
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}
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/// TODO: SM runs on more than x86 chips. Support them.
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#[cfg(not(feature = "cranelift_x86"))]
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fn make_isa_specific(_env: &StaticEnvironment) -> DashResult<isa::Builder> {
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Err("Platform not supported yet!".into())
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}
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/// Allocate a `TargetISA` object that can be used to generate code for the CPU we're running on.
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pub fn make_isa(env: &StaticEnvironment) -> DashResult<Box<dyn isa::TargetIsa>> {
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// Start with the ISA-independent settings.
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let shared_flags = make_shared_flags().map_err(BasicError::from)?;
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let ib = make_isa_specific(env)?;
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Ok(ib.finish(shared_flags))
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}
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@ -13,14 +13,16 @@
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* limitations under the License.
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*/
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#[cfg(feature = "cranelift_x86")]
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#[macro_use]
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extern crate target_lexicon;
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#[macro_use]
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extern crate log;
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mod bindings; // High-level bindings for C++ data structures.
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mod compile; // Cranelift function compiler.
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mod cpu; // CPU detection and `TargetISA` configuration.
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mod isa; // `TargetISA` configuration.
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mod utils; // Helpers for other source files.
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mod wasm2clif; // WebAssembly to Cranelift translation callbacks.
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