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Make TM fragment entry- and exit-profiling work on X64 (bug 517857, r=dvander).
--HG-- extra : convert_revision : a7dc90cf8f8c7d121cc9d786742e690897d5ddc8
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@ -1787,6 +1787,13 @@ namespace nanojit
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}
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}
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// profiling for the exit
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verbose_only(
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if (_logc->lcbits & LC_FragProfile) {
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asm_inc_m32( &guard->record()->profCount );
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}
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)
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MR(RSP, RBP);
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// return value is GuardRecord*
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@ -1861,9 +1868,17 @@ namespace nanojit
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// Increment the 32-bit profiling counter at pCtr, without
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// changing any registers.
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verbose_only(
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void Assembler::asm_inc_m32(uint32_t* /*pCtr*/)
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void Assembler::asm_inc_m32(uint32_t* pCtr)
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{
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// todo: implement this
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// Not as simple as on x86. We need to temporarily free up a
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// register into which to generate the address, so just push
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// it on the stack. This assumes that the scratch area at
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// -8(%rsp) .. -1(%esp) isn't being used for anything else
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// at this point.
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emitr(X64_popr, RAX); // popq %rax
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emit(X64_inclmRAX); // incl (%rax)
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asm_quad(RAX, (uint64_t)pCtr); // movabsq $pCtr, %rax
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emitr(X64_pushr, RAX); // pushq %rax
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}
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)
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@ -307,6 +307,7 @@ namespace nanojit
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X64_xorps = 0xC0570F4000000004LL, // 128bit xor xmm (four packed singles), one byte shorter
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X64_xorpsm = 0x05570F4000000004LL, // 128bit xor xmm, [rip+disp32]
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X64_xorpsa = 0x2504570F40000005LL, // 128bit xor xmm, [disp32]
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X64_inclmRAX= 0x00FF000000000002LL, // incl (%rax)
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X64_jmpx = 0xC524ff4000000004LL, // jmp [d32+x*8]
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X64_jmpxb = 0xC024ff4000000004LL, // jmp [b+x*8]
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