diff --git a/config/check_macroassembler_style.py b/config/check_macroassembler_style.py index 20375e9e262e..b7c3e5c5000a 100644 --- a/config/check_macroassembler_style.py +++ b/config/check_macroassembler_style.py @@ -30,8 +30,8 @@ import sys architecture_independent = set(["generic"]) all_unsupported_architectures_names = set(["mips32", "mips64", "mips_shared"]) -all_architecture_names = set(["x86", "x64", "arm", "arm64", "loong64"]) -all_shared_architecture_names = set(["x86_shared", "arm", "arm64", "loong64"]) +all_architecture_names = set(["x86", "x64", "arm", "arm64", "loong64", "wasm32"]) +all_shared_architecture_names = set(["x86_shared", "arm", "arm64", "loong64", "wasm32"]) reBeforeArg = "(?<=[(,\s])" reArgType = "(?P[\w\s:*&<>]+)" diff --git a/js/moz.configure b/js/moz.configure index 4f9bb8992f3c..b7ba9790425d 100644 --- a/js/moz.configure +++ b/js/moz.configure @@ -246,6 +246,7 @@ set_config("JS_CODEGEN_MIPS64", jit_codegen.mips64) set_config("JS_CODEGEN_LOONG64", jit_codegen.loong64) set_config("JS_CODEGEN_X86", jit_codegen.x86) set_config("JS_CODEGEN_X64", jit_codegen.x64) +set_config("JS_CODEGEN_WASM32", jit_codegen.wasm32) set_define("JS_CODEGEN_NONE", jit_codegen.none) set_define("JS_CODEGEN_ARM", jit_codegen.arm) set_define("JS_CODEGEN_ARM64", jit_codegen.arm64) @@ -254,6 +255,7 @@ set_define("JS_CODEGEN_MIPS64", jit_codegen.mips64) set_define("JS_CODEGEN_LOONG64", jit_codegen.loong64) set_define("JS_CODEGEN_X86", jit_codegen.x86) set_define("JS_CODEGEN_X64", jit_codegen.x64) +set_define("JS_CODEGEN_WASM32", jit_codegen.wasm32) # Profiling # ======================================================= diff --git a/js/src/jit/Assembler.h b/js/src/jit/Assembler.h index 04dcdc647ecd..2cc432491c34 100644 --- a/js/src/jit/Assembler.h +++ b/js/src/jit/Assembler.h @@ -21,6 +21,8 @@ # include "jit/mips64/Assembler-mips64.h" #elif defined(JS_CODEGEN_LOONG64) # include "jit/loong64/Assembler-loong64.h" +#elif defined(JS_CODEGEN_WASM32) +# include "jit/wasm32/Assembler-wasm32.h" #elif defined(JS_CODEGEN_NONE) # include "jit/none/Assembler-none.h" #else diff --git a/js/src/jit/CodeGenerator.h b/js/src/jit/CodeGenerator.h index 67453d3cd38c..f61e32438828 100644 --- a/js/src/jit/CodeGenerator.h +++ b/js/src/jit/CodeGenerator.h @@ -26,6 +26,8 @@ # include "jit/mips64/CodeGenerator-mips64.h" #elif defined(JS_CODEGEN_LOONG64) # include "jit/loong64/CodeGenerator-loong64.h" +#elif defined(JS_CODEGEN_WASM32) +# include "jit/wasm32/CodeGenerator-wasm32.h" #elif defined(JS_CODEGEN_NONE) # include "jit/none/CodeGenerator-none.h" #else diff --git a/js/src/jit/FlushICache.h b/js/src/jit/FlushICache.h index 42b1fb045ce6..2c7c0e6b3a9d 100644 --- a/js/src/jit/FlushICache.h +++ b/js/src/jit/FlushICache.h @@ -29,7 +29,7 @@ inline void FlushICache(void* code, size_t size, extern void FlushICache(void* code, size_t size, bool codeIsThreadLocal = true); -#elif defined(JS_CODEGEN_NONE) +#elif defined(JS_CODEGEN_NONE) || defined(JS_CODEGEN_WASM32) inline void FlushICache(void* code, size_t size, bool codeIsThreadLocal = true) { diff --git a/js/src/jit/JitFrames.cpp b/js/src/jit/JitFrames.cpp index 00ba23d7f178..e4cdb6213153 100644 --- a/js/src/jit/JitFrames.cpp +++ b/js/src/jit/JitFrames.cpp @@ -2298,7 +2298,7 @@ template T MachineState::read(FloatRegister reg) const { MOZ_ASSERT(reg.size() == sizeof(T)); -#if !defined(JS_CODEGEN_NONE) +#if !defined(JS_CODEGEN_NONE) && !defined(JS_CODEGEN_WASM32) if (state_.is()) { uint32_t offset = reg.getRegisterDumpOffsetInBytes(); MOZ_ASSERT((offset % sizeof(T)) == 0); diff --git a/js/src/jit/LIR.h b/js/src/jit/LIR.h index 66c665b5baff..2f0c2c1ebaee 100644 --- a/js/src/jit/LIR.h +++ b/js/src/jit/LIR.h @@ -1933,6 +1933,8 @@ AnyRegister LAllocation::toRegister() const { # include "jit/mips64/LIR-mips64.h" # endif # include "jit/mips-shared/LIR-mips-shared.h" +#elif defined(JS_CODEGEN_WASM32) +# include "jit/wasm32/LIR-wasm32.h" #elif defined(JS_CODEGEN_NONE) # include "jit/none/LIR-none.h" #else diff --git a/js/src/jit/Lowering.h b/js/src/jit/Lowering.h index a04d09c4467d..28a7c5173e42 100644 --- a/js/src/jit/Lowering.h +++ b/js/src/jit/Lowering.h @@ -25,6 +25,8 @@ # include "jit/mips64/Lowering-mips64.h" #elif defined(JS_CODEGEN_LOONG64) # include "jit/loong64/Lowering-loong64.h" +#elif defined(JS_CODEGEN_WASM32) +# include "jit/wasm32/Lowering-wasm32.h" #elif defined(JS_CODEGEN_NONE) # include "jit/none/Lowering-none.h" #else diff --git a/js/src/jit/MacroAssembler-inl.h b/js/src/jit/MacroAssembler-inl.h index 5ed4ac74589e..7e0df7fa3608 100644 --- a/js/src/jit/MacroAssembler-inl.h +++ b/js/src/jit/MacroAssembler-inl.h @@ -39,6 +39,8 @@ # include "jit/mips64/MacroAssembler-mips64-inl.h" #elif defined(JS_CODEGEN_LOONG64) # include "jit/loong64/MacroAssembler-loong64-inl.h" +#elif defined(JS_CODEGEN_WASM32) +# include "jit/wasm32/MacroAssembler-wasm32-inl.h" #elif !defined(JS_CODEGEN_NONE) # error "Unknown architecture!" #endif diff --git a/js/src/jit/MacroAssembler.cpp b/js/src/jit/MacroAssembler.cpp index 3abc601bec09..8a32752d1da7 100644 --- a/js/src/jit/MacroAssembler.cpp +++ b/js/src/jit/MacroAssembler.cpp @@ -3803,7 +3803,7 @@ CodeOffset MacroAssembler::wasmCallImport(const wasm::CallSiteDesc& desc, globalDataOffset + offsetof(wasm::FuncImportInstanceData, code), ABINonArgReg0); -#ifndef JS_CODEGEN_NONE +#if !defined(JS_CODEGEN_NONE) && !defined(JS_CODEGEN_WASM32) static_assert(ABINonArgReg0 != InstanceReg, "by constraint"); #endif @@ -4145,6 +4145,8 @@ void MacroAssembler::emitPreBarrierFastPath(JSRuntime* rt, MIRType type, ma_dsll(temp1, temp1, temp3); #elif JS_CODEGEN_LOONG64 as_sll_d(temp1, temp1, temp3); +#elif JS_CODEGEN_WASM32 + MOZ_CRASH(); #elif JS_CODEGEN_NONE MOZ_CRASH(); #else diff --git a/js/src/jit/MacroAssembler.h b/js/src/jit/MacroAssembler.h index 5fa8f40bd143..84a5a9852a93 100644 --- a/js/src/jit/MacroAssembler.h +++ b/js/src/jit/MacroAssembler.h @@ -27,6 +27,8 @@ # include "jit/mips64/MacroAssembler-mips64.h" #elif defined(JS_CODEGEN_LOONG64) # include "jit/loong64/MacroAssembler-loong64.h" +#elif defined(JS_CODEGEN_WASM32) +# include "jit/wasm32/MacroAssembler-wasm32.h" #elif defined(JS_CODEGEN_NONE) # include "jit/none/MacroAssembler-none.h" #else @@ -94,8 +96,8 @@ // } // ////}}} check_macroassembler_style -#define ALL_ARCH mips32, mips64, arm, arm64, x86, x64, loong64 -#define ALL_SHARED_ARCH arm, arm64, loong64, x86_shared, mips_shared +#define ALL_ARCH mips32, mips64, arm, arm64, x86, x64, loong64, wasm32 +#define ALL_SHARED_ARCH arm, arm64, loong64, x86_shared, mips_shared, wasm32 // * How this macro works: // @@ -142,6 +144,7 @@ #define DEFINED_ON_mips64 #define DEFINED_ON_mips_shared #define DEFINED_ON_loong64 +#define DEFINED_ON_wasm32 #define DEFINED_ON_none // Specialize for each architecture. @@ -174,6 +177,9 @@ #elif defined(JS_CODEGEN_LOONG64) # undef DEFINED_ON_loong64 # define DEFINED_ON_loong64 define +#elif defined(JS_CODEGEN_WASM32) +# undef DEFINED_ON_wasm32 +# define DEFINED_ON_wasm32 define #elif defined(JS_CODEGEN_NONE) # undef DEFINED_ON_none # define DEFINED_ON_none crash @@ -491,10 +497,10 @@ class MacroAssembler : public MacroAssemblerSpecific { // The size of the area used by PushRegsInMask. size_t PushRegsInMaskSizeInBytes(LiveRegisterSet set) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); void PushRegsInMask(LiveRegisterSet set) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); void PushRegsInMask(LiveGeneralRegisterSet set); // Like PushRegsInMask, but instead of pushing the registers, store them to @@ -505,12 +511,12 @@ class MacroAssembler : public MacroAssemblerSpecific { // must point to either the lowest address in the save area, or some address // below that. void storeRegsInMask(LiveRegisterSet set, Address dest, Register scratch) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); void PopRegsInMask(LiveRegisterSet set); void PopRegsInMask(LiveGeneralRegisterSet set); void PopRegsInMaskIgnore(LiveRegisterSet set, LiveRegisterSet ignore) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); // =============================================================== // Stack manipulation functions -- single registers/values. @@ -543,7 +549,7 @@ class MacroAssembler : public MacroAssemblerSpecific { void Pop(FloatRegister t) PER_SHARED_ARCH; void Pop(const ValueOperand& val) PER_SHARED_ARCH; void PopFlags() DEFINED_ON(x86_shared); - void PopStackPtr() DEFINED_ON(arm, mips_shared, x86_shared, loong64); + void PopStackPtr() DEFINED_ON(arm, mips_shared, x86_shared, loong64, wasm32); void popRooted(VMFunctionData::RootType rootType, Register cellReg, const ValueOperand& valueReg); @@ -601,8 +607,8 @@ class MacroAssembler : public MacroAssemblerSpecific { void callAndPushReturnAddress(Label* label) DEFINED_ON(x86_shared); // These do not adjust framePushed(). - void pushReturnAddress() DEFINED_ON(mips_shared, arm, arm64, loong64); - void popReturnAddress() DEFINED_ON(mips_shared, arm, arm64, loong64); + void pushReturnAddress() DEFINED_ON(mips_shared, arm, arm64, loong64, wasm32); + void popReturnAddress() DEFINED_ON(mips_shared, arm, arm64, loong64, wasm32); // Useful for dealing with two-valued returns. void moveRegPair(Register src0, Register src1, Register dst0, Register dst1, @@ -633,10 +639,10 @@ class MacroAssembler : public MacroAssemblerSpecific { // Note: "Near" applies to ARM64 where the target must be within 1 MB (this is // release-asserted). CodeOffset moveNearAddressWithPatch(Register dest) - DEFINED_ON(x86, x64, arm, arm64, loong64, mips_shared); + DEFINED_ON(x86, x64, arm, arm64, loong64, wasm32, mips_shared); static void patchNearAddressMove(CodeLocationLabel loc, CodeLocationLabel target) - DEFINED_ON(x86, x64, arm, arm64, loong64, mips_shared); + DEFINED_ON(x86, x64, arm, arm64, loong64, wasm32, mips_shared); public: // =============================================================== @@ -1045,11 +1051,11 @@ class MacroAssembler : public MacroAssemblerSpecific { inline void addPtr(ImmWord imm, Register dest) PER_ARCH; inline void addPtr(ImmPtr imm, Register dest); inline void addPtr(Imm32 imm, const Address& dest) - DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64); + DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, wasm32); inline void addPtr(Imm32 imm, const AbsoluteAddress& dest) DEFINED_ON(x86, x64); inline void addPtr(const Address& src, Register dest) - DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64); + DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, wasm32); inline void add64(Register64 src, Register64 dest) PER_ARCH; inline void add64(Imm32 imm, Register64 dest) PER_ARCH; @@ -1074,11 +1080,11 @@ class MacroAssembler : public MacroAssemblerSpecific { inline void subPtr(Register src, Register dest) PER_ARCH; inline void subPtr(Register src, const Address& dest) - DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64); + DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, wasm32); inline void subPtr(Imm32 imm, Register dest) PER_ARCH; inline void subPtr(ImmWord imm, Register dest) DEFINED_ON(x64); inline void subPtr(const Address& addr, Register dest) - DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64); + DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, wasm32); inline void sub64(Register64 src, Register64 dest) PER_ARCH; inline void sub64(Imm64 imm, Register64 dest) PER_ARCH; @@ -1116,14 +1122,14 @@ class MacroAssembler : public MacroAssemblerSpecific { inline void mulDouble(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH; inline void mulDoublePtr(ImmPtr imm, Register temp, FloatRegister dest) - DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64); + DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, wasm32); // Perform an integer division, returning the integer part rounded toward // zero. rhs must not be zero, and the division must not overflow. // // On ARM, the chip must have hardware division instructions. inline void quotient32(Register rhs, Register srcDest, bool isUnsigned) - DEFINED_ON(mips_shared, arm, arm64, loong64); + DEFINED_ON(mips_shared, arm, arm64, loong64, wasm32); // As above, but srcDest must be eax and tempEdx must be edx. inline void quotient32(Register rhs, Register srcDest, Register tempEdx, @@ -1134,7 +1140,7 @@ class MacroAssembler : public MacroAssemblerSpecific { // // On ARM, the chip must have hardware division instructions. inline void remainder32(Register rhs, Register srcDest, bool isUnsigned) - DEFINED_ON(mips_shared, arm, arm64, loong64); + DEFINED_ON(mips_shared, arm, arm64, loong64, wasm32); // As above, but srcDest must be eax and tempEdx must be edx. inline void remainder32(Register rhs, Register srcDest, Register tempEdx, @@ -1149,7 +1155,7 @@ class MacroAssembler : public MacroAssemblerSpecific { // rhs is preserved, srdDest is clobbered. void flexibleRemainder32(Register rhs, Register srcDest, bool isUnsigned, const LiveRegisterSet& volatileLiveRegs) - DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64); + DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64, wasm32); // Perform an integer division, returning the integer part rounded toward // zero. rhs must not be zero, and the division must not overflow. @@ -1173,7 +1179,7 @@ class MacroAssembler : public MacroAssemblerSpecific { void flexibleDivMod32(Register rhs, Register srcDest, Register remOutput, bool isUnsigned, const LiveRegisterSet& volatileLiveRegs) - DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64); + DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64, wasm32); inline void divFloat32(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH; inline void divDouble(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH; @@ -1380,7 +1386,7 @@ class MacroAssembler : public MacroAssemblerSpecific { template inline void cmp32Set(Condition cond, T1 lhs, T2 rhs, Register dest) - DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64); + DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, wasm32); // Only the NotEqual and Equal conditions are allowed. inline void cmp64Set(Condition cond, Address lhs, Imm64 rhs, @@ -1415,10 +1421,10 @@ class MacroAssembler : public MacroAssemblerSpecific { inline void branch32(Condition cond, const AbsoluteAddress& lhs, Register rhs, Label* label) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); inline void branch32(Condition cond, const AbsoluteAddress& lhs, Imm32 rhs, Label* label) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); inline void branch32(Condition cond, const BaseIndex& lhs, Register rhs, Label* label) DEFINED_ON(arm, x86_shared); @@ -1432,7 +1438,7 @@ class MacroAssembler : public MacroAssemblerSpecific { inline void branch32(Condition cond, wasm::SymbolicAddress lhs, Imm32 rhs, Label* label) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); // The supported condition are Equal, NotEqual, LessThan(orEqual), // GreaterThan(orEqual), Below(orEqual) and Above(orEqual). When a fail label @@ -1483,14 +1489,14 @@ class MacroAssembler : public MacroAssemblerSpecific { inline void branchPtr(Condition cond, const AbsoluteAddress& lhs, Register rhs, Label* label) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); inline void branchPtr(Condition cond, const AbsoluteAddress& lhs, ImmWord rhs, Label* label) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); inline void branchPtr(Condition cond, wasm::SymbolicAddress lhs, Register rhs, Label* label) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); // Given a pointer to a GC Cell, retrieve the StoreBuffer pointer from its // chunk header, or nullptr if it is in the tenured heap. @@ -1498,7 +1504,7 @@ class MacroAssembler : public MacroAssemblerSpecific { void branchPtrInNurseryChunk(Condition cond, Register ptr, Register temp, Label* label) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); void branchPtrInNurseryChunk(Condition cond, const Address& address, Register temp, Label* label) DEFINED_ON(x86); void branchValueIsNurseryCell(Condition cond, const Address& address, @@ -1520,10 +1526,10 @@ class MacroAssembler : public MacroAssemblerSpecific { // x64 variants will do this only in the int64_t range. inline void branchTruncateFloat32MaybeModUint32(FloatRegister src, Register dest, Label* fail) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); inline void branchTruncateDoubleMaybeModUint32(FloatRegister src, Register dest, Label* fail) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); // Truncate a double/float32 to intptr and when it doesn't fit jump to the // failure label. @@ -1536,10 +1542,10 @@ class MacroAssembler : public MacroAssemblerSpecific { // failure label. inline void branchTruncateFloat32ToInt32(FloatRegister src, Register dest, Label* fail) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); inline void branchTruncateDoubleToInt32(FloatRegister src, Register dest, Label* fail) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); inline void branchDouble(DoubleCondition cond, FloatRegister lhs, FloatRegister rhs, Label* label) PER_SHARED_ARCH; @@ -1570,7 +1576,7 @@ class MacroAssembler : public MacroAssemblerSpecific { Label* label) PER_SHARED_ARCH; inline void branchAdd64(Condition cond, Imm64 imm, Register64 dest, - Label* label) DEFINED_ON(x86, arm); + Label* label) DEFINED_ON(x86, arm, wasm32); template inline void branchAddPtr(Condition cond, T src, Register dest, @@ -1596,7 +1602,7 @@ class MacroAssembler : public MacroAssemblerSpecific { Label* label) PER_SHARED_ARCH; inline void branchTest32(Condition cond, const AbsoluteAddress& lhs, Imm32 rhs, Label* label) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); template inline void branchTestPtr(Condition cond, Register lhs, Register rhs, @@ -1757,7 +1763,7 @@ class MacroAssembler : public MacroAssemblerSpecific { inline void branchTestInt32(Condition cond, Register tag, Label* label) PER_SHARED_ARCH; inline void branchTestDouble(Condition cond, Register tag, Label* label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); inline void branchTestNumber(Condition cond, Register tag, Label* label) PER_SHARED_ARCH; inline void branchTestBoolean(Condition cond, Register tag, @@ -1789,7 +1795,7 @@ class MacroAssembler : public MacroAssemblerSpecific { Label* label) PER_SHARED_ARCH; inline void branchTestUndefined(Condition cond, const ValueOperand& value, Label* label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); inline void branchTestInt32(Condition cond, const Address& address, Label* label) PER_SHARED_ARCH; @@ -1797,7 +1803,7 @@ class MacroAssembler : public MacroAssemblerSpecific { Label* label) PER_SHARED_ARCH; inline void branchTestInt32(Condition cond, const ValueOperand& value, Label* label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); inline void branchTestDouble(Condition cond, const Address& address, Label* label) PER_SHARED_ARCH; @@ -1805,11 +1811,11 @@ class MacroAssembler : public MacroAssemblerSpecific { Label* label) PER_SHARED_ARCH; inline void branchTestDouble(Condition cond, const ValueOperand& value, Label* label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); inline void branchTestNumber(Condition cond, const ValueOperand& value, Label* label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); inline void branchTestBoolean(Condition cond, const Address& address, Label* label) PER_SHARED_ARCH; @@ -1817,7 +1823,7 @@ class MacroAssembler : public MacroAssemblerSpecific { Label* label) PER_SHARED_ARCH; inline void branchTestBoolean(Condition cond, const ValueOperand& value, Label* label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); inline void branchTestString(Condition cond, const Address& address, Label* label) PER_SHARED_ARCH; @@ -1825,7 +1831,7 @@ class MacroAssembler : public MacroAssemblerSpecific { Label* label) PER_SHARED_ARCH; inline void branchTestString(Condition cond, const ValueOperand& value, Label* label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); inline void branchTestSymbol(Condition cond, const Address& address, Label* label) PER_SHARED_ARCH; @@ -1833,7 +1839,7 @@ class MacroAssembler : public MacroAssemblerSpecific { Label* label) PER_SHARED_ARCH; inline void branchTestSymbol(Condition cond, const ValueOperand& value, Label* label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); inline void branchTestBigInt(Condition cond, const Address& address, Label* label) PER_SHARED_ARCH; @@ -1841,7 +1847,7 @@ class MacroAssembler : public MacroAssemblerSpecific { Label* label) PER_SHARED_ARCH; inline void branchTestBigInt(Condition cond, const ValueOperand& value, Label* label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); inline void branchTestNull(Condition cond, const Address& address, Label* label) PER_SHARED_ARCH; @@ -1849,7 +1855,7 @@ class MacroAssembler : public MacroAssemblerSpecific { Label* label) PER_SHARED_ARCH; inline void branchTestNull(Condition cond, const ValueOperand& value, Label* label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); // Clobbers the ScratchReg on x64. inline void branchTestObject(Condition cond, const Address& address, @@ -1858,7 +1864,7 @@ class MacroAssembler : public MacroAssemblerSpecific { Label* label) PER_SHARED_ARCH; inline void branchTestObject(Condition cond, const ValueOperand& value, Label* label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); inline void branchTestGCThing(Condition cond, const Address& address, Label* label) PER_SHARED_ARCH; @@ -1869,7 +1875,7 @@ class MacroAssembler : public MacroAssemblerSpecific { inline void branchTestPrimitive(Condition cond, const ValueOperand& value, Label* label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); inline void branchTestMagic(Condition cond, const Address& address, Label* label) PER_SHARED_ARCH; @@ -1878,7 +1884,7 @@ class MacroAssembler : public MacroAssemblerSpecific { template inline void branchTestMagic(Condition cond, const ValueOperand& value, L label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); inline void branchTestMagic(Condition cond, const Address& valaddr, JSWhyMagic why, Label* label) PER_ARCH; @@ -1896,17 +1902,17 @@ class MacroAssembler : public MacroAssemblerSpecific { // The type of the value should match the type of the method. inline void branchTestInt32Truthy(bool truthy, const ValueOperand& value, Label* label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, wasm32); inline void branchTestDoubleTruthy(bool truthy, FloatRegister reg, Label* label) PER_SHARED_ARCH; inline void branchTestBooleanTruthy(bool truthy, const ValueOperand& value, Label* label) PER_ARCH; inline void branchTestStringTruthy(bool truthy, const ValueOperand& value, Label* label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); inline void branchTestBigIntTruthy(bool truthy, const ValueOperand& value, Label* label) - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared); // Create an unconditional branch to the address given as argument. inline void branchToComputedAddress(const BaseIndex& address) PER_ARCH; @@ -2008,11 +2014,11 @@ class MacroAssembler : public MacroAssemblerSpecific { inline void cmp32Move32(Condition cond, Register lhs, Register rhs, Register src, Register dest) - DEFINED_ON(arm, arm64, loong64, mips_shared, x86_shared); + DEFINED_ON(arm, arm64, loong64, wasm32, mips_shared, x86_shared); inline void cmp32Move32(Condition cond, Register lhs, const Address& rhs, Register src, Register dest) - DEFINED_ON(arm, arm64, loong64, mips_shared, x86_shared); + DEFINED_ON(arm, arm64, loong64, wasm32, mips_shared, x86_shared); inline void cmpPtrMovePtr(Condition cond, Register lhs, Register rhs, Register src, Register dest) PER_ARCH; @@ -2030,28 +2036,28 @@ class MacroAssembler : public MacroAssemblerSpecific { inline void cmp32LoadPtr(Condition cond, const Address& lhs, Imm32 rhs, const Address& src, Register dest) - DEFINED_ON(arm, arm64, loong64, mips_shared, x86, x64); + DEFINED_ON(arm, arm64, loong64, wasm32, mips_shared, x86, x64); inline void cmp32MovePtr(Condition cond, Register lhs, Imm32 rhs, Register src, Register dest) - DEFINED_ON(arm, arm64, loong64, mips_shared, x86, x64); + DEFINED_ON(arm, arm64, loong64, wasm32, mips_shared, x86, x64); inline void test32LoadPtr(Condition cond, const Address& addr, Imm32 mask, const Address& src, Register dest) - DEFINED_ON(arm, arm64, loong64, mips_shared, x86, x64); + DEFINED_ON(arm, arm64, loong64, wasm32, mips_shared, x86, x64); inline void test32MovePtr(Condition cond, const Address& addr, Imm32 mask, Register src, Register dest) - DEFINED_ON(arm, arm64, loong64, mips_shared, x86, x64); + DEFINED_ON(arm, arm64, loong64, wasm32, mips_shared, x86, x64); // Conditional move for Spectre mitigations. inline void spectreMovePtr(Condition cond, Register src, Register dest) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); // Zeroes dest if the condition is true. inline void spectreZeroRegister(Condition cond, Register scratch, Register dest) - DEFINED_ON(arm, arm64, mips_shared, x86_shared, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86_shared, loong64, wasm32); // Performs a bounds check and zeroes the index register if out-of-bounds // (to mitigate Spectre). @@ -2063,17 +2069,17 @@ class MacroAssembler : public MacroAssemblerSpecific { public: inline void spectreBoundsCheck32(Register index, Register length, Register maybeScratch, Label* failure) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); inline void spectreBoundsCheck32(Register index, const Address& length, Register maybeScratch, Label* failure) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); inline void spectreBoundsCheckPtr(Register index, Register length, Register maybeScratch, Label* failure) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); inline void spectreBoundsCheckPtr(Register index, const Address& length, Register maybeScratch, Label* failure) - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32); // ======================================================================== // Canonicalization primitives. @@ -2087,10 +2093,10 @@ class MacroAssembler : public MacroAssemblerSpecific { // ======================================================================== // Memory access primitives. inline void storeUncanonicalizedDouble(FloatRegister src, const Address& dest) - DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64); + DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, wasm32); inline void storeUncanonicalizedDouble(FloatRegister src, const BaseIndex& dest) - DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64); + DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, wasm32); inline void storeUncanonicalizedDouble(FloatRegister src, const Operand& dest) DEFINED_ON(x86_shared); @@ -2104,10 +2110,10 @@ class MacroAssembler : public MacroAssemblerSpecific { inline void storeUncanonicalizedFloat32(FloatRegister src, const Address& dest) - DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64); + DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, wasm32); inline void storeUncanonicalizedFloat32(FloatRegister src, const BaseIndex& dest) - DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64); + DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, wasm32); inline void storeUncanonicalizedFloat32(FloatRegister src, const Operand& dest) DEFINED_ON(x86_shared); @@ -3508,10 +3514,10 @@ class MacroAssembler : public MacroAssemblerSpecific { // temp required on x86 and x64; must be undefined on mips64 and loong64. void convertUInt64ToFloat32(Register64 src, FloatRegister dest, Register temp) - DEFINED_ON(arm64, mips64, loong64, x64, x86); + DEFINED_ON(arm64, mips64, loong64, wasm32, x64, x86); void convertInt64ToFloat32(Register64 src, FloatRegister dest) - DEFINED_ON(arm64, mips64, loong64, x64, x86); + DEFINED_ON(arm64, mips64, loong64, wasm32, x64, x86); bool convertUInt64ToDoubleNeedsTemp() PER_ARCH; @@ -3563,19 +3569,19 @@ class MacroAssembler : public MacroAssemblerSpecific { void wasmBoundsCheck32(Condition cond, Register index, Register boundsCheckLimit, Label* ok) - DEFINED_ON(arm, arm64, mips32, mips64, x86_shared, loong64); + DEFINED_ON(arm, arm64, mips32, mips64, x86_shared, loong64, wasm32); void wasmBoundsCheck32(Condition cond, Register index, Address boundsCheckLimit, Label* ok) - DEFINED_ON(arm, arm64, mips32, mips64, x86_shared, loong64); + DEFINED_ON(arm, arm64, mips32, mips64, x86_shared, loong64, wasm32); void wasmBoundsCheck64(Condition cond, Register64 index, Register64 boundsCheckLimit, Label* ok) - DEFINED_ON(arm64, mips64, x64, x86, arm, loong64); + DEFINED_ON(arm64, mips64, x64, x86, arm, loong64, wasm32); void wasmBoundsCheck64(Condition cond, Register64 index, Address boundsCheckLimit, Label* ok) - DEFINED_ON(arm64, mips64, x64, x86, arm, loong64); + DEFINED_ON(arm64, mips64, x64, x86, arm, loong64, wasm32); // Each wasm load/store instruction appends its own wasm::Trap::OutOfBounds. void wasmLoad(const wasm::MemoryAccessDesc& access, Operand srcAddr, @@ -3668,7 +3674,7 @@ class MacroAssembler : public MacroAssemblerSpecific { void oolWasmTruncateCheckF64ToI32(FloatRegister input, Register output, TruncFlags flags, wasm::BytecodeOffset off, Label* rejoin) - DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64); + DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, wasm32); void wasmTruncateFloat32ToUInt32(FloatRegister input, Register output, bool isSaturating, Label* oolEntry) PER_ARCH; @@ -3678,35 +3684,35 @@ class MacroAssembler : public MacroAssemblerSpecific { void oolWasmTruncateCheckF32ToI32(FloatRegister input, Register output, TruncFlags flags, wasm::BytecodeOffset off, Label* rejoin) - DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64); + DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, wasm32); // The truncate-to-int64 methods will always bind the `oolRejoin` label // after the last emitted instruction. void wasmTruncateDoubleToInt64(FloatRegister input, Register64 output, bool isSaturating, Label* oolEntry, Label* oolRejoin, FloatRegister tempDouble) - DEFINED_ON(arm64, x86, x64, mips64, loong64); + DEFINED_ON(arm64, x86, x64, mips64, loong64, wasm32); void wasmTruncateDoubleToUInt64(FloatRegister input, Register64 output, bool isSaturating, Label* oolEntry, Label* oolRejoin, FloatRegister tempDouble) - DEFINED_ON(arm64, x86, x64, mips64, loong64); + DEFINED_ON(arm64, x86, x64, mips64, loong64, wasm32); void oolWasmTruncateCheckF64ToI64(FloatRegister input, Register64 output, TruncFlags flags, wasm::BytecodeOffset off, Label* rejoin) - DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64); + DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, wasm32); void wasmTruncateFloat32ToInt64(FloatRegister input, Register64 output, bool isSaturating, Label* oolEntry, Label* oolRejoin, FloatRegister tempDouble) - DEFINED_ON(arm64, x86, x64, mips64, loong64); + DEFINED_ON(arm64, x86, x64, mips64, loong64, wasm32); void wasmTruncateFloat32ToUInt64(FloatRegister input, Register64 output, bool isSaturating, Label* oolEntry, Label* oolRejoin, FloatRegister tempDouble) - DEFINED_ON(arm64, x86, x64, mips64, loong64); + DEFINED_ON(arm64, x86, x64, mips64, loong64, wasm32); void oolWasmTruncateCheckF32ToI64(FloatRegister input, Register64 output, TruncFlags flags, wasm::BytecodeOffset off, Label* rejoin) - DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64); + DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, wasm32); void loadWasmGlobalPtr(uint32_t globalDataOffset, Register dest); @@ -4117,11 +4123,11 @@ class MacroAssembler : public MacroAssemblerSpecific { void wasmAtomicLoad64(const wasm::MemoryAccessDesc& access, const Address& mem, Register64 temp, Register64 output) - DEFINED_ON(arm, mips32, x86); + DEFINED_ON(arm, mips32, x86, wasm32); void wasmAtomicLoad64(const wasm::MemoryAccessDesc& access, const BaseIndex& mem, Register64 temp, - Register64 output) DEFINED_ON(arm, mips32, x86); + Register64 output) DEFINED_ON(arm, mips32, x86, wasm32); // x86: `expected` must be the same as `output`, and must be edx:eax. // x86: `replacement` must be ecx:ebx. @@ -5006,7 +5012,7 @@ class MacroAssembler : public MacroAssemblerSpecific { inline void addStackPtrTo(T t); void subFromStackPtr(Imm32 imm32) - DEFINED_ON(mips32, mips64, loong64, arm, x86, x64); + DEFINED_ON(mips32, mips64, loong64, wasm32, arm, x86, x64); void subFromStackPtr(Register reg); template diff --git a/js/src/jit/MoveEmitter.h b/js/src/jit/MoveEmitter.h index a51cbc100a47..a661fd75b786 100644 --- a/js/src/jit/MoveEmitter.h +++ b/js/src/jit/MoveEmitter.h @@ -19,6 +19,8 @@ # include "jit/mips64/MoveEmitter-mips64.h" #elif defined(JS_CODEGEN_LOONG64) # include "jit/loong64/MoveEmitter-loong64.h" +#elif defined(JS_CODEGEN_WASM32) +# include "jit/wasm32/MoveEmitter-wasm32.h" #elif defined(JS_CODEGEN_NONE) # include "jit/none/MoveEmitter-none.h" #else diff --git a/js/src/jit/ProcessExecutableMemory.cpp b/js/src/jit/ProcessExecutableMemory.cpp index 5ea4b2e4ca5b..79fdbc9aa9d1 100644 --- a/js/src/jit/ProcessExecutableMemory.cpp +++ b/js/src/jit/ProcessExecutableMemory.cpp @@ -32,7 +32,11 @@ # include "mozilla/StackWalk_windows.h" # include "mozilla/WindowsVersion.h" #elif defined(__wasi__) +# if defined(JS_CODEGEN_WASM32) +# include +# else // Nothing. +# endif #else # include # include @@ -324,6 +328,23 @@ static void DecommitPages(void* addr, size_t bytes) { } } #elif defined(__wasi__) +# if defined(JS_CODEGEN_WASM32) +static void* ReserveProcessExecutableMemory(size_t bytes) { + return malloc(bytes); +} + +static void DeallocateProcessExecutableMemory(void* addr, size_t bytes) { + free(addr); +} + +[[nodiscard]] static bool CommitPages(void* addr, size_t bytes, + ProtectionSetting protection) { + return true; +} + +static void DecommitPages(void* addr, size_t bytes) {} + +# else static void* ReserveProcessExecutableMemory(size_t bytes) { MOZ_CRASH("NYI for WASI."); return nullptr; @@ -339,6 +360,7 @@ static void DeallocateProcessExecutableMemory(void* addr, size_t bytes) { static void DecommitPages(void* addr, size_t bytes) { MOZ_CRASH("NYI for WASI."); } +# endif #else // !XP_WIN && !__wasi__ # ifndef MAP_NORESERVE # define MAP_NORESERVE 0 @@ -748,6 +770,10 @@ bool js::jit::AddressIsInExecutableMemory(const void* p) { bool js::jit::ReprotectRegion(void* start, size_t size, ProtectionSetting protection, MustFlushICache flushICache) { +#if defined(JS_CODEGEN_WASM32) + return true; +#endif + // Flush ICache when making code executable, before we modify |size|. if (flushICache == MustFlushICache::LocalThreadOnly || flushICache == MustFlushICache::AllThreads) { diff --git a/js/src/jit/Registers.h b/js/src/jit/Registers.h index 2c1cec07715a..c384d6ccf45a 100644 --- a/js/src/jit/Registers.h +++ b/js/src/jit/Registers.h @@ -22,6 +22,8 @@ # include "jit/mips64/Architecture-mips64.h" #elif defined(JS_CODEGEN_LOONG64) # include "jit/loong64/Architecture-loong64.h" +#elif defined(JS_CODEGEN_WASM32) +# include "jit/wasm32/Architecture-wasm32.h" #elif defined(JS_CODEGEN_NONE) # include "jit/none/Architecture-none.h" #else diff --git a/js/src/jit/SharedICHelpers-inl.h b/js/src/jit/SharedICHelpers-inl.h index 60a77956f00d..ee257283ca53 100644 --- a/js/src/jit/SharedICHelpers-inl.h +++ b/js/src/jit/SharedICHelpers-inl.h @@ -19,6 +19,8 @@ # include "jit/mips-shared/SharedICHelpers-mips-shared-inl.h" #elif defined(JS_CODEGEN_LOONG64) # include "jit/loong64/SharedICHelpers-loong64-inl.h" +#elif defined(JS_CODEGEN_WASM32) +# include "jit/wasm32/SharedICHelpers-wasm32-inl.h" #elif defined(JS_CODEGEN_NONE) # include "jit/none/SharedICHelpers-none-inl.h" #else diff --git a/js/src/jit/SharedICHelpers.h b/js/src/jit/SharedICHelpers.h index da8378ebae0c..95da74f4ca9b 100644 --- a/js/src/jit/SharedICHelpers.h +++ b/js/src/jit/SharedICHelpers.h @@ -19,6 +19,8 @@ # include "jit/mips-shared/SharedICHelpers-mips-shared.h" #elif defined(JS_CODEGEN_LOONG64) # include "jit/loong64/SharedICHelpers-loong64.h" +#elif defined(JS_CODEGEN_WASM32) +# include "jit/wasm32/SharedICHelpers-wasm32.h" #elif defined(JS_CODEGEN_NONE) # include "jit/none/SharedICHelpers-none.h" #else diff --git a/js/src/jit/SharedICRegisters.h b/js/src/jit/SharedICRegisters.h index e29f21c28d09..9905e6728d53 100644 --- a/js/src/jit/SharedICRegisters.h +++ b/js/src/jit/SharedICRegisters.h @@ -21,6 +21,8 @@ # include "jit/mips64/SharedICRegisters-mips64.h" #elif defined(JS_CODEGEN_LOONG64) # include "jit/loong64/SharedICRegisters-loong64.h" +#elif defined(JS_CODEGEN_WASM32) +# include "jit/wasm32/SharedICRegisters-wasm32.h" #elif defined(JS_CODEGEN_NONE) # include "jit/none/SharedICRegisters-none.h" #else diff --git a/js/src/jit/moz.build b/js/src/jit/moz.build index 967146e32f9d..da7fd6d0c907 100644 --- a/js/src/jit/moz.build +++ b/js/src/jit/moz.build @@ -224,7 +224,12 @@ elif CONFIG["JS_CODEGEN_LOONG64"]: ] if CONFIG["JS_SIMULATOR_LOONG64"]: UNIFIED_SOURCES += ["loong64/Simulator-loong64.cpp"] - +elif CONFIG["JS_CODEGEN_WASM32"]: + UNIFIED_SOURCES += [ + "wasm32/CodeGenerator-wasm32.cpp", + "wasm32/MacroAssembler-wasm32.cpp", + "wasm32/Trampoline-wasm32.cpp", + ] # Generate jit/MIROpsGenerated.h from jit/MIROps.yaml GeneratedFile( diff --git a/js/src/jit/shared/Assembler-shared.h b/js/src/jit/shared/Assembler-shared.h index fcabddd98b61..5a478f1e1601 100644 --- a/js/src/jit/shared/Assembler-shared.h +++ b/js/src/jit/shared/Assembler-shared.h @@ -26,7 +26,7 @@ #if defined(JS_CODEGEN_ARM) || defined(JS_CODEGEN_ARM64) || \ defined(JS_CODEGEN_MIPS32) || defined(JS_CODEGEN_MIPS64) || \ - defined(JS_CODEGEN_LOONG64) + defined(JS_CODEGEN_LOONG64) || defined(JS_CODEGEN_WASM32) // Push return addresses callee-side. # define JS_USE_LINK_REGISTER #endif diff --git a/js/src/jit/wasm32/Architecture-wasm32.h b/js/src/jit/wasm32/Architecture-wasm32.h new file mode 100644 index 000000000000..ded86dca2395 --- /dev/null +++ b/js/src/jit/wasm32/Architecture-wasm32.h @@ -0,0 +1,175 @@ +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- + * vim: set ts=8 sts=2 et sw=2 tw=80: + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v. 2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ + +#ifndef jit_wasm32_Architecture_wasm32_h +#define jit_wasm32_Architecture_wasm32_h + +// JitSpewer.h is included through MacroAssembler implementations for other +// platforms, so include it here to avoid inadvertent build bustage. +#include "jit/JitSpewer.h" + +#include "jit/shared/Architecture-shared.h" + +namespace js::jit { + +static const uint32_t SimdMemoryAlignment = + 4; // Make it 4 to avoid a bunch of div-by-zero warnings +static const uint32_t WasmStackAlignment = 8; +static const uint32_t WasmTrapInstructionLength = 0; + +// See comments in wasm::GenerateFunctionPrologue. +static constexpr uint32_t WasmCheckedCallEntryOffset = 0u; +static constexpr uint32_t WasmCheckedTailEntryOffset = 1u; + +class Registers { + public: + enum RegisterID { + sp = 0, // corresponds to global __stack_pointer which is mapped into + // global[0] + fp = 1, + r2 = 2, + r3 = 3, + invalid_reg, + invalid_reg2, // To avoid silly static_assert failures. + }; + typedef uint8_t Code; + typedef RegisterID Encoding; + union RegisterContent { + uintptr_t r; + }; + + typedef uint8_t SetType; + + static uint32_t SetSize(SetType) { MOZ_CRASH(); } + static uint32_t FirstBit(SetType) { MOZ_CRASH(); } + static uint32_t LastBit(SetType) { MOZ_CRASH(); } + static const char* GetName(Code) { MOZ_CRASH(); } + static Code FromName(const char*) { MOZ_CRASH(); } + + static const Encoding StackPointer = RegisterID::sp; + static const Encoding FramePointer = RegisterID::fp; + static const Encoding Invalid = invalid_reg; + static const uint32_t Total = 5; + static const uint32_t TotalPhys = 0; + static const uint32_t Allocatable = 0; + static const SetType AllMask = 0; + static const SetType ArgRegMask = 0; + static const SetType VolatileMask = 0; + static const SetType NonVolatileMask = 0; + static const SetType NonAllocatableMask = 0; + static const SetType AllocatableMask = 0; + static const SetType JSCallMask = 0; + static const SetType CallMask = 0; +}; + +typedef uint8_t PackedRegisterMask; + +class FloatRegisters { + public: + enum FPRegisterID { f0 = 0, invalid_reg }; + typedef FPRegisterID Code; + typedef FPRegisterID Encoding; + union RegisterContent { + float s; + double d; + }; + + typedef uint32_t SetType; + + static const char* GetName(Code) { MOZ_CRASH(); } + static Code FromName(const char*) { MOZ_CRASH(); } + + static const Code Invalid = invalid_reg; + static const uint32_t Total = 0; + static const uint32_t TotalPhys = 0; + static const uint32_t Allocatable = 0; + static const SetType AllMask = 0; + static const SetType AllDoubleMask = 0; + static const SetType AllSingleMask = 0; + static const SetType VolatileMask = 0; + static const SetType NonVolatileMask = 0; + static const SetType NonAllocatableMask = 0; + static const SetType AllocatableMask = 0; +}; + +template +class TypedRegisterSet; + +struct FloatRegister { + typedef FloatRegisters Codes; + typedef Codes::Code Code; + typedef Codes::Encoding Encoding; + typedef Codes::SetType SetType; + + Code _; + + static uint32_t FirstBit(SetType) { MOZ_CRASH(); } + static uint32_t LastBit(SetType) { MOZ_CRASH(); } + static FloatRegister FromCode(uint32_t) { MOZ_CRASH(); } + bool isSingle() const { MOZ_CRASH(); } + bool isDouble() const { MOZ_CRASH(); } + bool isSimd128() const { MOZ_CRASH(); } + bool isInvalid() const { MOZ_CRASH(); } + FloatRegister asSingle() const { MOZ_CRASH(); } + FloatRegister asDouble() const { MOZ_CRASH(); } + FloatRegister asSimd128() const { MOZ_CRASH(); } + Code code() const { MOZ_CRASH(); } + Encoding encoding() const { MOZ_CRASH(); } + const char* name() const { MOZ_CRASH(); } + bool volatile_() const { MOZ_CRASH(); } + bool operator!=(FloatRegister) const { MOZ_CRASH(); } + bool operator==(FloatRegister) const { MOZ_CRASH(); } + bool aliases(FloatRegister) const { MOZ_CRASH(); } + uint32_t numAliased() const { MOZ_CRASH(); } + FloatRegister aliased(uint32_t) { MOZ_CRASH(); } + bool equiv(FloatRegister) const { MOZ_CRASH(); } + uint32_t size() const { MOZ_CRASH(); } + uint32_t numAlignedAliased() const { MOZ_CRASH(); } + FloatRegister alignedAliased(uint32_t) { MOZ_CRASH(); } + SetType alignedOrDominatedAliasedSet() const { MOZ_CRASH(); } + + static constexpr RegTypeName DefaultType = RegTypeName::Float64; + + template + static SetType LiveAsIndexableSet(SetType s) { + return SetType(0); + } + + template + static SetType AllocatableAsIndexableSet(SetType s) { + static_assert(Name != RegTypeName::Any, "Allocatable set are not iterable"); + return SetType(0); + } + + template + static T ReduceSetForPush(T) { + MOZ_CRASH(); + } + uint32_t getRegisterDumpOffsetInBytes() { MOZ_CRASH(); } + static uint32_t SetSize(SetType x) { MOZ_CRASH(); } + static Code FromName(const char* name) { MOZ_CRASH(); } + + // This is used in static initializers, so produce a bogus value instead of + // crashing. + static uint32_t GetPushSizeInBytes(const TypedRegisterSet&) { + return 0; + } +}; + +inline bool hasUnaliasedDouble() { MOZ_CRASH(); } +inline bool hasMultiAlias() { MOZ_CRASH(); } + +static const uint32_t ShadowStackSpace = 0; +static const uint32_t JumpImmediateRange = INT32_MAX; + +#ifdef JS_NUNBOX32 +static const int32_t NUNBOX32_TYPE_OFFSET = 4; +static const int32_t NUNBOX32_PAYLOAD_OFFSET = 0; +#endif + +} // namespace js::jit + +#endif /* jit_wasm32_Architecture_wasm32_h */ diff --git a/js/src/jit/wasm32/Assembler-wasm32.h b/js/src/jit/wasm32/Assembler-wasm32.h new file mode 100644 index 000000000000..a99d3e1aafda --- /dev/null +++ b/js/src/jit/wasm32/Assembler-wasm32.h @@ -0,0 +1,225 @@ +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- + * vim: set ts=8 sts=2 et sw=2 tw=80: + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v. 2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ + +#ifndef jit_wasm32_Assembler_wasm32_h +#define jit_wasm32_Assembler_wasm32_h + +#include "mozilla/Assertions.h" + +#include + +#include "jit/Registers.h" +#include "jit/RegisterSets.h" +#include "jit/shared/Assembler-shared.h" +#include "jit/wasm32/Architecture-wasm32.h" +#include "js/Value.h" + +namespace js::jit { + +struct ImmTag : public Imm32 { + explicit ImmTag(JSValueTag mask) : Imm32(int32_t(mask)) {} +}; + +struct ImmType : public ImmTag { + explicit ImmType(JSValueType type) : ImmTag(JSVAL_TYPE_TO_TAG(type)) {} +}; + +class MacroAssembler; + +static constexpr Register StackPointer{Registers::StackPointer}; +static constexpr Register FramePointer{Registers::FramePointer}; + +static constexpr Register ReturnReg{Registers::invalid_reg2}; +static constexpr FloatRegister ReturnFloat32Reg = {FloatRegisters::invalid_reg}; +static constexpr FloatRegister ReturnDoubleReg = {FloatRegisters::invalid_reg}; +static constexpr FloatRegister ReturnSimd128Reg = {FloatRegisters::invalid_reg}; +static constexpr FloatRegister ScratchSimd128Reg = { + FloatRegisters::invalid_reg}; +static constexpr FloatRegister InvalidFloatReg = {FloatRegisters::invalid_reg}; + +struct ScratchFloat32Scope : FloatRegister { + explicit ScratchFloat32Scope(MacroAssembler& masm) {} +}; + +struct ScratchDoubleScope : FloatRegister { + explicit ScratchDoubleScope(MacroAssembler& masm) {} +}; + +static constexpr Register OsrFrameReg{Registers::invalid_reg}; +static constexpr Register PreBarrierReg{Registers::invalid_reg}; +static constexpr Register InterpreterPCReg{Registers::invalid_reg}; +static constexpr Register CallTempReg0{Registers::invalid_reg}; +static constexpr Register CallTempReg1{Registers::invalid_reg}; +static constexpr Register CallTempReg2{Registers::invalid_reg}; +static constexpr Register CallTempReg3{Registers::invalid_reg}; +static constexpr Register CallTempReg4{Registers::invalid_reg}; +static constexpr Register CallTempReg5{Registers::invalid_reg}; +static constexpr Register InvalidReg{Registers::invalid_reg}; +static constexpr Register CallTempNonArgRegs[] = {InvalidReg, InvalidReg}; +static const uint32_t NumCallTempNonArgRegs = std::size(CallTempNonArgRegs); + +static constexpr Register IntArgReg0{Registers::invalid_reg}; +static constexpr Register IntArgReg1{Registers::invalid_reg}; +static constexpr Register IntArgReg2{Registers::invalid_reg}; +static constexpr Register IntArgReg3{Registers::invalid_reg}; +static constexpr Register HeapReg{Registers::invalid_reg}; + +static constexpr Register RegExpTesterRegExpReg{Registers::invalid_reg}; +static constexpr Register RegExpTesterStringReg{Registers::invalid_reg}; +static constexpr Register RegExpTesterLastIndexReg{Registers::invalid_reg}; +static constexpr Register RegExpTesterStickyReg{Registers::invalid_reg}; + +static constexpr Register RegExpMatcherRegExpReg{Registers::invalid_reg}; +static constexpr Register RegExpMatcherStringReg{Registers::invalid_reg}; +static constexpr Register RegExpMatcherLastIndexReg{Registers::invalid_reg}; +static constexpr Register RegExpMatcherStickyReg{Registers::invalid_reg}; + +// Uses |invalid_reg2| to avoid static_assert failures. +static constexpr Register JSReturnReg_Type{Registers::invalid_reg2}; +static constexpr Register JSReturnReg_Data{Registers::invalid_reg2}; +static constexpr Register JSReturnReg{Registers::invalid_reg2}; + +#if defined(JS_NUNBOX32) +static constexpr ValueOperand JSReturnOperand(Register{Registers::r2}, + Register{Registers::r3}); +static constexpr Register64 ReturnReg64(InvalidReg, InvalidReg); +#elif defined(JS_PUNBOX64) +static constexpr ValueOperand JSReturnOperand(InvalidReg); +static constexpr Register64 ReturnReg64(InvalidReg); +#else +# error "Bad architecture" +#endif + +static constexpr Register ABINonArgReg0{Registers::invalid_reg}; +static constexpr Register ABINonArgReg1{Registers::invalid_reg}; +static constexpr Register ABINonArgReg2{Registers::invalid_reg}; +static constexpr Register ABINonArgReg3{Registers::invalid_reg}; +static constexpr Register ABINonArgReturnReg0{Registers::invalid_reg}; +static constexpr Register ABINonArgReturnReg1{Registers::invalid_reg}; +static constexpr Register ABINonVolatileReg{Registers::invalid_reg}; +static constexpr Register ABINonArgReturnVolatileReg{Registers::invalid_reg}; + +static constexpr FloatRegister ABINonArgDoubleReg = { + FloatRegisters::invalid_reg}; + +static constexpr Register WasmTableCallScratchReg0{Registers::invalid_reg}; +static constexpr Register WasmTableCallScratchReg1{Registers::invalid_reg}; +static constexpr Register WasmTableCallSigReg{Registers::invalid_reg}; +static constexpr Register WasmTableCallIndexReg{Registers::invalid_reg}; +static constexpr Register InstanceReg{Registers::invalid_reg}; +static constexpr Register WasmJitEntryReturnScratch{Registers::invalid_reg}; + +static constexpr uint32_t ABIStackAlignment = 4; +static constexpr uint32_t CodeAlignment = 16; +static constexpr uint32_t JitStackAlignment = 8; +static constexpr uint32_t JitStackValueAlignment = + JitStackAlignment / sizeof(Value); + +static const Scale ScalePointer = TimesOne; + +static constexpr uint32_t Int32SizeLog2 = 2; + +struct MemoryArgument { + uint32_t align; + uint32_t offset; +}; + +class AssemblerWasm32 : public AssemblerShared {}; + +class Assembler : public AssemblerWasm32 { + public: + enum Condition { + Equal, + NotEqual, + Above, + AboveOrEqual, + Below, + BelowOrEqual, + GreaterThan, + GreaterThanOrEqual, + LessThan, + LessThanOrEqual, + Overflow, + CarrySet, + CarryClear, + Signed, + NotSigned, + Zero, + NonZero, + Always, + }; + + enum DoubleCondition { + DoubleOrdered, + DoubleEqual, + DoubleNotEqual, + DoubleGreaterThan, + DoubleGreaterThanOrEqual, + DoubleLessThan, + DoubleLessThanOrEqual, + DoubleUnordered, + DoubleEqualOrUnordered, + DoubleNotEqualOrUnordered, + DoubleGreaterThanOrUnordered, + DoubleGreaterThanOrEqualOrUnordered, + DoubleLessThanOrUnordered, + DoubleLessThanOrEqualOrUnordered + }; + + static Condition InvertCondition(Condition) { MOZ_CRASH(); } + + static DoubleCondition InvertCondition(DoubleCondition) { MOZ_CRASH(); } + + template + static void PatchDataWithValueCheck(CodeLocationLabel, T, S) { + MOZ_CRASH(); + } + static void PatchWrite_Imm32(CodeLocationLabel, Imm32) { MOZ_CRASH(); } + + static void PatchWrite_NearCall(CodeLocationLabel, CodeLocationLabel) { + MOZ_CRASH(); + } + static uint32_t PatchWrite_NearCallSize() { MOZ_CRASH(); } + + static void ToggleToJmp(CodeLocationLabel) { MOZ_CRASH(); } + static void ToggleToCmp(CodeLocationLabel) { MOZ_CRASH(); } + static void ToggleCall(CodeLocationLabel, bool) { MOZ_CRASH(); } + + static void Bind(uint8_t*, const CodeLabel&) { MOZ_CRASH(); } + + static uintptr_t GetPointer(uint8_t*) { MOZ_CRASH(); } + + static bool HasRoundInstruction(RoundingMode) { return false; } + + void verifyHeapAccessDisassembly(uint32_t begin, uint32_t end, + const Disassembler::HeapAccess& heapAccess) { + MOZ_CRASH(); + } + + void setUnlimitedBuffer() { MOZ_CRASH(); } +}; + +class Operand { + public: + explicit Operand(const Address&) { MOZ_CRASH(); } + explicit Operand(const Register) { MOZ_CRASH(); } + explicit Operand(const FloatRegister) { MOZ_CRASH(); } + explicit Operand(Register, Imm32) { MOZ_CRASH(); } + explicit Operand(Register, int32_t) { MOZ_CRASH(); } +}; + +class ABIArgGenerator { + public: + ABIArgGenerator() = default; + ABIArg next(MIRType) { MOZ_CRASH(); } + ABIArg& current() { MOZ_CRASH(); } + uint32_t stackBytesConsumedSoFar() const { MOZ_CRASH(); } + void increaseStackOffset(uint32_t) { MOZ_CRASH(); } +}; + +} // namespace js::jit + +#endif /* jit_wasm32_Assembler_wasm32_h */ diff --git a/js/src/jit/wasm32/CodeGenerator-wasm32.cpp b/js/src/jit/wasm32/CodeGenerator-wasm32.cpp new file mode 100644 index 000000000000..5535eed21dc3 --- /dev/null +++ b/js/src/jit/wasm32/CodeGenerator-wasm32.cpp @@ -0,0 +1,254 @@ +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- + * vim: set ts=8 sts=2 et sw=2 tw=80: + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v. 2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ + +#include "jit/wasm32/CodeGenerator-wasm32.h" + +#include "jit/CodeGenerator.h" + +using namespace js::jit; + +void CodeGenerator::visitDouble(LDouble*) { MOZ_CRASH(); } +void CodeGenerator::visitFloat32(LFloat32* ins) { MOZ_CRASH(); } +void CodeGenerator::visitValue(LValue* value) { MOZ_CRASH(); } +void CodeGenerator::visitWasmReinterpret(LWasmReinterpret* lir) { MOZ_CRASH(); } +void CodeGenerator::visitWasmReinterpretFromI64(LWasmReinterpretFromI64* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmReinterpretToI64(LWasmReinterpretToI64* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitRotateI64(LRotateI64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitTestIAndBranch(LTestIAndBranch* test) { MOZ_CRASH(); } +void CodeGenerator::visitTestI64AndBranch(LTestI64AndBranch* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitTestDAndBranch(LTestDAndBranch* test) { MOZ_CRASH(); } +void CodeGenerator::visitTestFAndBranch(LTestFAndBranch* test) { MOZ_CRASH(); } +void CodeGenerator::visitCompare(LCompare* comp) { MOZ_CRASH(); } +void CodeGenerator::visitCompareI64(LCompareI64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitCompareI64AndBranch(LCompareI64AndBranch* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitCompareAndBranch(LCompareAndBranch* comp) { + MOZ_CRASH(); +} +void CodeGenerator::visitCompareD(LCompareD* comp) { MOZ_CRASH(); } +void CodeGenerator::visitCompareF(LCompareF* comp) { MOZ_CRASH(); } +void CodeGenerator::visitCompareDAndBranch(LCompareDAndBranch* comp) { + MOZ_CRASH(); +} +void CodeGenerator::visitCompareFAndBranch(LCompareFAndBranch* comp) { + MOZ_CRASH(); +} +void CodeGenerator::visitBitAndAndBranch(LBitAndAndBranch* lir) { MOZ_CRASH(); } +void CodeGenerator::visitNotI(LNotI* ins) { MOZ_CRASH(); } +void CodeGenerator::visitNotI64(LNotI64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitNotD(LNotD* ins) { MOZ_CRASH(); } +void CodeGenerator::visitNotF(LNotF* ins) { MOZ_CRASH(); } +void CodeGenerator::visitBitNotI(LBitNotI* ins) { MOZ_CRASH(); } +void CodeGenerator::visitBitNotI64(LBitNotI64* ins) { MOZ_CRASH(); } +void CodeGenerator::visitBitOpI(LBitOpI* ins) { MOZ_CRASH(); } +void CodeGenerator::visitBitOpI64(LBitOpI64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitShiftI(LShiftI* ins) { MOZ_CRASH(); } +void CodeGenerator::visitShiftI64(LShiftI64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitSignExtendInt64(LSignExtendInt64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitUrshD(LUrshD* ins) { MOZ_CRASH(); } +void CodeGenerator::visitMinMaxD(LMinMaxD* ins) { MOZ_CRASH(); } +void CodeGenerator::visitMinMaxF(LMinMaxF* ins) { MOZ_CRASH(); } +void CodeGenerator::visitNegI(LNegI* ins) { MOZ_CRASH(); } +void CodeGenerator::visitNegI64(LNegI64* ins) { MOZ_CRASH(); } +void CodeGenerator::visitNegD(LNegD* ins) { MOZ_CRASH(); } +void CodeGenerator::visitNegF(LNegF* ins) { MOZ_CRASH(); } +void CodeGenerator::visitCopySignD(LCopySignD* ins) { MOZ_CRASH(); } +void CodeGenerator::visitCopySignF(LCopySignF* ins) { MOZ_CRASH(); } +void CodeGenerator::visitClzI(LClzI* ins) { MOZ_CRASH(); } +void CodeGenerator::visitClzI64(LClzI64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitCtzI(LCtzI* ins) { MOZ_CRASH(); } +void CodeGenerator::visitCtzI64(LCtzI64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitPopcntI(LPopcntI* ins) { MOZ_CRASH(); } +void CodeGenerator::visitPopcntI64(LPopcntI64* ins) { MOZ_CRASH(); } +void CodeGenerator::visitAddI(LAddI* ins) { MOZ_CRASH(); } +void CodeGenerator::visitAddI64(LAddI64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitSubI(LSubI* ins) { MOZ_CRASH(); } +void CodeGenerator::visitSubI64(LSubI64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitMulI64(LMulI64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitMathD(LMathD* math) { MOZ_CRASH(); } +void CodeGenerator::visitMathF(LMathF* math) { MOZ_CRASH(); } +void CodeGenerator::visitTruncateDToInt32(LTruncateDToInt32* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmBuiltinTruncateDToInt32( + LWasmBuiltinTruncateDToInt32* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitTruncateFToInt32(LTruncateFToInt32* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmBuiltinTruncateFToInt32( + LWasmBuiltinTruncateFToInt32* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmTruncateToInt32(LWasmTruncateToInt32* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitWrapInt64ToInt32(LWrapInt64ToInt32* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitExtendInt32ToInt64(LExtendInt32ToInt64* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitPowHalfD(LPowHalfD* ins) { MOZ_CRASH(); } +void CodeGenerator::visitCompareExchangeTypedArrayElement( + LCompareExchangeTypedArrayElement* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitAtomicExchangeTypedArrayElement( + LAtomicExchangeTypedArrayElement* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitAtomicTypedArrayElementBinop64( + LAtomicTypedArrayElementBinop64* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitAtomicTypedArrayElementBinopForEffect64( + LAtomicTypedArrayElementBinopForEffect64* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitAtomicLoad64(LAtomicLoad64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitAtomicStore64(LAtomicStore64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitCompareExchangeTypedArrayElement64( + LCompareExchangeTypedArrayElement64* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitAtomicExchangeTypedArrayElement64( + LAtomicExchangeTypedArrayElement64* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitEffectiveAddress(LEffectiveAddress* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitNearbyInt(LNearbyInt*) { MOZ_CRASH(); } +void CodeGenerator::visitNearbyIntF(LNearbyIntF*) { MOZ_CRASH(); } +void CodeGenerator::visitWasmSelectI64(LWasmSelectI64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitWasmCompareAndSelect(LWasmCompareAndSelect* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmAddOffset(LWasmAddOffset* lir) { MOZ_CRASH(); } +void CodeGenerator::visitWasmAddOffset64(LWasmAddOffset64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitWasmExtendU32Index(LWasmExtendU32Index* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmWrapU32Index(LWasmWrapU32Index* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitAtomicTypedArrayElementBinop( + LAtomicTypedArrayElementBinop* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitAtomicTypedArrayElementBinopForEffect( + LAtomicTypedArrayElementBinopForEffect* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmSelect(LWasmSelect* ins) { MOZ_CRASH(); } +void CodeGenerator::visitWasmHeapBase(LWasmHeapBase* ins) { MOZ_CRASH(); } +void CodeGenerator::visitWasmLoad(LWasmLoad* lir) { MOZ_CRASH(); } +void CodeGenerator::visitWasmLoadI64(LWasmLoadI64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitWasmStore(LWasmStore* lir) { MOZ_CRASH(); } +void CodeGenerator::visitWasmStoreI64(LWasmStoreI64* lir) { MOZ_CRASH(); } +void CodeGenerator::visitAsmJSLoadHeap(LAsmJSLoadHeap* ins) { MOZ_CRASH(); } +void CodeGenerator::visitAsmJSStoreHeap(LAsmJSStoreHeap* ins) { MOZ_CRASH(); } +void CodeGenerator::visitWasmCompareExchangeHeap( + LWasmCompareExchangeHeap* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmAtomicExchangeHeap(LWasmAtomicExchangeHeap* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmAtomicBinopHeap(LWasmAtomicBinopHeap* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmAtomicBinopHeapForEffect( + LWasmAtomicBinopHeapForEffect* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmStackArg(LWasmStackArg* ins) { MOZ_CRASH(); } +void CodeGenerator::visitWasmStackArgI64(LWasmStackArgI64* ins) { MOZ_CRASH(); } +void CodeGenerator::visitMemoryBarrier(LMemoryBarrier* ins) { MOZ_CRASH(); } +void CodeGenerator::visitSimd128(LSimd128* ins) { MOZ_CRASH(); } +void CodeGenerator::visitWasmTernarySimd128(LWasmTernarySimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmBinarySimd128(LWasmBinarySimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmBinarySimd128WithConstant( + LWasmBinarySimd128WithConstant* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmVariableShiftSimd128( + LWasmVariableShiftSimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmConstantShiftSimd128( + LWasmConstantShiftSimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmSignReplicationSimd128( + LWasmSignReplicationSimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmShuffleSimd128(LWasmShuffleSimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmPermuteSimd128(LWasmPermuteSimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmReplaceLaneSimd128(LWasmReplaceLaneSimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmReplaceInt64LaneSimd128( + LWasmReplaceInt64LaneSimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmScalarToSimd128(LWasmScalarToSimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmInt64ToSimd128(LWasmInt64ToSimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmUnarySimd128(LWasmUnarySimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmReduceSimd128(LWasmReduceSimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmReduceAndBranchSimd128( + LWasmReduceAndBranchSimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmReduceSimd128ToInt64( + LWasmReduceSimd128ToInt64* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmLoadLaneSimd128(LWasmLoadLaneSimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmStoreLaneSimd128(LWasmStoreLaneSimd128* ins) { + MOZ_CRASH(); +} +void CodeGenerator::visitUnbox(LUnbox* unbox) { MOZ_CRASH(); } +void CodeGenerator::visitWasmUint32ToDouble(LWasmUint32ToDouble* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitWasmUint32ToFloat32(LWasmUint32ToFloat32* lir) { + MOZ_CRASH(); +} +void CodeGenerator::visitDivI(LDivI* ins) { MOZ_CRASH(); } +void CodeGenerator::visitModI(LModI* ins) { MOZ_CRASH(); } +void CodeGenerator::visitDivPowTwoI(LDivPowTwoI* ins) { MOZ_CRASH(); } +void CodeGenerator::visitModPowTwoI(LModPowTwoI* ins) { MOZ_CRASH(); } +void CodeGenerator::visitMulI(LMulI* ins) { MOZ_CRASH(); } +void CodeGenerator::visitBox(LBox* box) { MOZ_CRASH(); } diff --git a/js/src/jit/wasm32/CodeGenerator-wasm32.h b/js/src/jit/wasm32/CodeGenerator-wasm32.h new file mode 100644 index 000000000000..26d4adf9828a --- /dev/null +++ b/js/src/jit/wasm32/CodeGenerator-wasm32.h @@ -0,0 +1,76 @@ +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- + * vim: set ts=8 sts=2 et sw=2 tw=80: + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v. 2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ + +#ifndef jit_wasm32_CodeGenerator_wasm32_h +#define jit_wasm32_CodeGenerator_wasm32_h + +#include "jit/shared/CodeGenerator-shared.h" + +namespace js::jit { + +class CodeGeneratorWasm32 : public CodeGeneratorShared { + protected: + CodeGeneratorWasm32(MIRGenerator* gen, LIRGraph* graph, MacroAssembler* masm) + : CodeGeneratorShared(gen, graph, masm) { + MOZ_CRASH(); + } + + MoveOperand toMoveOperand(LAllocation) const { MOZ_CRASH(); } + template + void bailoutCmp32(Assembler::Condition, T1, T2, LSnapshot*) { + MOZ_CRASH(); + } + template + void bailoutTest32(Assembler::Condition, T1, T2, LSnapshot*) { + MOZ_CRASH(); + } + template + void bailoutCmpPtr(Assembler::Condition, T1, T2, LSnapshot*) { + MOZ_CRASH(); + } + void bailoutTestPtr(Assembler::Condition, Register, Register, LSnapshot*) { + MOZ_CRASH(); + } + void bailoutIfFalseBool(Register, LSnapshot*) { MOZ_CRASH(); } + void bailoutFrom(Label*, LSnapshot*) { MOZ_CRASH(); } + void bailout(LSnapshot*) { MOZ_CRASH(); } + void bailoutIf(Assembler::Condition, LSnapshot*) { MOZ_CRASH(); } + bool generateOutOfLineCode() { MOZ_CRASH(); } + void testNullEmitBranch(Assembler::Condition, ValueOperand, MBasicBlock*, + MBasicBlock*) { + MOZ_CRASH(); + } + void testUndefinedEmitBranch(Assembler::Condition, ValueOperand, MBasicBlock*, + MBasicBlock*) { + MOZ_CRASH(); + } + void testObjectEmitBranch(Assembler::Condition, ValueOperand, MBasicBlock*, + MBasicBlock*) { + MOZ_CRASH(); + } + void testZeroEmitBranch(Assembler::Condition, Register, MBasicBlock*, + MBasicBlock*) { + MOZ_CRASH(); + } + void emitTableSwitchDispatch(MTableSwitch*, Register, Register) { + MOZ_CRASH(); + } + void emitBigIntDiv(LBigIntDiv*, Register, Register, Register, Label*) { + MOZ_CRASH(); + } + void emitBigIntMod(LBigIntMod*, Register, Register, Register, Label*) { + MOZ_CRASH(); + } + ValueOperand ToValue(LInstruction*, size_t) { MOZ_CRASH(); } + ValueOperand ToTempValue(LInstruction*, size_t) { MOZ_CRASH(); } + void generateInvalidateEpilogue() { MOZ_CRASH(); } +}; + +typedef CodeGeneratorWasm32 CodeGeneratorSpecific; + +} // namespace js::jit + +#endif /* jit_wasm32_CodeGenerator_wasm32_h */ diff --git a/js/src/jit/wasm32/LIR-wasm32.h b/js/src/jit/wasm32/LIR-wasm32.h new file mode 100644 index 000000000000..8943d891433d --- /dev/null +++ b/js/src/jit/wasm32/LIR-wasm32.h @@ -0,0 +1,109 @@ +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- + * vim: set ts=8 sts=2 et sw=2 tw=80: + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v. 2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ + +#ifndef jit_wasm32_LIR_wasm32_h +#define jit_wasm32_LIR_wasm32_h + +namespace js::jit { + +class LUnboxFloatingPoint : public LInstruction { + public: + LIR_HEADER(UnboxFloatingPoint) + static const size_t Input = 0; + + MUnbox* mir() const { MOZ_CRASH(); } + + const LDefinition* output() const { MOZ_CRASH(); } + MIRType type() const { MOZ_CRASH(); } +}; + +class LTableSwitch : public LInstruction { + public: + LIR_HEADER(TableSwitch) + MTableSwitch* mir() { MOZ_CRASH(); } + + const LAllocation* index() { MOZ_CRASH(); } + const LDefinition* tempInt() { MOZ_CRASH(); } + const LDefinition* tempPointer() { MOZ_CRASH(); } +}; + +class LTableSwitchV : public LInstruction { + public: + LIR_HEADER(TableSwitchV) + MTableSwitch* mir() { MOZ_CRASH(); } + + const LDefinition* tempInt() { MOZ_CRASH(); } + const LDefinition* tempFloat() { MOZ_CRASH(); } + const LDefinition* tempPointer() { MOZ_CRASH(); } + + static const size_t InputValue = 0; +}; + +class LWasmUint32ToFloat32 : public LInstructionHelper<1, 1, 0> { + public: + explicit LWasmUint32ToFloat32(const LAllocation&) + : LInstructionHelper(Opcode::Invalid) { + MOZ_CRASH(); + } +}; + +class LUnbox : public LInstructionHelper<1, 2, 0> { + public: + MUnbox* mir() const { MOZ_CRASH(); } + const LAllocation* payload() { MOZ_CRASH(); } + const LAllocation* type() { MOZ_CRASH(); } + const char* extraName() const { MOZ_CRASH(); } +}; +class LDivI : public LBinaryMath<1> { + public: + LDivI(const LAllocation&, const LAllocation&, const LDefinition&) + : LBinaryMath(Opcode::Invalid) { + MOZ_CRASH(); + } + MDiv* mir() const { MOZ_CRASH(); } +}; +class LDivPowTwoI : public LInstructionHelper<1, 1, 0> { + public: + LDivPowTwoI(const LAllocation&, int32_t) + : LInstructionHelper(Opcode::Invalid) { + MOZ_CRASH(); + } + const LAllocation* numerator() { MOZ_CRASH(); } + int32_t shift() { MOZ_CRASH(); } + MDiv* mir() const { MOZ_CRASH(); } +}; +class LModI : public LBinaryMath<1> { + public: + LModI(const LAllocation&, const LAllocation&, const LDefinition&) + : LBinaryMath(Opcode::Invalid) { + MOZ_CRASH(); + } + + const LDefinition* callTemp() { MOZ_CRASH(); } + MMod* mir() const { MOZ_CRASH(); } +}; +class LWasmUint32ToDouble : public LInstructionHelper<1, 1, 0> { + public: + explicit LWasmUint32ToDouble(const LAllocation&) + : LInstructionHelper(Opcode::Invalid) { + MOZ_CRASH(); + } +}; +class LModPowTwoI : public LInstructionHelper<1, 1, 0> { + public: + int32_t shift() { MOZ_CRASH(); } + LModPowTwoI(const LAllocation& lhs, int32_t shift) + : LInstructionHelper(Opcode::Invalid) { + MOZ_CRASH(); + } + MMod* mir() const { MOZ_CRASH(); } +}; + +class LMulI : public LInstruction {}; + +} // namespace js::jit + +#endif /* jit_wasm32_LIR_wasm32_h */ diff --git a/js/src/jit/wasm32/Lowering-wasm32.h b/js/src/jit/wasm32/Lowering-wasm32.h new file mode 100644 index 000000000000..3a0aab364a90 --- /dev/null +++ b/js/src/jit/wasm32/Lowering-wasm32.h @@ -0,0 +1,128 @@ +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- + * vim: set ts=8 sts=2 et sw=2 tw=80: + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v. 2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ + +#ifndef jit_wasm32_Lowering_wasm32_h +#define jit_wasm32_Lowering_wasm32_h + +#include "jit/shared/Lowering-shared.h" + +namespace js::jit { + +class LIRGeneratorWasm32 : public LIRGeneratorShared { + protected: + LIRGeneratorWasm32(MIRGenerator* gen, MIRGraph& graph, LIRGraph& lirGraph) + : LIRGeneratorShared(gen, graph, lirGraph) { + MOZ_CRASH(); + } + + LBoxAllocation useBoxFixed(MDefinition*, Register, Register, + bool useAtStart = false) { + MOZ_CRASH(); + } + + LAllocation useByteOpRegister(MDefinition*) { MOZ_CRASH(); } + LAllocation useByteOpRegisterAtStart(MDefinition*) { MOZ_CRASH(); } + LAllocation useByteOpRegisterOrNonDoubleConstant(MDefinition*) { + MOZ_CRASH(); + } + LDefinition tempByteOpRegister() { MOZ_CRASH(); } + LDefinition tempToUnbox() { MOZ_CRASH(); } + bool needTempForPostBarrier() { MOZ_CRASH(); } + void lowerUntypedPhiInput(MPhi*, uint32_t, LBlock*, size_t) { MOZ_CRASH(); } + void lowerInt64PhiInput(MPhi*, uint32_t, LBlock*, size_t) { MOZ_CRASH(); } + void defineInt64Phi(MPhi*, size_t) { MOZ_CRASH(); } + void lowerForShift(LInstructionHelper<1, 2, 0>*, MDefinition*, MDefinition*, + MDefinition*) { + MOZ_CRASH(); + } + void lowerUrshD(MUrsh*) { MOZ_CRASH(); } + void lowerPowOfTwoI(MPow*) { MOZ_CRASH(); } + template + void lowerForALU(T, MDefinition*, MDefinition*, MDefinition* v = nullptr) { + MOZ_CRASH(); + } + template + void lowerForFPU(T, MDefinition*, MDefinition*, MDefinition* v = nullptr) { + MOZ_CRASH(); + } + template + void lowerForALUInt64(T, MDefinition*, MDefinition*, + MDefinition* v = nullptr) { + MOZ_CRASH(); + } + void lowerForMulInt64(LMulI64*, MMul*, MDefinition*, + MDefinition* v = nullptr) { + MOZ_CRASH(); + } + template + void lowerForShiftInt64(T, MDefinition*, MDefinition*, + MDefinition* v = nullptr) { + MOZ_CRASH(); + } + void lowerForBitAndAndBranch(LBitAndAndBranch*, MInstruction*, MDefinition*, + MDefinition*) { + MOZ_CRASH(); + } + void lowerForCompareI64AndBranch(MTest*, MCompare*, JSOp, MDefinition*, + MDefinition*, MBasicBlock*, MBasicBlock*) { + MOZ_CRASH(); + } + + void lowerConstantDouble(double, MInstruction*) { MOZ_CRASH(); } + void lowerConstantFloat32(float, MInstruction*) { MOZ_CRASH(); } + void lowerTruncateDToInt32(MTruncateToInt32*) { MOZ_CRASH(); } + void lowerTruncateFToInt32(MTruncateToInt32*) { MOZ_CRASH(); } + void lowerBuiltinInt64ToFloatingPoint(MBuiltinInt64ToFloatingPoint* ins) { + MOZ_CRASH(); + } + void lowerWasmBuiltinTruncateToInt64(MWasmBuiltinTruncateToInt64* ins) { + MOZ_CRASH(); + } + void lowerWasmBuiltinTruncateToInt32(MWasmBuiltinTruncateToInt32* ins) { + MOZ_CRASH(); + } + void lowerDivI(MDiv*) { MOZ_CRASH(); } + void lowerModI(MMod*) { MOZ_CRASH(); } + void lowerDivI64(MDiv*) { MOZ_CRASH(); } + void lowerWasmBuiltinDivI64(MWasmBuiltinDivI64* div) { MOZ_CRASH(); } + void lowerModI64(MMod*) { MOZ_CRASH(); } + void lowerWasmBuiltinModI64(MWasmBuiltinModI64* mod) { MOZ_CRASH(); } + void lowerNegI(MInstruction*, MDefinition*) { MOZ_CRASH(); } + void lowerNegI64(MInstruction*, MDefinition*) { MOZ_CRASH(); } + void lowerMulI(MMul*, MDefinition*, MDefinition*) { MOZ_CRASH(); } + void lowerUDiv(MDiv*) { MOZ_CRASH(); } + void lowerUMod(MMod*) { MOZ_CRASH(); } + void lowerWasmSelectI(MWasmSelect* select) { MOZ_CRASH(); } + void lowerWasmSelectI64(MWasmSelect* select) { MOZ_CRASH(); } + void lowerWasmCompareAndSelect(MWasmSelect* ins, MDefinition* lhs, + MDefinition* rhs, MCompare::CompareType compTy, + JSOp jsop) { + MOZ_CRASH(); + } + bool canSpecializeWasmCompareAndSelect(MCompare::CompareType compTy, + MIRType insTy) { + MOZ_CRASH(); + } + + void lowerBigIntLsh(MBigIntLsh*) { MOZ_CRASH(); } + void lowerBigIntRsh(MBigIntRsh*) { MOZ_CRASH(); } + void lowerBigIntDiv(MBigIntDiv*) { MOZ_CRASH(); } + void lowerBigIntMod(MBigIntMod*) { MOZ_CRASH(); } + + void lowerAtomicLoad64(MLoadUnboxedScalar*) { MOZ_CRASH(); } + void lowerAtomicStore64(MStoreUnboxedScalar*) { MOZ_CRASH(); } + + LTableSwitch* newLTableSwitch(LAllocation, LDefinition, MTableSwitch*) { + MOZ_CRASH(); + } + LTableSwitchV* newLTableSwitchV(MTableSwitch*) { MOZ_CRASH(); } +}; + +typedef LIRGeneratorWasm32 LIRGeneratorSpecific; + +} // namespace js::jit + +#endif /* jit_wasm32_Lowering_wasm32_h */ diff --git a/js/src/jit/wasm32/MacroAssembler-wasm32-inl.h b/js/src/jit/wasm32/MacroAssembler-wasm32-inl.h new file mode 100644 index 000000000000..80092dab5540 --- /dev/null +++ b/js/src/jit/wasm32/MacroAssembler-wasm32-inl.h @@ -0,0 +1,1167 @@ +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- + * vim: set ts=8 sts=2 et sw=2 tw=80: + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v. 2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ + +#ifndef jit_wasm32_MacroAssembler_wasm32_inl_h +#define jit_wasm32_MacroAssembler_wasm32_inl_h + +#include "jit/wasm32/MacroAssembler-wasm32.h" + +namespace js::jit { + +//{{{ check_macroassembler_style + +void MacroAssembler::move64(Imm64 imm, Register64 dest) { MOZ_CRASH(); } + +void MacroAssembler::move64(Register64 src, Register64 dest) { MOZ_CRASH(); } + +void MacroAssembler::moveDoubleToGPR64(FloatRegister src, Register64 dest) { + MOZ_CRASH(); +} + +void MacroAssembler::moveGPR64ToDouble(Register64 src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::move64To32(Register64 src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::move32To64ZeroExtend(Register src, Register64 dest) { + MOZ_CRASH(); +} + +void MacroAssembler::move8To64SignExtend(Register src, Register64 dest) { + MOZ_CRASH(); +} + +void MacroAssembler::move16To64SignExtend(Register src, Register64 dest) { + MOZ_CRASH(); +} + +void MacroAssembler::move32To64SignExtend(Register src, Register64 dest) { + MOZ_CRASH(); +} + +void MacroAssembler::move32SignExtendToPtr(Register src, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::move32ZeroExtendToPtr(Register src, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::load32SignExtendToPtr(const Address& src, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::notPtr(Register reg) { MOZ_CRASH(); } + +void MacroAssembler::andPtr(Register src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::andPtr(Imm32 imm, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::and64(Imm64 imm, Register64 dest) { MOZ_CRASH(); } + +void MacroAssembler::or64(Imm64 imm, Register64 dest) { MOZ_CRASH(); } + +void MacroAssembler::xor64(Imm64 imm, Register64 dest) { MOZ_CRASH(); } + +void MacroAssembler::orPtr(Register src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::orPtr(Imm32 imm, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::and64(Register64 src, Register64 dest) { MOZ_CRASH(); } + +void MacroAssembler::or64(Register64 src, Register64 dest) { MOZ_CRASH(); } + +void MacroAssembler::xor64(Register64 src, Register64 dest) { MOZ_CRASH(); } + +void MacroAssembler::xorPtr(Register src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::xorPtr(Imm32 imm, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::byteSwap64(Register64 reg) { MOZ_CRASH(); } + +void MacroAssembler::addPtr(Register src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::addPtr(Imm32 imm, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::addPtr(ImmWord imm, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::add64(Register64 src, Register64 dest) { MOZ_CRASH(); } + +void MacroAssembler::add64(Imm32 imm, Register64 dest) { MOZ_CRASH(); } + +void MacroAssembler::add64(Imm64 imm, Register64 dest) { MOZ_CRASH(); } + +CodeOffset MacroAssembler::sub32FromStackPtrWithPatch(Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::patchSub32FromStackPtr(CodeOffset offset, Imm32 imm) { + MOZ_CRASH(); +} + +void MacroAssembler::subPtr(Register src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::subPtr(Imm32 imm, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::sub64(Register64 src, Register64 dest) { MOZ_CRASH(); } + +void MacroAssembler::sub64(Imm64 imm, Register64 dest) { MOZ_CRASH(); } + +void MacroAssembler::mulPtr(Register rhs, Register srcDest) { MOZ_CRASH(); } + +void MacroAssembler::mul64(Imm64 imm, const Register64& dest) { MOZ_CRASH(); } + +void MacroAssembler::mul64(const Register64& src, const Register64& dest, + const Register temp) { + MOZ_CRASH(); +} + +void MacroAssembler::mulBy3(Register src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::inc64(AbsoluteAddress dest) { MOZ_CRASH(); } + +void MacroAssembler::neg64(Register64 reg) { MOZ_CRASH(); } + +void MacroAssembler::negPtr(Register reg) { MOZ_CRASH(); } + +void MacroAssembler::lshiftPtr(Imm32 imm, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::rshiftPtr(Imm32 imm, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::rshiftPtrArithmetic(Imm32 imm, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::lshift64(Imm32 imm, Register64 dest) { MOZ_CRASH(); } + +void MacroAssembler::rshift64(Imm32 imm, Register64 dest) { MOZ_CRASH(); } + +void MacroAssembler::rshift64Arithmetic(Imm32 imm, Register64 dest) { + MOZ_CRASH(); +} + +void MacroAssembler::lshiftPtr(Register shift, Register srcDest) { + MOZ_CRASH(); +} + +void MacroAssembler::rshiftPtr(Register shift, Register srcDest) { + MOZ_CRASH(); +} + +void MacroAssembler::lshift64(Register shift, Register64 srcDest) { + MOZ_CRASH(); +} + +void MacroAssembler::rshift64(Register shift, Register64 srcDest) { + MOZ_CRASH(); +} + +void MacroAssembler::rshift64Arithmetic(Register shift, Register64 srcDest) { + MOZ_CRASH(); +} + +void MacroAssembler::clz64(Register64 src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::ctz64(Register64 src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::popcnt64(Register64 src, Register64 dest, Register temp) { + MOZ_CRASH(); +} + +template +void MacroAssembler::cmpPtrSet(Condition cond, T1 lhs, T2 rhs, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::branchToComputedAddress(const BaseIndex& address) { + MOZ_CRASH(); +} + +void MacroAssembler::move8SignExtend(Register src, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::move16SignExtend(Register src, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::loadAbiReturnAddress(Register dest) { MOZ_CRASH(); } + +void MacroAssembler::not32(Register reg) { MOZ_CRASH(); } + +void MacroAssembler::and32(Register src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::and32(Imm32 imm, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::and32(Imm32 imm, const Address& dest) { MOZ_CRASH(); } + +void MacroAssembler::and32(const Address& src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::or32(Register src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::or32(Imm32 imm, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::or32(Imm32 imm, const Address& dest) { MOZ_CRASH(); } + +void MacroAssembler::xor32(Register src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::xor32(Imm32 imm, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::xor32(Imm32 imm, const Address& dest) { MOZ_CRASH(); } + +void MacroAssembler::xor32(const Address& src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::byteSwap16SignExtend(Register reg) { MOZ_CRASH(); } + +void MacroAssembler::byteSwap16ZeroExtend(Register reg) { MOZ_CRASH(); } + +void MacroAssembler::byteSwap32(Register reg) { MOZ_CRASH(); } + +void MacroAssembler::add32(Register src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::add32(Imm32 imm, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::add32(Imm32 imm, const Address& dest) { MOZ_CRASH(); } + +void MacroAssembler::addFloat32(FloatRegister src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::addDouble(FloatRegister src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::sub32(const Address& src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::sub32(Register src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::sub32(Imm32 imm, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::subFloat32(FloatRegister src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::subDouble(FloatRegister src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::mul32(Register rhs, Register srcDest) { MOZ_CRASH(); } + +void MacroAssembler::mul32(Imm32 imm, Register srcDest) { MOZ_CRASH(); } + +void MacroAssembler::mulFloat32(FloatRegister src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::mulDouble(FloatRegister src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::divFloat32(FloatRegister src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::divDouble(FloatRegister src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::neg32(Register reg) { MOZ_CRASH(); } + +void MacroAssembler::negateFloat(FloatRegister reg) { MOZ_CRASH(); } + +void MacroAssembler::negateDouble(FloatRegister reg) { MOZ_CRASH(); } + +void MacroAssembler::abs32(Register src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::absFloat32(FloatRegister src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::absDouble(FloatRegister src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::sqrtDouble(FloatRegister src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::lshift32(Imm32 shift, Register srcDest) { MOZ_CRASH(); } + +void MacroAssembler::rshift32(Imm32 shift, Register srcDest) { MOZ_CRASH(); } + +void MacroAssembler::rshift32Arithmetic(Imm32 shift, Register srcDest) { + MOZ_CRASH(); +} + +void MacroAssembler::rshift32Arithmetic(Register shift, Register srcDest) { + MOZ_CRASH(); +} + +void MacroAssembler::lshift32(Register shift, Register srcDest) { MOZ_CRASH(); } + +void MacroAssembler::rshift32(Register shift, Register srcDest) { MOZ_CRASH(); } + +void MacroAssembler::memoryBarrier(MemoryBarrierBits barrier) { MOZ_CRASH(); } + +void MacroAssembler::clampIntToUint8(Register reg) { MOZ_CRASH(); } + +template +void MacroAssembler::branchTest32(Condition cond, Register lhs, Register rhs, + L label) { + MOZ_CRASH(); +} + +template +void MacroAssembler::branchTest32(Condition cond, Register lhs, Imm32 rhs, + L label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTest32(Condition cond, const Address& lhs, Imm32 rhh, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTest32(Condition cond, const AbsoluteAddress& lhs, + Imm32 rhs, Label* label) { + MOZ_CRASH(); +} + +template +void MacroAssembler::branchTestPtr(Condition cond, Register lhs, Register rhs, + L label) { + MOZ_CRASH(); +} +void MacroAssembler::branchTestPtr(Condition cond, Register lhs, Imm32 rhs, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestPtr(Condition cond, const Address& lhs, + Imm32 rhs, Label* label) { + MOZ_CRASH(); +} + +template +void MacroAssembler::branchTest64(Condition cond, Register64 lhs, + Register64 rhs, Register temp, L label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestUndefined(Condition cond, Register tag, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestInt32(Condition cond, Register tag, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestDouble(Condition cond, Register tag, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestNumber(Condition cond, Register tag, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestBoolean(Condition cond, Register tag, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestString(Condition cond, Register tag, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestSymbol(Condition cond, Register tag, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestBigInt(Condition cond, Register tag, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestNull(Condition cond, Register tag, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestObject(Condition cond, Register tag, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestPrimitive(Condition cond, Register tag, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestMagic(Condition cond, Register tag, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestUndefined(Condition cond, const Address& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestUndefined(Condition cond, + const BaseIndex& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestInt32(Condition cond, const Address& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestInt32(Condition cond, const BaseIndex& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestInt32(Condition cond, const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestDouble(Condition cond, const Address& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestDouble(Condition cond, const BaseIndex& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestBoolean(Condition cond, const Address& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestBoolean(Condition cond, const BaseIndex& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestString(Condition cond, const Address& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestString(Condition cond, const BaseIndex& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestSymbol(Condition cond, const Address& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestSymbol(Condition cond, const BaseIndex& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestBigInt(Condition cond, const Address& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestBigInt(Condition cond, const BaseIndex& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestNull(Condition cond, const Address& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestNull(Condition cond, const BaseIndex& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestNull(Condition cond, const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestObject(Condition cond, const Address& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestObject(Condition cond, const BaseIndex& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestObject(Condition cond, const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestGCThing(Condition cond, const Address& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestGCThing(Condition cond, const BaseIndex& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestGCThing(Condition cond, + const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestMagic(Condition cond, const Address& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestMagic(Condition cond, const BaseIndex& address, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestMagic(Condition cond, const Address& valaddr, + JSWhyMagic why, Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestValue(Condition cond, const BaseIndex& lhs, + const ValueOperand& rhs, Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestDoubleTruthy(bool truthy, FloatRegister reg, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestBooleanTruthy(bool truthy, + const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestStringTruthy(bool truthy, + const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestBigIntTruthy(bool truthy, + const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::fallibleUnboxPtr(const ValueOperand& src, Register dest, + JSValueType type, Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::fallibleUnboxPtr(const Address& src, Register dest, + JSValueType type, Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::fallibleUnboxPtr(const BaseIndex& src, Register dest, + JSValueType type, Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::cmpPtrMovePtr(Condition cond, Register lhs, Register rhs, + Register src, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::cmpPtrMovePtr(Condition cond, Register lhs, + const Address& rhs, Register src, + Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::branch32(Condition cond, const BaseIndex& lhs, Imm32 rhs, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branch32(Condition cond, const AbsoluteAddress& lhs, + Imm32 rhs, Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branch32(Condition cond, const Address& lhs, Register rhs, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branch32(Condition cond, const Address& lhs, Imm32 rhs, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branch32(Condition cond, const AbsoluteAddress& lhs, + Register rhs, Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branch8(Condition cond, const Address& lhs, Imm32 rhs, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branch16(Condition cond, const Address& lhs, Imm32 rhs, + Label* label) { + MOZ_CRASH(); +} + +template +void MacroAssembler::branch32(Condition cond, Register lhs, Register rhs, + L label) { + MOZ_CRASH(); +} + +template +void MacroAssembler::branch32(Condition cond, Register lhs, Imm32 rhs, + L label) { + MOZ_CRASH(); +} + +void MacroAssembler::branch32(Condition cond, wasm::SymbolicAddress lhs, + Imm32 rhs, Label* label) { + MOZ_CRASH(); +} + +template +void MacroAssembler::branchPtr(Condition cond, Register lhs, Register rhs, + L label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchPtr(Condition cond, Register lhs, Imm32 rhs, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchPtr(Condition cond, Register lhs, ImmPtr rhs, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchPtr(Condition cond, Register lhs, ImmGCPtr rhs, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchPtr(Condition cond, Register lhs, ImmWord rhs, + Label* label) { + MOZ_CRASH(); +} + +template +void MacroAssembler::branchPtr(Condition cond, const Address& lhs, Register rhs, + L label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchPtr(Condition cond, const Address& lhs, ImmPtr rhs, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchPtr(Condition cond, const Address& lhs, ImmGCPtr rhs, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchPtr(Condition cond, const Address& lhs, ImmWord rhs, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchPtr(Condition cond, const BaseIndex& lhs, + ImmWord rhs, Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchPtr(Condition cond, const BaseIndex& lhs, + Register rhs, Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchPtr(Condition cond, const AbsoluteAddress& lhs, + Register rhs, Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchPtr(Condition cond, const AbsoluteAddress& lhs, + ImmWord rhs, Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchPtr(Condition cond, wasm::SymbolicAddress lhs, + Register rhs, Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchFloat(DoubleCondition cond, FloatRegister lhs, + FloatRegister rhs, Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchDouble(DoubleCondition cond, FloatRegister lhs, + FloatRegister rhs, Label* label) { + MOZ_CRASH(); +} + +template +void MacroAssembler::branchAdd32(Condition cond, T src, Register dest, + Label* label) { + MOZ_CRASH(); +} + +template +void MacroAssembler::branchSub32(Condition cond, T src, Register dest, + Label* label) { + MOZ_CRASH(); +} + +template +void MacroAssembler::branchMul32(Condition cond, T src, Register dest, + Label* label) { + MOZ_CRASH(); +} + +template +void MacroAssembler::branchRshift32(Condition cond, T src, Register dest, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchNeg32(Condition cond, Register reg, Label* label) { + MOZ_CRASH(); +} + +template +void MacroAssembler::branchAddPtr(Condition cond, T src, Register dest, + Label* label) { + MOZ_CRASH(); +} + +template +void MacroAssembler::branchSubPtr(Condition cond, T src, Register dest, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchMulPtr(Condition cond, Register src, Register dest, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::decBranchPtr(Condition cond, Register lhs, Imm32 rhs, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::spectreZeroRegister(Condition cond, Register scratch, + Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::spectreMovePtr(Condition cond, Register src, + Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::storeUncanonicalizedDouble(FloatRegister src, + const Address& dest) { + MOZ_CRASH(); +} + +void MacroAssembler::storeUncanonicalizedDouble(FloatRegister src, + const BaseIndex& dest) { + MOZ_CRASH(); +} + +void MacroAssembler::storeUncanonicalizedFloat32(FloatRegister src, + const Address& dest) { + MOZ_CRASH(); +} + +void MacroAssembler::storeUncanonicalizedFloat32(FloatRegister src, + const BaseIndex& dest) { + MOZ_CRASH(); +} + +void MacroAssembler::addPtr(Imm32 imm, const Address& dest) { MOZ_CRASH(); } + +void MacroAssembler::addPtr(const Address& src, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::subPtr(Register src, const Address& dest) { MOZ_CRASH(); } + +void MacroAssembler::subPtr(const Address& addr, Register dest) { MOZ_CRASH(); } + +void MacroAssembler::branchTruncateFloat32MaybeModUint32(FloatRegister src, + Register dest, + Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTruncateDoubleMaybeModUint32(FloatRegister src, + Register dest, + Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::test32MovePtr(Condition cond, const Address& addr, + Imm32 mask, Register src, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::cmp32MovePtr(Condition cond, Register lhs, Imm32 rhs, + Register src, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::test32LoadPtr(Condition cond, const Address& addr, + Imm32 mask, const Address& src, + Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::spectreBoundsCheck32(Register index, Register length, + Register maybeScratch, + Label* failure) { + MOZ_CRASH(); +} + +void MacroAssembler::spectreBoundsCheck32(Register index, const Address& length, + Register maybeScratch, + Label* failure) { + MOZ_CRASH(); +} + +void MacroAssembler::spectreBoundsCheckPtr(Register index, Register length, + Register maybeScratch, + Label* failure) { + MOZ_CRASH(); +} + +void MacroAssembler::spectreBoundsCheckPtr(Register index, + const Address& length, + Register maybeScratch, + Label* failure) { + MOZ_CRASH(); +} + +void MacroAssembler::cmp32LoadPtr(Condition cond, const Address& lhs, Imm32 rhs, + const Address& src, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTruncateFloat32ToInt32(FloatRegister src, + Register dest, Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTruncateDoubleToInt32(FloatRegister src, + Register dest, Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::mulDoublePtr(ImmPtr imm, Register temp, + FloatRegister dest) { + MOZ_CRASH(); +} + +template +void MacroAssembler::cmp32Set(Condition cond, T1 lhs, T2 rhs, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::cmp64Set(Condition cond, Address lhs, Imm64 rhs, + Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestDouble(Condition cond, const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestInt32Truthy(bool truthy, + const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestNumber(Condition cond, const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestSymbol(Condition cond, const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestBigInt(Condition cond, const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestBoolean(Condition cond, + const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +template +void MacroAssembler::branchTestMagic(Condition cond, const ValueOperand& value, + L label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestString(Condition cond, const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::cmp32Move32(Condition cond, Register lhs, Register rhs, + Register src, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::cmp32Move32(Condition cond, Register lhs, + const Address& rhs, Register src, + Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestUndefined(Condition cond, + const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchAdd64(Condition cond, Imm64 imm, Register64 dest, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::quotient32(Register rhs, Register srcDest, + bool isUnsigned) { + MOZ_CRASH(); +} + +void MacroAssembler::remainder32(Register rhs, Register srcDest, + bool isUnsigned) { + MOZ_CRASH(); +} + +void MacroAssembler::branch64(Condition cond, Register64 lhs, Imm64 val, + Label* success, Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::branch64(Condition cond, Register64 lhs, Register64 rhs, + Label* success, Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::branch64(Condition cond, const Address& lhs, Imm64 val, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branch64(Condition cond, const Address& lhs, + Register64 rhs, Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branch64(Condition cond, const Address& lhs, + const Address& rhs, Register scratch, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::minFloat32(FloatRegister other, FloatRegister srcDest, + bool handleNaN) { + MOZ_CRASH(); +} + +void MacroAssembler::minDouble(FloatRegister other, FloatRegister srcDest, + bool handleNaN) { + MOZ_CRASH(); +} + +void MacroAssembler::maxFloat32(FloatRegister other, FloatRegister srcDest, + bool handleNaN) { + MOZ_CRASH(); +} + +void MacroAssembler::maxDouble(FloatRegister other, FloatRegister srcDest, + bool handleNaN) { + MOZ_CRASH(); +} + +void MacroAssembler::rotateLeft(Imm32 count, Register input, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::rotateLeft(Register count, Register input, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::rotateLeft64(Imm32 count, Register64 input, + Register64 dest, Register temp) { + MOZ_CRASH(); +} + +void MacroAssembler::rotateLeft64(Register count, Register64 input, + Register64 dest, Register temp) { + MOZ_CRASH(); +} + +void MacroAssembler::rotateRight(Imm32 count, Register input, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::rotateRight(Register count, Register input, + Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::rotateRight64(Imm32 count, Register64 input, + Register64 dest, Register temp) { + MOZ_CRASH(); +} + +void MacroAssembler::rotateRight64(Register count, Register64 input, + Register64 dest, Register temp) { + MOZ_CRASH(); +} + +void MacroAssembler::flexibleLshift32(Register shift, Register srcDest) { + MOZ_CRASH(); +} + +void MacroAssembler::flexibleRshift32(Register shift, Register srcDest) { + MOZ_CRASH(); +} + +void MacroAssembler::flexibleRshift32Arithmetic(Register shift, + Register srcDest) { + MOZ_CRASH(); +} + +void MacroAssembler::branchPrivatePtr(Condition cond, const Address& lhs, + Register rhs, Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::clz32(Register src, Register dest, bool knownNotZero) { + MOZ_CRASH(); +} + +void MacroAssembler::ctz32(Register src, Register dest, bool knownNotZero) { + MOZ_CRASH(); +} + +void MacroAssembler::popcnt32(Register src, Register dest, Register temp) { + MOZ_CRASH(); +} + +void MacroAssembler::moveFloat32ToGPR(FloatRegister src, Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::moveGPRToFloat32(Register src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestPrimitive(Condition cond, + const ValueOperand& value, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::sqrtFloat32(FloatRegister src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::cmp16Set(Condition cond, Address lhs, Imm32 rhs, + Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::cmp8Set(Condition cond, Address lhs, Imm32 rhs, + Register dest) { + MOZ_CRASH(); +} + +template +void MacroAssembler::testNumberSet(Condition cond, const T& src, + Register dest) { + MOZ_CRASH(); +} + +template +void MacroAssembler::testBooleanSet(Condition cond, const T& src, + Register dest) { + MOZ_CRASH(); +} + +template +void MacroAssembler::testStringSet(Condition cond, const T& src, + Register dest) { + MOZ_CRASH(); +} + +template +void MacroAssembler::testSymbolSet(Condition cond, const T& src, + Register dest) { + MOZ_CRASH(); +} + +template +void MacroAssembler::testBigIntSet(Condition cond, const T& src, + Register dest) { + MOZ_CRASH(); +} + +template +void MacroAssembler::branchTestGCThingImpl(Condition cond, const T& t, + Label* label) { + MOZ_CRASH(); +} + +//}}} check_macroassembler_style + +} // namespace js::jit + +#endif /* jit_wasm32_MacroAssembler_wasm32_inl_h */ diff --git a/js/src/jit/wasm32/MacroAssembler-wasm32.cpp b/js/src/jit/wasm32/MacroAssembler-wasm32.cpp new file mode 100644 index 000000000000..d2baf3066a54 --- /dev/null +++ b/js/src/jit/wasm32/MacroAssembler-wasm32.cpp @@ -0,0 +1,504 @@ +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- + * vim: set ts=8 sts=2 et sw=2 tw=80: + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v. 2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ + +#include "jit/wasm32/MacroAssembler-wasm32.h" + +namespace js::jit { + +void MacroAssembler::subFromStackPtr(Imm32 imm32) { MOZ_CRASH(); } + +//{{{ check_macroassembler_style + +void MacroAssembler::PushBoxed(FloatRegister reg) { MOZ_CRASH(); } + +void MacroAssembler::branchPtrInNurseryChunk(Condition cond, Register ptr, + Register temp, Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::pushReturnAddress() { MOZ_CRASH(); } + +void MacroAssembler::popReturnAddress() { MOZ_CRASH(); } + +CodeOffset MacroAssembler::moveNearAddressWithPatch(Register dest) { + MOZ_CRASH(); +} + +void MacroAssembler::patchNearAddressMove(CodeLocationLabel loc, + CodeLocationLabel target) { + MOZ_CRASH(); +} + +size_t MacroAssembler::PushRegsInMaskSizeInBytes(LiveRegisterSet set) { + MOZ_CRASH(); + return 0; +} + +void MacroAssembler::PushRegsInMask(LiveRegisterSet set) { MOZ_CRASH(); } + +void MacroAssembler::PopRegsInMaskIgnore(LiveRegisterSet set, + LiveRegisterSet ignore) { + MOZ_CRASH(); +} + +void MacroAssembler::PopStackPtr() { MOZ_CRASH(); } + +void MacroAssembler::flexibleDivMod32(Register rhs, Register srcDest, + Register remOutput, bool isUnsigned, + const LiveRegisterSet& volatileLiveRegs) { + MOZ_CRASH(); +} + +void MacroAssembler::flexibleRemainder32( + Register rhs, Register srcDest, bool isUnsigned, + const LiveRegisterSet& volatileLiveRegs) { + MOZ_CRASH(); +} + +void MacroAssembler::storeRegsInMask(LiveRegisterSet set, Address dest, + Register scratch) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmBoundsCheck32(Condition cond, Register index, + Register boundsCheckLimit, Label* ok) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmBoundsCheck32(Condition cond, Register index, + Address boundsCheckLimit, Label* ok) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmBoundsCheck64(Condition cond, Register64 index, + Register64 boundsCheckLimit, Label* ok) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmBoundsCheck64(Condition cond, Register64 index, + Address boundsCheckLimit, Label* ok) { + MOZ_CRASH(); +} + +void MacroAssembler::oolWasmTruncateCheckF32ToI32(FloatRegister input, + Register output, + TruncFlags flags, + wasm::BytecodeOffset off, + Label* rejoin) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmTruncateDoubleToInt64( + FloatRegister input, Register64 output, bool isSaturating, Label* oolEntry, + Label* oolRejoin, FloatRegister tempDouble) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmTruncateDoubleToUInt64( + FloatRegister input, Register64 output, bool isSaturating, Label* oolEntry, + Label* oolRejoin, FloatRegister tempDouble) { + MOZ_CRASH(); +} + +void MacroAssembler::oolWasmTruncateCheckF64ToI64(FloatRegister input, + Register64 output, + TruncFlags flags, + wasm::BytecodeOffset off, + Label* rejoin) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmTruncateFloat32ToInt64( + FloatRegister input, Register64 output, bool isSaturating, Label* oolEntry, + Label* oolRejoin, FloatRegister tempDouble) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmTruncateFloat32ToUInt64( + FloatRegister input, Register64 output, bool isSaturating, Label* oolEntry, + Label* oolRejoin, FloatRegister tempDouble) { + MOZ_CRASH(); +} + +void MacroAssembler::oolWasmTruncateCheckF32ToI64(FloatRegister input, + Register64 output, + TruncFlags flags, + wasm::BytecodeOffset off, + Label* rejoin) { + MOZ_CRASH(); +} + +void MacroAssembler::oolWasmTruncateCheckF64ToI32(FloatRegister input, + Register output, + TruncFlags flags, + wasm::BytecodeOffset off, + Label* rejoin) { + MOZ_CRASH(); +} + +void MacroAssembler::convertUInt64ToFloat32(Register64 src, FloatRegister dest, + Register temp) { + MOZ_CRASH(); +} + +void MacroAssembler::convertInt64ToFloat32(Register64 src, FloatRegister dest) { + MOZ_CRASH(); +} + +bool MacroAssembler::convertUInt64ToDoubleNeedsTemp() { MOZ_CRASH(); } + +void MacroAssembler::convertUInt64ToDouble(Register64 src, FloatRegister dest, + Register temp) { + MOZ_CRASH(); +} + +void MacroAssembler::convertInt64ToDouble(Register64 src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::convertIntPtrToDouble(Register src, FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmAtomicLoad64(const wasm::MemoryAccessDesc& access, + const Address& mem, Register64 temp, + Register64 output) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmAtomicLoad64(const wasm::MemoryAccessDesc& access, + const BaseIndex& mem, Register64 temp, + Register64 output) { + MOZ_CRASH(); +} + +void MacroAssembler::patchNopToCall(uint8_t* call, uint8_t* target) { + MOZ_CRASH(); +} + +void MacroAssembler::patchCallToNop(uint8_t* call) { MOZ_CRASH(); } + +void MacroAssembler::patchCall(uint32_t callerOffset, uint32_t calleeOffset) { + MOZ_CRASH(); +} + +CodeOffset MacroAssembler::farJumpWithPatch() { + MOZ_CRASH(); + return CodeOffset(0); +} + +void MacroAssembler::patchFarJump(CodeOffset farJump, uint32_t targetOffset) { + MOZ_CRASH(); +} + +CodeOffset MacroAssembler::call(Register reg) { + MOZ_CRASH(); + return CodeOffset(0); +} + +CodeOffset MacroAssembler::call(Label* label) { + MOZ_CRASH(); + return CodeOffset(0); +} + +CodeOffset MacroAssembler::call(wasm::SymbolicAddress imm) { + MOZ_CRASH(); + return CodeOffset(0); +} + +CodeOffset MacroAssembler::callWithPatch() { + MOZ_CRASH(); + return CodeOffset(0); +} + +CodeOffset MacroAssembler::nopPatchableToCall() { + MOZ_CRASH(); + return CodeOffset(0); +} + +CodeOffset MacroAssembler::wasmTrapInstruction() { + MOZ_CRASH(); + return CodeOffset(0); +} + +template void MacroAssembler::storeUnboxedValue(const ConstantOrRegister& value, + MIRType valueType, + const Address& dest, + MIRType slotType); + +template void MacroAssembler::storeUnboxedValue( + const ConstantOrRegister& value, MIRType valueType, + const BaseObjectElementIndex& dest, MIRType slotType); + +template +void MacroAssembler::storeUnboxedValue(const ConstantOrRegister& value, + MIRType valueType, const T& dest, + MIRType slotType) { + MOZ_CRASH(); +} + +uint32_t MacroAssembler::pushFakeReturnAddress(Register scratch) { + MOZ_CRASH(); +} + +void MacroAssembler::Pop(Register reg) { MOZ_CRASH(); } + +void MacroAssembler::Pop(FloatRegister t) { MOZ_CRASH(); } + +void MacroAssembler::Pop(const ValueOperand& val) { MOZ_CRASH(); } + +void MacroAssembler::Push(Register reg) { MOZ_CRASH(); } + +void MacroAssembler::Push(const Imm32 imm) { MOZ_CRASH(); } + +void MacroAssembler::Push(const ImmWord imm) { MOZ_CRASH(); } + +void MacroAssembler::Push(const ImmPtr imm) { MOZ_CRASH(); } + +void MacroAssembler::Push(const ImmGCPtr ptr) { MOZ_CRASH(); } + +void MacroAssembler::Push(FloatRegister reg) { MOZ_CRASH(); } + +void MacroAssembler::wasmTruncateFloat32ToInt32(FloatRegister input, + Register output, + bool isSaturating, + Label* oolEntry) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmTruncateFloat32ToUInt32(FloatRegister input, + Register output, + bool isSaturating, + Label* oolEntry) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmTruncateDoubleToUInt32(FloatRegister input, + Register output, + bool isSaturating, + Label* oolEntry) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmTruncateDoubleToInt32(FloatRegister input, + Register output, + bool isSaturating, + Label* oolEntry) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmAtomicExchange64(const wasm::MemoryAccessDesc& access, + const Address& mem, Register64 value, + Register64 output) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmAtomicExchange64(const wasm::MemoryAccessDesc& access, + const BaseIndex& mem, + Register64 value, Register64 output) { + MOZ_CRASH(); +} + +void MacroAssembler::speculationBarrier() { MOZ_CRASH(); } + +void MacroAssembler::shiftIndex32AndAdd(Register indexTemp32, int shift, + Register pointer) { + MOZ_CRASH(); +} + +void MacroAssembler::setupUnalignedABICall(Register scratch) { MOZ_CRASH(); } + +void MacroAssembler::enterFakeExitFrameForWasm(Register cxreg, Register scratch, + ExitFrameType type) { + MOZ_CRASH(); +} + +void MacroAssembler::floorFloat32ToInt32(FloatRegister src, Register dest, + Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::floorDoubleToInt32(FloatRegister src, Register dest, + Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::ceilFloat32ToInt32(FloatRegister src, Register dest, + Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::ceilDoubleToInt32(FloatRegister src, Register dest, + Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::roundFloat32ToInt32(FloatRegister src, Register dest, + FloatRegister temp, Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::roundDoubleToInt32(FloatRegister src, Register dest, + FloatRegister temp, Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::truncFloat32ToInt32(FloatRegister src, Register dest, + Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::truncDoubleToInt32(FloatRegister src, Register dest, + Label* fail) { + MOZ_CRASH(); +} + +void MacroAssembler::nearbyIntDouble(RoundingMode mode, FloatRegister src, + FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::nearbyIntFloat32(RoundingMode mode, FloatRegister src, + FloatRegister dest) { + MOZ_CRASH(); +} + +void MacroAssembler::copySignDouble(FloatRegister lhs, FloatRegister rhs, + FloatRegister output) { + MOZ_CRASH(); +} + +void MacroAssembler::branchTestValue(Condition cond, const ValueOperand& lhs, + const Value& rhs, Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchValueIsNurseryCell(Condition cond, + const Address& address, + Register temp, Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::branchValueIsNurseryCell(Condition cond, + ValueOperand value, Register temp, + Label* label) { + MOZ_CRASH(); +} + +void MacroAssembler::callWithABINoProfiler(Register fun, MoveOp::Type result) { + MOZ_CRASH(); +} + +void MacroAssembler::callWithABINoProfiler(const Address& fun, + MoveOp::Type result) { + MOZ_CRASH(); +} + +void MacroAssembler::call(const Address& addr) { MOZ_CRASH(); } + +void MacroAssembler::call(ImmWord imm) { MOZ_CRASH(); } + +void MacroAssembler::call(ImmPtr imm) { MOZ_CRASH(); } + +void MacroAssembler::call(JitCode* c) { MOZ_CRASH(); } + +void MacroAssembler::callWithABIPost(uint32_t stackAdjust, MoveOp::Type result, + bool callFromWasm) { + MOZ_CRASH(); +} + +void MacroAssembler::callWithABIPre(uint32_t* stackAdjust, bool callFromWasm) { + MOZ_CRASH(); +} + +void MacroAssembler::comment(const char* msg) { MOZ_CRASH(); } + +void MacroAssembler::flush() { MOZ_CRASH(); } + +void MacroAssembler::loadStoreBuffer(Register ptr, Register buffer) { + MOZ_CRASH(); +} + +void MacroAssembler::moveValue(const TypedOrValueRegister& src, + const ValueOperand& dest) { + MOZ_CRASH(); +} + +void MacroAssembler::moveValue(const ValueOperand& src, + const ValueOperand& dest) { + MOZ_CRASH(); +} + +void MacroAssembler::moveValue(const Value& src, const ValueOperand& dest) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmCompareExchange64(const wasm::MemoryAccessDesc& access, + const Address& mem, + Register64 expected, + Register64 replacement, + Register64 output) { + MOZ_CRASH(); +} + +void MacroAssembler::wasmCompareExchange64(const wasm::MemoryAccessDesc& access, + const BaseIndex& mem, + Register64 expected, + Register64 replacement, + Register64 output) { + MOZ_CRASH(); +} + +//}}} check_macroassembler_style + +void MacroAssemblerWasm32::executableCopy(void* buffer) { MOZ_CRASH(); } + +void MacroAssemblerWasm32::jump(Label* label) { MOZ_CRASH(); } + +void MacroAssemblerWasm32::writeCodePointer(CodeLabel* label) { MOZ_CRASH(); } + +void MacroAssemblerWasm32::haltingAlign(size_t) { MOZ_CRASH(); } + +void MacroAssemblerWasm32::nopAlign(size_t) { MOZ_CRASH(); } + +void MacroAssemblerWasm32::checkStackAlignment() { MOZ_CRASH(); } + +uint32_t MacroAssemblerWasm32::currentOffset() { + MOZ_CRASH(); + return 0; +} + +void MacroAssemblerWasm32::nop() { MOZ_CRASH(); } + +void MacroAssemblerWasm32::breakpoint() { MOZ_CRASH(); } + +void MacroAssemblerWasm32::abiret() { MOZ_CRASH(); } + +void MacroAssemblerWasm32::ret() { MOZ_CRASH(); } + +CodeOffset MacroAssemblerWasm32::toggledJump(Label*) { MOZ_CRASH(); } + +CodeOffset MacroAssemblerWasm32::toggledCall(JitCode*, bool) { MOZ_CRASH(); } + +size_t MacroAssemblerWasm32::ToggledCallSize(uint8_t*) { MOZ_CRASH(); } + +void MacroAssemblerWasm32::finish() { MOZ_CRASH(); } + +void MacroAssemblerWasm32::pushValue(ValueOperand val) { MOZ_CRASH(); } + +void MacroAssemblerWasm32::popValue(ValueOperand) { MOZ_CRASH(); } + +void MacroAssemblerWasm32::tagValue(JSValueType, Register, ValueOperand) { + MOZ_CRASH(); +} + +void MacroAssemblerWasm32::retn(Imm32 n) { MOZ_CRASH(); } + +void MacroAssemblerWasm32::push(Register reg) { MOZ_CRASH(); } + +Address MacroAssemblerWasm32::ToType(const Address& address) { MOZ_CRASH(); } + +} // namespace js::jit diff --git a/js/src/jit/wasm32/MacroAssembler-wasm32.h b/js/src/jit/wasm32/MacroAssembler-wasm32.h new file mode 100644 index 000000000000..1ee794624f25 --- /dev/null +++ b/js/src/jit/wasm32/MacroAssembler-wasm32.h @@ -0,0 +1,533 @@ +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- + * vim: set ts=8 sts=2 et sw=2 tw=80: + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v. 2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ + +#ifndef jit_wasm32_MacroAssembler_wasm32_h +#define jit_wasm32_MacroAssembler_wasm32_h + +#include "jit/wasm32/Assembler-wasm32.h" + +namespace js::jit { + +class CompactBufferReader; + +class ScratchTagScope { + public: + ScratchTagScope(MacroAssembler&, const ValueOperand) {} + operator Register() { MOZ_CRASH(); } + void release() { MOZ_CRASH(); } + void reacquire() { MOZ_CRASH(); } +}; + +class ScratchTagScopeRelease { + public: + explicit ScratchTagScopeRelease(ScratchTagScope*) {} +}; + +class MacroAssemblerWasm32 : public Assembler { + public: + size_t size() const { return bytesNeeded(); } + + size_t bytesNeeded() const { MOZ_CRASH(); } + + size_t jumpRelocationTableBytes() const { MOZ_CRASH(); } + + size_t dataRelocationTableBytes() const { MOZ_CRASH(); } + + size_t preBarrierTableBytes() const { MOZ_CRASH(); } + + size_t numCodeLabels() const { MOZ_CRASH(); } + CodeLabel codeLabel(size_t) { MOZ_CRASH(); } + + bool reserve(size_t size) { MOZ_CRASH(); } + bool appendRawCode(const uint8_t* code, size_t numBytes) { MOZ_CRASH(); } + bool swapBuffer(wasm::Bytes& bytes) { MOZ_CRASH(); } + + void assertNoGCThings() const { MOZ_CRASH(); } + + static void TraceJumpRelocations(JSTracer*, JitCode*, CompactBufferReader&) { + MOZ_CRASH(); + } + static void TraceDataRelocations(JSTracer*, JitCode*, CompactBufferReader&) { + MOZ_CRASH(); + } + + static bool SupportsFloatingPoint() { return true; } + static bool SupportsUnalignedAccesses() { return false; } + static bool SupportsFastUnalignedFPAccesses() { return false; } + + void executableCopy(void* buffer); + + void copyJumpRelocationTable(uint8_t*) { MOZ_CRASH(); } + + void copyDataRelocationTable(uint8_t*) { MOZ_CRASH(); } + + void copyPreBarrierTable(uint8_t*) { MOZ_CRASH(); } + + void processCodeLabels(uint8_t*) { MOZ_CRASH(); } + + void flushBuffer() { MOZ_CRASH(); } + + void bind(Label* label) { MOZ_CRASH(); } + + void bind(CodeLabel* label) { MOZ_CRASH(); } + + template + void j(Condition, T) { + MOZ_CRASH(); + } + + void jump(Label* label); + + void jump(JitCode* code) { MOZ_CRASH(); } + + void jump(Register reg) { MOZ_CRASH(); } + + void jump(const Address& address) { MOZ_CRASH(); } + + void jump(ImmPtr ptr) { MOZ_CRASH(); } + + void jump(TrampolinePtr code) { MOZ_CRASH(); } + + void writeCodePointer(CodeLabel* label); + + void haltingAlign(size_t); + + void nopAlign(size_t); + void checkStackAlignment(); + + uint32_t currentOffset(); + + void nop(); + + void breakpoint(); + + void abiret(); + void ret(); + + CodeOffset toggledJump(Label*); + CodeOffset toggledCall(JitCode*, bool); + static size_t ToggledCallSize(uint8_t*); + + void finish(); + + template + void moveValue(T, S) { + MOZ_CRASH(); + } + + template + void moveValue(T, S, U) { + MOZ_CRASH(); + } + + template + void storeValue(const T&, const S&) { + MOZ_CRASH(); + } + + template + void storeValue(T, S, U) { + MOZ_CRASH(); + } + + template + void storePrivateValue(const T&, const S&) { + MOZ_CRASH(); + } + + template + void loadValue(T, S) { + MOZ_CRASH(); + } + + template + void loadUnalignedValue(T, S) { + MOZ_CRASH(); + } + + template + void pushValue(const T&) { + MOZ_CRASH(); + } + + void pushValue(ValueOperand val); + + template + void pushValue(T, S) { + MOZ_CRASH(); + } + + void popValue(ValueOperand); + void tagValue(JSValueType, Register, ValueOperand); + void retn(Imm32 n); + + template + void push(const T&) { + MOZ_CRASH(); + } + + void push(Register reg); + + template + void Push(T) { + MOZ_CRASH(); + } + + template + void pop(T) { + MOZ_CRASH(); + } + + template + CodeOffset pushWithPatch(T) { + MOZ_CRASH(); + } + + void testNullSet(Condition, ValueOperand, Register) { MOZ_CRASH(); } + void testObjectSet(Condition, ValueOperand, Register) { MOZ_CRASH(); } + void testUndefinedSet(Condition, ValueOperand, Register) { MOZ_CRASH(); } + + template + void cmpPtrSet(Condition, T, S, Register) { + MOZ_CRASH(); + } + + template + void mov(T, Register) { + MOZ_CRASH(); + } + + template + void movePtr(T, Register) { + MOZ_CRASH(); + } + + void movePtr(Register src, Register dst) { MOZ_CRASH(); } + + template + void move32(const T&, Register) { + MOZ_CRASH(); + } + + template + void movq(T, S) { + MOZ_CRASH(); + } + + template + void moveFloat32(T, S) { + MOZ_CRASH(); + } + + template + void moveDouble(T, S) { + MOZ_CRASH(); + } + + template + void move64(T, S) { + MOZ_CRASH(); + } + + template + CodeOffset movWithPatch(T, Register) { + MOZ_CRASH(); + } + + template + void loadPtr(T, Register) { + MOZ_CRASH(); + } + + void loadPtr(const Address& address, Register dest) { MOZ_CRASH(); } + + template + void load32(T, Register) { + MOZ_CRASH(); + } + + template + void load32Unaligned(T, Register) { + MOZ_CRASH(); + } + + template + void loadFloat32(T, FloatRegister) { + MOZ_CRASH(); + } + + template + void loadDouble(T, FloatRegister) { + MOZ_CRASH(); + } + + template + void loadPrivate(T, Register) { + MOZ_CRASH(); + } + + template + void load8SignExtend(T, Register) { + MOZ_CRASH(); + } + + template + void load8ZeroExtend(T, Register) { + MOZ_CRASH(); + } + + template + void load16SignExtend(T, Register) { + MOZ_CRASH(); + } + + template + void load16UnalignedSignExtend(T, Register) { + MOZ_CRASH(); + } + + template + void load16ZeroExtend(T, Register) { + MOZ_CRASH(); + } + + template + void load16UnalignedZeroExtend(T, Register) { + MOZ_CRASH(); + } + + template + void load64(T, Register64) { + MOZ_CRASH(); + } + + template + void load64Unaligned(T, Register64) { + MOZ_CRASH(); + } + + template + void storePtr(const T&, S) { + MOZ_CRASH(); + } + + void storePtr(Register src, const Address& address) { MOZ_CRASH(); } + void storePtr(ImmPtr src, const Address& address) { MOZ_CRASH(); } + + template + void store32(T, S) { + MOZ_CRASH(); + } + + void store32(Imm32 src, const Address& address) { MOZ_CRASH(); } + + template + void store32_NoSecondScratch(T, S) { + MOZ_CRASH(); + } + + template + void store32Unaligned(T, S) { + MOZ_CRASH(); + } + + template + void storeFloat32(T, S) { + MOZ_CRASH(); + } + + template + void storeDouble(T, S) { + MOZ_CRASH(); + } + + template + void store8(T, S) { + MOZ_CRASH(); + } + + template + void store16(T, S) { + MOZ_CRASH(); + } + + template + void store16Unaligned(T, S) { + MOZ_CRASH(); + } + + template + void store64(T, S) { + MOZ_CRASH(); + } + + template + void store64Unaligned(T, S) { + MOZ_CRASH(); + } + + template + void computeEffectiveAddress(T, Register) { + MOZ_CRASH(); + } + + void splitTagForTest(ValueOperand, ScratchTagScope&) { MOZ_CRASH(); } + + void boxDouble(FloatRegister, ValueOperand, FloatRegister) { MOZ_CRASH(); } + void boxNonDouble(JSValueType, Register, ValueOperand) { MOZ_CRASH(); } + + template + void boxDouble(FloatRegister src, const T& dest) { + MOZ_CRASH(); + } + + template + void unboxInt32(T, Register) { + MOZ_CRASH(); + } + + template + void unboxBoolean(T, Register) { + MOZ_CRASH(); + } + + template + void unboxString(T, Register) { + MOZ_CRASH(); + } + + template + void unboxSymbol(T, Register) { + MOZ_CRASH(); + } + + template + void unboxBigInt(T, Register) { + MOZ_CRASH(); + } + + template + void unboxObject(T, Register) { + MOZ_CRASH(); + } + + void unboxObject(const Address& src, Register dest) { + unboxNonDouble(src, dest, JSVAL_TYPE_OBJECT); + } + + template + void unboxDouble(T, FloatRegister) { + MOZ_CRASH(); + } + + void unboxValue(const ValueOperand&, AnyRegister, JSValueType) { + MOZ_CRASH(); + } + + void unboxNonDouble(const ValueOperand&, Register, JSValueType) { + MOZ_CRASH(); + } + + void unboxNonDouble(const Address& address, Register dest, JSValueType type) { + MOZ_CRASH(); + } + + template + void unboxGCThingForGCBarrier(const T&, Register) { + MOZ_CRASH(); + } + + template + void unboxObjectOrNull(const T& src, Register dest) { + MOZ_CRASH(); + } + + void notBoolean(ValueOperand) { MOZ_CRASH(); } + [[nodiscard]] Register extractObject(Address, Register) { MOZ_CRASH(); } + [[nodiscard]] Register extractObject(ValueOperand, Register) { MOZ_CRASH(); } + [[nodiscard]] Register extractSymbol(ValueOperand, Register) { MOZ_CRASH(); } + [[nodiscard]] Register extractInt32(ValueOperand, Register) { MOZ_CRASH(); } + [[nodiscard]] Register extractBoolean(ValueOperand, Register) { MOZ_CRASH(); } + + template + [[nodiscard]] Register extractTag(T, Register) { + MOZ_CRASH(); + } + + void convertFloat32ToInt32(FloatRegister, Register, Label*, bool v = true) { + MOZ_CRASH(); + } + void convertDoubleToInt32(FloatRegister, Register, Label*, bool v = true) { + MOZ_CRASH(); + } + void convertDoubleToPtr(FloatRegister, Register, Label*, bool v = true) { + MOZ_CRASH(); + } + void convertBoolToInt32(Register, Register) { MOZ_CRASH(); } + void convertDoubleToFloat32(FloatRegister, FloatRegister) { MOZ_CRASH(); } + void convertInt32ToFloat32(Register, FloatRegister) { MOZ_CRASH(); } + + template + void convertInt32ToDouble(T, FloatRegister) { + MOZ_CRASH(); + } + + void convertFloat32ToDouble(FloatRegister, FloatRegister) { MOZ_CRASH(); } + + void boolValueToDouble(ValueOperand, FloatRegister) { MOZ_CRASH(); } + void boolValueToFloat32(ValueOperand, FloatRegister) { MOZ_CRASH(); } + void int32ValueToDouble(ValueOperand, FloatRegister) { MOZ_CRASH(); } + void int32ValueToFloat32(ValueOperand, FloatRegister) { MOZ_CRASH(); } + + void loadConstantDouble(double, FloatRegister) { MOZ_CRASH(); } + void loadConstantFloat32(float, FloatRegister) { MOZ_CRASH(); } + Condition testInt32Truthy(bool, ValueOperand) { MOZ_CRASH(); } + Condition testStringTruthy(bool, ValueOperand) { MOZ_CRASH(); } + Condition testBigIntTruthy(bool, ValueOperand) { MOZ_CRASH(); } + + template + void loadUnboxedValue(T, MIRType, AnyRegister) { + MOZ_CRASH(); + } + + template + void storeUnboxedPayload(ValueOperand value, T, size_t, JSValueType) { + MOZ_CRASH(); + } + + void convertUInt32ToDouble(Register, FloatRegister) { MOZ_CRASH(); } + void convertUInt32ToFloat32(Register, FloatRegister) { MOZ_CRASH(); } + void incrementInt32Value(Address) { MOZ_CRASH(); } + void ensureDouble(ValueOperand, FloatRegister, Label*) { MOZ_CRASH(); } + void handleFailureWithHandlerTail(Label*, Label*) { MOZ_CRASH(); } + + void buildFakeExitFrame(Register, uint32_t*) { MOZ_CRASH(); } + bool buildOOLFakeExitFrame(void*) { MOZ_CRASH(); } + + void setPrinter(Sprinter*) { MOZ_CRASH(); } + Operand ToPayload(Operand base) { MOZ_CRASH(); } + Address ToPayload(const Address& base) const { return base; } + + Register getStackPointer() const { return StackPointer; } + + // Instrumentation for entering and leaving the profiler. + void profilerEnterFrame(Register, Register) { MOZ_CRASH(); } + void profilerExitFrame() { MOZ_CRASH(); } + +#ifdef JS_NUNBOX32 + Address ToType(const Address& address); +#endif +}; + +typedef MacroAssemblerWasm32 MacroAssemblerSpecific; + +static inline bool GetTempRegForIntArg(uint32_t, uint32_t, Register*) { + MOZ_CRASH(); +} + +} // namespace js::jit + +#endif /* jit_wasm32_MacroAssembler_wasm32_h */ diff --git a/js/src/jit/wasm32/MoveEmitter-wasm32.h b/js/src/jit/wasm32/MoveEmitter-wasm32.h new file mode 100644 index 000000000000..01fc494dfdca --- /dev/null +++ b/js/src/jit/wasm32/MoveEmitter-wasm32.h @@ -0,0 +1,30 @@ +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- + * vim: set ts=8 sts=2 et sw=2 tw=80: + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v. 2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ + +#ifndef jit_wasm32_MoveEmitter_wasm32_h +#define jit_wasm32_MoveEmitter_wasm32_h + +#include "mozilla/Assertions.h" + +namespace js::jit { + +class MacroAssemblerWasm32; +class MoveResolver; +struct Register; + +class MoveEmitterWasm32 { + public: + explicit MoveEmitterWasm32(MacroAssemblerWasm32&) { MOZ_CRASH(); } + void emit(const MoveResolver&) { MOZ_CRASH(); } + void finish() { MOZ_CRASH(); } + void setScratchRegister(Register) { MOZ_CRASH(); } +}; + +typedef MoveEmitterWasm32 MoveEmitter; + +} // namespace js::jit + +#endif /* jit_wasm32_MoveEmitter_wasm32_h */ diff --git a/js/src/jit/wasm32/SharedICHelpers-wasm32-inl.h b/js/src/jit/wasm32/SharedICHelpers-wasm32-inl.h new file mode 100644 index 000000000000..d4629dc93f2d --- /dev/null +++ b/js/src/jit/wasm32/SharedICHelpers-wasm32-inl.h @@ -0,0 +1,32 @@ +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- + * vim: set ts=8 sts=2 et sw=2 tw=80: + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v. 2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ + +#ifndef jit_wasm32_SharedICHelpers_wasm32_inl_h +#define jit_wasm32_SharedICHelpers_wasm32_inl_h + +#include "jit/SharedICHelpers.h" + +namespace js::jit { + +inline void EmitBaselineTailCallVM(TrampolinePtr, MacroAssembler&, uint32_t) { + MOZ_CRASH(); +} +inline void EmitBaselineCreateStubFrameDescriptor(MacroAssembler&, Register, + uint32_t) { + MOZ_CRASH(); +} +inline void EmitBaselineCallVM(TrampolinePtr, MacroAssembler&) { MOZ_CRASH(); } + +static const uint32_t STUB_FRAME_SIZE = 0; +static const uint32_t STUB_FRAME_SAVED_STUB_OFFSET = 0; + +inline void EmitBaselineEnterStubFrame(MacroAssembler&, Register) { + MOZ_CRASH(); +} + +} // namespace js::jit + +#endif /* jit_wasm32_SharedICHelpers_wasm32_inl_h */ diff --git a/js/src/jit/wasm32/SharedICHelpers-wasm32.h b/js/src/jit/wasm32/SharedICHelpers-wasm32.h new file mode 100644 index 000000000000..f45b0858383c --- /dev/null +++ b/js/src/jit/wasm32/SharedICHelpers-wasm32.h @@ -0,0 +1,30 @@ +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- + * vim: set ts=8 sts=2 et sw=2 tw=80: + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v. 2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ + +#ifndef jit_wasm32_SharedICHelpers_wasm32_h +#define jit_wasm32_SharedICHelpers_wasm32_h + +namespace js::jit { + +static const size_t ICStackValueOffset = 0; + +inline void EmitRestoreTailCallReg(MacroAssembler&) { MOZ_CRASH(); } +inline void EmitRepushTailCallReg(MacroAssembler&) { MOZ_CRASH(); } +inline void EmitCallIC(MacroAssembler&, CodeOffset*) { MOZ_CRASH(); } +inline void EmitReturnFromIC(MacroAssembler&) { MOZ_CRASH(); } +inline void EmitBaselineLeaveStubFrame(MacroAssembler&, bool v = false) { + MOZ_CRASH(); +} +inline void EmitStubGuardFailure(MacroAssembler&) { MOZ_CRASH(); } + +template +inline void EmitPreBarrier(MacroAssembler&, T, MIRType) { + MOZ_CRASH(); +} + +} // namespace js::jit + +#endif /* jit_wasm32_SharedICHelpers_wasm32_h */ diff --git a/js/src/jit/wasm32/SharedICRegisters-wasm32.h b/js/src/jit/wasm32/SharedICRegisters-wasm32.h new file mode 100644 index 000000000000..23e43b223952 --- /dev/null +++ b/js/src/jit/wasm32/SharedICRegisters-wasm32.h @@ -0,0 +1,36 @@ +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- + * vim: set ts=8 sts=2 et sw=2 tw=80: + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v. 2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ + +#ifndef jit_wasm32_SharedICRegisters_wasm32_h +#define jit_wasm32_SharedICRegisters_wasm32_h + +#include "jit/Registers.h" +#include "jit/RegisterSets.h" +#include "jit/wasm32/MacroAssembler-wasm32.h" + +namespace js::jit { + +static constexpr Register BaselineStackReg = StackPointer; +static constexpr Register BaselineFrameReg = FramePointer; + +static constexpr ValueOperand R0 = JSReturnOperand; +static constexpr ValueOperand R1 = JSReturnOperand; +static constexpr ValueOperand R2 = JSReturnOperand; + +static constexpr Register ICTailCallReg{Registers::invalid_reg}; +static constexpr Register ICStubReg{Registers::invalid_reg}; + +static constexpr Register ExtractTemp0{Registers::invalid_reg}; +static constexpr Register ExtractTemp1{Registers::invalid_reg}; + +static constexpr FloatRegister FloatReg0 = {FloatRegisters::invalid_reg}; +static constexpr FloatRegister FloatReg1 = {FloatRegisters::invalid_reg}; +static constexpr FloatRegister FloatReg2 = {FloatRegisters::invalid_reg}; +static constexpr FloatRegister FloatReg3 = {FloatRegisters::invalid_reg}; + +} // namespace js::jit + +#endif /* jit_wasm32_SharedICRegisters_wasm32_h */ diff --git a/js/src/jit/wasm32/Trampoline-wasm32.cpp b/js/src/jit/wasm32/Trampoline-wasm32.cpp new file mode 100644 index 000000000000..7c4c4db348ce --- /dev/null +++ b/js/src/jit/wasm32/Trampoline-wasm32.cpp @@ -0,0 +1,46 @@ +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- + * vim: set ts=8 sts=2 et sw=2 tw=80: + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v. 2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ + +#include "jit/Bailouts.h" +#include "jit/BaselineIC.h" +#include "jit/JitRuntime.h" +#include "vm/Realm.h" + +using namespace js; +using namespace js::jit; + +void JitRuntime::generateEnterJIT(JSContext*, MacroAssembler&) { MOZ_CRASH(); } + +// static +mozilla::Maybe<::JS::ProfilingFrameIterator::RegisterState> +JitRuntime::getCppEntryRegisters(JitFrameLayout* frameStackAddress) { + return mozilla::Nothing{}; +} + +void JitRuntime::generateInvalidator(MacroAssembler&, Label*) { MOZ_CRASH(); } + +void JitRuntime::generateArgumentsRectifier(MacroAssembler&, + ArgumentsRectifierKind kind) { + MOZ_CRASH(); +} + +void JitRuntime::generateBailoutHandler(MacroAssembler&, Label*) { + MOZ_CRASH(); +} + +uint32_t JitRuntime::generatePreBarrier(JSContext*, MacroAssembler&, MIRType) { + MOZ_CRASH(); + return 0; +} + +void JitRuntime::generateBailoutTailStub(MacroAssembler&, Label*) { + MOZ_CRASH(); +} + +bool JitRuntime::generateVMWrapper(JSContext*, MacroAssembler&, + const VMFunctionData&, DynFn, uint32_t*) { + MOZ_CRASH(); +} diff --git a/js/src/util/Poison.h b/js/src/util/Poison.h index cb8e1abc64b1..629e3dffb572 100644 --- a/js/src/util/Poison.h +++ b/js/src/util/Poison.h @@ -87,7 +87,7 @@ const uint8_t JS_SCOPE_DATA_TRAILING_NAMES_PATTERN = 0xCC; * illegal in user mode. */ #if defined(JS_CODEGEN_X86) || defined(JS_CODEGEN_X64) || \ - defined(JS_CODEGEN_NONE) + defined(JS_CODEGEN_NONE) || defined(JS_CODEGEN_WASM32) # define JS_SWEPT_CODE_PATTERN 0xED // IN instruction, crashes in user mode. #elif defined(JS_CODEGEN_ARM) || defined(JS_CODEGEN_ARM64) # define JS_SWEPT_CODE_PATTERN 0xA3 // undefined instruction diff --git a/js/src/wasm/WasmBCMemory.cpp b/js/src/wasm/WasmBCMemory.cpp index 94e739090b13..87786eb481a7 100644 --- a/js/src/wasm/WasmBCMemory.cpp +++ b/js/src/wasm/WasmBCMemory.cpp @@ -1214,7 +1214,7 @@ static void Deallocate(BaseCompiler* bc, RegI32 rv, const Temps& temps) { bc->maybeFree(temps.t2); } -#elif defined(JS_CODEGEN_NONE) +#elif defined(JS_CODEGEN_NONE) || defined(JS_CODEGEN_WASM32) using Temps = Nothing; @@ -1375,7 +1375,7 @@ static void Deallocate(BaseCompiler* bc, AtomicOp op, RegI64 rv, RegI64 temp) { bc->freeI64(temp); } -#elif defined(JS_CODEGEN_NONE) +#elif defined(JS_CODEGEN_NONE) || defined(JS_CODEGEN_WASM32) static void PopAndAllocate(BaseCompiler*, AtomicOp, RegI64*, RegI64*, RegI64*) { } @@ -1550,7 +1550,7 @@ static void Deallocate(BaseCompiler* bc, RegI32 rv, const Temps& temps) { bc->maybeFree(temps.t2); } -#elif defined(JS_CODEGEN_NONE) +#elif defined(JS_CODEGEN_NONE) || defined(JS_CODEGEN_WASM32) using Temps = Nothing; @@ -1675,7 +1675,7 @@ static void Deallocate(BaseCompiler* bc, RegI64 rd, RegI64 rv) { bc->maybeFree(rd); } -#elif defined(JS_CODEGEN_NONE) +#elif defined(JS_CODEGEN_NONE) || defined(JS_CODEGEN_WASM32) static void PopAndAllocate(BaseCompiler*, RegI64*, RegI64*) {} static void Deallocate(BaseCompiler*, RegI64, RegI64) {} @@ -1860,7 +1860,7 @@ static void Deallocate(BaseCompiler* bc, RegI32 rexpect, RegI32 rnew, bc->maybeFree(temps.t2); } -#elif defined(JS_CODEGEN_NONE) +#elif defined(JS_CODEGEN_NONE) || defined(JS_CODEGEN_WASM32) using Temps = Nothing; @@ -2071,7 +2071,7 @@ static void Deallocate(BaseCompiler* bc, RegI64 rexpect, RegI64 rnew) { bc->freeI64(rnew); } -#elif defined(JS_CODEGEN_NONE) +#elif defined(JS_CODEGEN_NONE) || defined(JS_CODEGEN_WASM32) template static void PopAndAllocate(BaseCompiler* bc, RegI64* rexpect, RegI64* rnew, diff --git a/js/src/wasm/WasmBCRegDefs.h b/js/src/wasm/WasmBCRegDefs.h index 0ac4f09d6789..621ee7c6a92a 100644 --- a/js/src/wasm/WasmBCRegDefs.h +++ b/js/src/wasm/WasmBCRegDefs.h @@ -35,7 +35,7 @@ using namespace js::jit; // // Scratch register configuration. -#if defined(JS_CODEGEN_NONE) +#if defined(JS_CODEGEN_NONE) || defined(JS_CODEGEN_WASM32) # define RABALDR_SCRATCH_I32 # define RABALDR_SCRATCH_F32 # define RABALDR_SCRATCH_F64 diff --git a/js/src/wasm/WasmCompile.cpp b/js/src/wasm/WasmCompile.cpp index 9f29a3e7d399..06f365f2d4bf 100644 --- a/js/src/wasm/WasmCompile.cpp +++ b/js/src/wasm/WasmCompile.cpp @@ -74,7 +74,7 @@ uint32_t wasm::ObservedCPUFeatures() { #elif defined(JS_CODEGEN_LOONG64) MOZ_ASSERT(jit::GetLOONG64Flags() <= (UINT32_MAX >> ARCH_BITS)); return LOONG64 | (jit::GetLOONG64Flags() << ARCH_BITS); -#elif defined(JS_CODEGEN_NONE) +#elif defined(JS_CODEGEN_NONE) || defined(JS_CODEGEN_WASM32) return 0; #else # error "unknown architecture" diff --git a/js/src/wasm/WasmFrameIter.cpp b/js/src/wasm/WasmFrameIter.cpp index e612e057049c..228867903ebf 100644 --- a/js/src/wasm/WasmFrameIter.cpp +++ b/js/src/wasm/WasmFrameIter.cpp @@ -383,8 +383,7 @@ static const unsigned PushedRetAddr = 8; static const unsigned PushedFP = 16; static const unsigned SetFP = 20; static const unsigned PoppedFP = 4; -static const unsigned PoppedFPJitEntry = 0; -#elif defined(JS_CODEGEN_NONE) +#elif defined(JS_CODEGEN_NONE) || defined(JS_CODEGEN_WASM32) // Synthetic values to satisfy asserts and avoid compiler warnings. static const unsigned PushedRetAddr = 0; static const unsigned PushedFP = 1; diff --git a/js/src/wasm/WasmJS.cpp b/js/src/wasm/WasmJS.cpp index b6d26ff902da..3ecfe5064dfa 100644 --- a/js/src/wasm/WasmJS.cpp +++ b/js/src/wasm/WasmJS.cpp @@ -422,9 +422,12 @@ bool wasm::HasPlatformSupport(JSContext* cx) { return false; } +# ifndef __wasi__ + // WASI doesn't support signals so we don't have this function. if (!wasm::EnsureFullSignalHandlers(cx)) { return false; } +# endif if (!jit::JitSupportsAtomics()) { return false;