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Bug 1822246 - Part 3. Add patch file to moz.yaml. r=media-playback-reviewers,padenot
Depends on D172651 Differential Revision: https://phabricator.services.mozilla.com/D172652
This commit is contained in:
parent
6128506617
commit
1fb19c9d52
277
media/libtheora/clang-arm.patch
Normal file
277
media/libtheora/clang-arm.patch
Normal file
@ -0,0 +1,277 @@
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diff --git a/lib/arm/arm2gnu.pl b/lib/arm/arm2gnu.pl
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index 8cb68e4..d6fe09c 100755
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--- a/lib/arm/arm2gnu.pl
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+++ b/lib/arm/arm2gnu.pl
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@@ -25,6 +25,8 @@ $n=0;
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$thumb = 0; # ARM mode by default, not Thumb.
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@proc_stack = ();
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+printf (" .syntax unified\n");
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+
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LINE:
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while (<>) {
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diff --git a/lib/arm/armbits.s b/lib/arm/armbits.s
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index 9400722..fd6e444 100644
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--- a/lib/arm/armbits.s
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+++ b/lib/arm/armbits.s
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@@ -67,28 +67,28 @@ oc_pack_read_refill
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; negative.
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CMP r10,r11 ; ptr<stop => HI
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CMPHI r3,#7 ; available<=24 => HI
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- LDRHIB r14,[r11],#1 ; r14 = *ptr++
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+ LDRBHI r14,[r11],#1 ; r14 = *ptr++
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SUBHI r3,#8 ; available += 8
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; (HI) Stall...
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- ORRHI r2,r14,LSL r3 ; r2 = window|=r14<<32-available
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+ ORRHI r2,r2,r14,LSL r3 ; r2 = window|=r14<<32-available
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CMPHI r10,r11 ; ptr<stop => HI
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CMPHI r3,#7 ; available<=24 => HI
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- LDRHIB r14,[r11],#1 ; r14 = *ptr++
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+ LDRBHI r14,[r11],#1 ; r14 = *ptr++
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SUBHI r3,#8 ; available += 8
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; (HI) Stall...
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- ORRHI r2,r14,LSL r3 ; r2 = window|=r14<<32-available
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+ ORRHI r2,r2,r14,LSL r3 ; r2 = window|=r14<<32-available
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CMPHI r10,r11 ; ptr<stop => HI
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CMPHI r3,#7 ; available<=24 => HI
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- LDRHIB r14,[r11],#1 ; r14 = *ptr++
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+ LDRBHI r14,[r11],#1 ; r14 = *ptr++
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SUBHI r3,#8 ; available += 8
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; (HI) Stall...
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- ORRHI r2,r14,LSL r3 ; r2 = window|=r14<<32-available
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+ ORRHI r2,r2,r14,LSL r3 ; r2 = window|=r14<<32-available
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CMPHI r10,r11 ; ptr<stop => HI
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CMPHI r3,#7 ; available<=24 => HI
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- LDRHIB r14,[r11],#1 ; r14 = *ptr++
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+ LDRBHI r14,[r11],#1 ; r14 = *ptr++
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SUBHI r3,#8 ; available += 8
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; (HI) Stall...
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- ORRHI r2,r14,LSL r3 ; r2 = window|=r14<<32-available
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+ ORRHI r2,r2,r14,LSL r3 ; r2 = window|=r14<<32-available
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SUBS r3,r0,r3 ; r3 = available-=_bits, available<bits => GT
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BLT oc_pack_read_refill_last
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MOV r0,r2,LSR r0 ; r0 = window>>32-_bits
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@@ -104,14 +104,14 @@ oc_pack_read_refill_last
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CMP r11,r10 ; ptr<stop => LO
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; If we didn't hit the end of the packet, then pull enough of the next byte to
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; to fill up the window.
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- LDRLOB r14,[r11] ; (LO) r14 = *ptr
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+ LDRBLO r14,[r11] ; (LO) r14 = *ptr
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; Otherwise, set the EOF flag and pretend we have lots of available bits.
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MOVHS r14,#1 ; (HS) r14 = 1
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ADDLO r10,r3,r1 ; (LO) r10 = available
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STRHS r14,[r12,#8] ; (HS) eof = 1
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ANDLO r10,r10,#7 ; (LO) r10 = available&7
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MOVHS r3,#1<<30 ; (HS) available = OC_LOTS_OF_BITS
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- ORRLO r2,r14,LSL r10 ; (LO) r2 = window|=*ptr>>(available&7)
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+ ORRLO r2,r2,r14,LSL r10 ; (LO) r2 = window|=*ptr>>(available&7)
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MOV r0,r2,LSR r0 ; r0 = window>>32-_bits
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MOV r2,r2,LSL r1 ; r2 = window<<=_bits
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STR r11,[r12,#-4] ; ptr = r11
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@@ -183,32 +183,32 @@ oc_huff_token_decode_refill
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; We can't possibly need more than 15 bits, so available must be <= 15.
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; Therefore we can load at least two bytes without checking it.
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CMP r2,r3 ; ptr<stop => HI
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- LDRHIB r14,[r3],#1 ; r14 = *ptr++
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+ LDRBHI r14,[r3],#1 ; r14 = *ptr++
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RSBHI r5,r5,#24 ; (HI) available = 32-(available+=8)
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RSBLS r5,r5,#32 ; (LS) r5 = 32-available
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- ORRHI r4,r14,LSL r5 ; r4 = window|=r14<<32-available
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+ ORRHI r4,r4,r14,LSL r5 ; r4 = window|=r14<<32-available
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CMPHI r2,r3 ; ptr<stop => HI
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- LDRHIB r14,[r3],#1 ; r14 = *ptr++
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+ LDRBHI r14,[r3],#1 ; r14 = *ptr++
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SUBHI r5,#8 ; available += 8
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; (HI) Stall...
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- ORRHI r4,r14,LSL r5 ; r4 = window|=r14<<32-available
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+ ORRHI r4,r4,r14,LSL r5 ; r4 = window|=r14<<32-available
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; We can use unsigned compares for both the pointers and for available
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; (allowing us to chain condition codes) because available will never be
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; larger than 32 (or we wouldn't be here), and thus 32-available will never be
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; negative.
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CMPHI r2,r3 ; ptr<stop => HI
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CMPHI r5,#7 ; available<=24 => HI
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- LDRHIB r14,[r3],#1 ; r14 = *ptr++
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+ LDRBHI r14,[r3],#1 ; r14 = *ptr++
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SUBHI r5,#8 ; available += 8
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; (HI) Stall...
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- ORRHI r4,r14,LSL r5 ; r4 = window|=r14<<32-available
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+ ORRHI r4,r4,r14,LSL r5 ; r4 = window|=r14<<32-available
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CMP r2,r3 ; ptr<stop => HI
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MOVLS r5,#-1<<30 ; (LS) available = OC_LOTS_OF_BITS+32
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CMPHI r5,#7 ; (HI) available<=24 => HI
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- LDRHIB r14,[r3],#1 ; (HI) r14 = *ptr++
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+ LDRBHI r14,[r3],#1 ; (HI) r14 = *ptr++
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SUBHI r5,#8 ; (HI) available += 8
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; (HI) Stall...
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- ORRHI r4,r14,LSL r5 ; (HI) r4 = window|=r14<<32-available
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+ ORRHI r4,r4,r14,LSL r5 ; (HI) r4 = window|=r14<<32-available
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RSB r14,r10,#32 ; r14 = 32-n
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MOV r14,r4,LSR r14 ; r14 = bits=window>>32-n
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ADD r12,r12,r14 ;
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diff --git a/lib/arm/armfrag.s b/lib/arm/armfrag.s
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index 38627ed..38ee775 100644
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--- a/lib/arm/armfrag.s
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+++ b/lib/arm/armfrag.s
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@@ -357,7 +357,7 @@ ofrintra_v6_lp
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ORR r5, r5, r5, LSR #8 ; r5 = __777766
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PKHBT r2, r2, r3, LSL #16 ; r2 = 33221100
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PKHBT r3, r4, r5, LSL #16 ; r3 = 77665544
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- STRD r2, [r0], r1
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+ STRD r2, r3, [r0], r1
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BGT ofrintra_v6_lp
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LDMFD r13!,{r4-r6,PC}
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ENDP
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@@ -397,7 +397,7 @@ ofrinter_v6_lp
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USAT16 r12,#8, r12 ; r12= __66__44
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USAT16 r5, #8, r5 ; r4 = __77__55
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ORR r5, r12,r5, LSL #8 ; r5 = 33221100
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- STRD r4, [r0], r2
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+ STRD r4, r5, [r0], r2
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BGT ofrinter_v6_lp
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LDMFD r13!,{r4-r7,PC}
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ENDP
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@@ -439,7 +439,7 @@ ofrinter2_v6_lp
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USAT16 r8, #8, r8 ; r8 = __22__00
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USAT16 r7, #8, r7 ; r7 = __33__11
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ORR r8, r8, r7, LSL #8 ; r8 = 33221100
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- STRD r8, [r0], r3
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+ STRD r8, r9, [r0], r3
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BGT ofrinter2_v6_lp
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LDMFD r13!,{r4-r9,PC}
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ENDP
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diff --git a/lib/arm/armidct.s b/lib/arm/armidct.s
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index 68530c7..269f74b 100644
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--- a/lib/arm/armidct.s
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+++ b/lib/arm/armidct.s
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@@ -875,7 +875,7 @@ idct2_1core_v6 PROC
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LDR r3, OC_C4S4
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LDRSH r6, [r1], #16 ; r6 = x[1,0]
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SMULWB r12,r3, r2 ; r12= t[0,0]=OC_C4S4*x[0,0]>>16
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- LDRD r4, OC_C7S1 ; r4 = OC_C7S1; r5 = OC_C1S7
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+ LDRD r4, r5, OC_C7S1 ; r4 = OC_C7S1; r5 = OC_C1S7
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SMULWB r6, r3, r6 ; r6 = t[1,0]=OC_C4S4*x[1,0]>>16
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SMULWT r4, r4, r2 ; r4 = t[0,4]=OC_C7S1*x[0,1]>>16
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SMULWT r7, r5, r2 ; r7 = t[0,7]=OC_C1S7*x[0,1]>>16
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@@ -937,7 +937,7 @@ idct2_2core_down_v6 PROC
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MOV r7 ,#8 ; r7 = 8
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LDR r6, [r1], #16 ; r6 = <x[1,1]|x[1,0]>
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SMLAWB r12,r3, r2, r7 ; r12= (t[0,0]=OC_C4S4*x[0,0]>>16)+8
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- LDRD r4, OC_C7S1 ; r4 = OC_C7S1; r5 = OC_C1S7
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+ LDRD r4, r5, OC_C7S1 ; r4 = OC_C7S1; r5 = OC_C1S7
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SMLAWB r7, r3, r6, r7 ; r7 = (t[1,0]=OC_C4S4*x[1,0]>>16)+8
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SMULWT r5, r5, r2 ; r2 = t[0,7]=OC_C1S7*x[0,1]>>16
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PKHBT r12,r12,r7, LSL #16 ; r12= <t[1,0]+8|t[0,0]+8>
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@@ -1053,7 +1053,7 @@ idct3_2core_v6 PROC
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; r1 = const ogg_int16_t *_x (source)
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; Stage 1:
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LDRD r4, [r1], #16 ; r4 = <x[0,1]|x[0,0]>; r5 = <*|x[0,2]>
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- LDRD r10,OC_C6S2_3_v6 ; r10= OC_C6S2; r11= OC_C2S6
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+ LDRD r10, r11, OC_C6S2_3_v6 ; r10= OC_C6S2; r11= OC_C2S6
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; Stall
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SMULWB r3, r11,r5 ; r3 = t[0,3]=OC_C2S6*x[0,2]>>16
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LDR r11,OC_C4S4
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@@ -1132,12 +1132,12 @@ idct4_3core_v6 PROC
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; r1 = const ogg_int16_t *_x (source)
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; Stage 1:
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LDRD r10,[r1], #16 ; r10= <x[0,1]|x[0,0]>; r11= <x[0,3]|x[0,2]>
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- LDRD r2, OC_C5S3_4_v6 ; r2 = OC_C5S3; r3 = OC_C3S5
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+ LDRD r2, r3, OC_C5S3_4_v6 ; r2 = OC_C5S3; r3 = OC_C3S5
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LDRD r4, [r1], #16 ; r4 = <x[1,1]|x[1,0]>; r5 = <??|x[1,2]>
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SMULWT r9, r3, r11 ; r9 = t[0,6]=OC_C3S5*x[0,3]>>16
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SMULWT r8, r2, r11 ; r8 = -t[0,5]=OC_C5S3*x[0,3]>>16
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PKHBT r9, r9, r2 ; r9 = <0|t[0,6]>
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- LDRD r6, OC_C6S2_4_v6 ; r6 = OC_C6S2; r7 = OC_C2S6
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+ LDRD r6, r7, OC_C6S2_4_v6 ; r6 = OC_C6S2; r7 = OC_C2S6
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PKHBT r8, r8, r2 ; r9 = <0|-t[0,5]>
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SMULWB r3, r7, r11 ; r3 = t[0,3]=OC_C2S6*x[0,2]>>16
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SMULWB r2, r6, r11 ; r2 = t[0,2]=OC_C6S2*x[0,2]>>16
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@@ -1148,7 +1148,7 @@ idct4_3core_v6 PROC
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SMULWB r12,r11,r10 ; r12= t[0,0]=OC_C4S4*x[0,0]>>16
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PKHBT r2, r2, r5, LSL #16 ; r2 = <t[1,2]|t[0,2]>
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SMULWB r5, r11,r4 ; r5 = t[1,0]=OC_C4S4*x[1,0]>>16
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- LDRD r6, OC_C7S1_4_v6 ; r6 = OC_C7S1; r7 = OC_C1S7
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+ LDRD r6, r7, OC_C7S1_4_v6 ; r6 = OC_C7S1; r7 = OC_C1S7
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PKHBT r12,r12,r5, LSL #16 ; r12= <t[1,0]|t[0,0]>
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SMULWT r5, r7, r4 ; r5 = t[1,7]=OC_C1S7*x[1,1]>>16
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SMULWT r7, r7, r10 ; r7 = t[0,7]=OC_C1S7*x[0,1]>>16
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@@ -1216,10 +1216,10 @@ idct4_4core_down_v6 PROC
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; r1 = const ogg_int16_t *_x (source)
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; Stage 1:
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LDRD r10,[r1], #16 ; r10= <x[0,1]|x[0,0]>; r11= <x[0,3]|x[0,2]>
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- LDRD r2, OC_C5S3_4_v6 ; r2 = OC_C5S3; r3 = OC_C3S5
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+ LDRD r2, r3, OC_C5S3_4_v6 ; r2 = OC_C5S3; r3 = OC_C3S5
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LDRD r4, [r1], #16 ; r4 = <x[1,1]|x[1,0]>; r5 = <x[1,3]|x[1,2]>
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SMULWT r9, r3, r11 ; r9 = t[0,6]=OC_C3S5*x[0,3]>>16
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- LDRD r6, OC_C6S2_4_v6 ; r6 = OC_C6S2; r7 = OC_C2S6
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+ LDRD r6, r7, OC_C6S2_4_v6 ; r6 = OC_C6S2; r7 = OC_C2S6
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SMULWT r8, r2, r11 ; r8 = -t[0,5]=OC_C5S3*x[0,3]>>16
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; Here we cheat: row 3 had just a DC, so x[0,3]==x[1,3] by definition.
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PKHBT r9, r9, r9, LSL #16 ; r9 = <t[0,6]|t[0,6]>
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@@ -1234,7 +1234,7 @@ idct4_4core_down_v6 PROC
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SMLAWB r12,r11,r10,r7 ; r12= t[0,0]+8=(OC_C4S4*x[0,0]>>16)+8
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PKHBT r2, r2, r5, LSL #16 ; r2 = <t[1,2]|t[0,2]>
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SMLAWB r5, r11,r4 ,r7 ; r5 = t[1,0]+8=(OC_C4S4*x[1,0]>>16)+8
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- LDRD r6, OC_C7S1_4_v6 ; r6 = OC_C7S1; r7 = OC_C1S7
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+ LDRD r6, r7, OC_C7S1_4_v6 ; r6 = OC_C7S1; r7 = OC_C1S7
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PKHBT r12,r12,r5, LSL #16 ; r12= <t[1,0]+8|t[0,0]+8>
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SMULWT r5, r7, r4 ; r5 = t[1,7]=OC_C1S7*x[1,1]>>16
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SMULWT r7, r7, r10 ; r7 = t[0,7]=OC_C1S7*x[0,1]>>16
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@@ -1264,7 +1264,7 @@ idct8_8core_v6 PROC
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STMFD r13!,{r0,r14}
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; Stage 1:
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;5-6 rotation by 3pi/16
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- LDRD r10,OC_C5S3_4_v6 ; r10= OC_C5S3, r11= OC_C3S5
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+ LDRD r10, r11, OC_C5S3_4_v6 ; r10= OC_C5S3, r11= OC_C3S5
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LDR r4, [r1,#8] ; r4 = <x[0,5]|x[0,4]>
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LDR r7, [r1,#24] ; r7 = <x[1,5]|x[1,4]>
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SMULWT r5, r11,r4 ; r5 = OC_C3S5*x[0,5]>>16
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@@ -1281,7 +1281,7 @@ idct8_8core_v6 PROC
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PKHBT r6, r6, r11,LSL #16 ; r6 = <t[1,6]|t[0,6]>
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SMULWT r8, r10,r12 ; r8 = OC_C5S3*x[1,3]>>16
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;2-3 rotation by 6pi/16
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- LDRD r10,OC_C6S2_4_v6 ; r10= OC_C6S2, r11= OC_C2S6
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+ LDRD r10, r11, OC_C6S2_4_v6 ; r10= OC_C6S2, r11= OC_C2S6
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PKHBT r3, r3, r8, LSL #16 ; r3 = <r8|r3>
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LDR r8, [r1,#12] ; r8 = <x[0,7]|x[0,6]>
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SMULWB r2, r10,r0 ; r2 = OC_C6S2*x[0,2]>>16
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@@ -1297,7 +1297,7 @@ idct8_8core_v6 PROC
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PKHBT r3, r3, r10,LSL #16 ; r3 = <t[1,6]|t[0,6]>
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SMULWB r12,r11,r7 ; r12= OC_C2S6*x[1,6]>>16
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;4-7 rotation by 7pi/16
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- LDRD r10,OC_C7S1_8_v6 ; r10= OC_C7S1, r11= OC_C1S7
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+ LDRD r10, r11, OC_C7S1_8_v6 ; r10= OC_C7S1, r11= OC_C1S7
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PKHBT r9, r9, r12,LSL #16 ; r9 = <r9|r12>
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LDR r0, [r1],#16 ; r0 = <x[0,1]|x[0,0]>
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PKHTB r7, r7, r8, ASR #16 ; r7 = <x[1,7]|x[0,7]>
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@@ -1363,7 +1363,7 @@ idct8_8core_down_v6 PROC
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STMFD r13!,{r0,r14}
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; Stage 1:
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;5-6 rotation by 3pi/16
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- LDRD r10,OC_C5S3_8_v6 ; r10= OC_C5S3, r11= OC_C3S5
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+ LDRD r10, r11, OC_C5S3_8_v6 ; r10= OC_C5S3, r11= OC_C3S5
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LDR r4, [r1,#8] ; r4 = <x[0,5]|x[0,4]>
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LDR r7, [r1,#24] ; r7 = <x[1,5]|x[1,4]>
|
||||
SMULWT r5, r11,r4 ; r5 = OC_C3S5*x[0,5]>>16
|
||||
@@ -1380,7 +1380,7 @@ idct8_8core_down_v6 PROC
|
||||
PKHBT r6, r6, r11,LSL #16 ; r6 = <t[1,6]|t[0,6]>
|
||||
SMULWT r8, r10,r12 ; r8 = OC_C5S3*x[1,3]>>16
|
||||
;2-3 rotation by 6pi/16
|
||||
- LDRD r10,OC_C6S2_8_v6 ; r10= OC_C6S2, r11= OC_C2S6
|
||||
+ LDRD r10, r11, OC_C6S2_8_v6 ; r10= OC_C6S2, r11= OC_C2S6
|
||||
PKHBT r3, r3, r8, LSL #16 ; r3 = <r8|r3>
|
||||
LDR r8, [r1,#12] ; r8 = <x[0,7]|x[0,6]>
|
||||
SMULWB r2, r10,r0 ; r2 = OC_C6S2*x[0,2]>>16
|
||||
@@ -1396,7 +1396,7 @@ idct8_8core_down_v6 PROC
|
||||
PKHBT r3, r3, r10,LSL #16 ; r3 = <t[1,6]|t[0,6]>
|
||||
SMULWB r12,r11,r7 ; r12= OC_C2S6*x[1,6]>>16
|
||||
;4-7 rotation by 7pi/16
|
||||
- LDRD r10,OC_C7S1_8_v6 ; r10= OC_C7S1, r11= OC_C1S7
|
||||
+ LDRD r10, r11, OC_C7S1_8_v6 ; r10= OC_C7S1, r11= OC_C1S7
|
||||
PKHBT r9, r9, r12,LSL #16 ; r9 = <r9|r12>
|
||||
LDR r0, [r1],#16 ; r0 = <x[0,1]|x[0,0]>
|
||||
PKHTB r7, r7, r8, ASR #16 ; r7 = <x[1,7]|x[0,7]>
|
||||
--
|
||||
2.39.1
|
||||
|
@ -97,6 +97,9 @@ vendoring:
|
||||
- lib/config.h
|
||||
- update.sh
|
||||
|
||||
patches:
|
||||
- clang-arm.patch
|
||||
|
||||
update-actions:
|
||||
- action: run-script
|
||||
script: '{yaml_dir}/update.sh'
|
||||
|
Loading…
Reference in New Issue
Block a user