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Bug 1323115 - Enable BaselineJIT on aarch64. r=jandem,jolesen
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@ -37,6 +37,9 @@
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#include "jsalloc.h"
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#include "jit/arm/Simulator-arm.h"
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#if defined(JS_CODEGEN_ARM64)
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#include "jit/arm64/vixl/Cpu-vixl.h"
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#endif
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#include "jit/mips32/Simulator-mips32.h"
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#include "jit/mips64/Simulator-mips64.h"
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#include "js/GCAPI.h"
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@ -299,7 +302,7 @@ class ExecutableAllocator
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#elif defined(JS_CODEGEN_ARM64) && (defined(__linux__) || defined(ANDROID)) && defined(__GNUC__)
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static void cacheFlush(void* code, size_t size)
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{
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__clear_cache(code, (void *)((size_t)code + size));
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vixl::CPU::EnsureIAndDCacheCoherency(code, size);
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}
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#elif defined(__sparc__)
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static void cacheFlush(void* code, size_t size)
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@ -161,6 +161,7 @@ Assembler::executableCopy(uint8_t* buffer)
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// into a single instruction call + nop in some instances, but this will work.
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}
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}
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AutoFlushICache::setRange(uintptr_t(buffer), armbuffer_.size());
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}
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BufferOffset
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@ -908,7 +908,7 @@ fi
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dnl Configure JIT support
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case "$CPU_ARCH" in
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x86|x86_64|arm|mips*)
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x86|x86_64|arm|aarch64|mips*)
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ENABLE_ION=1
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;;
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esac
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@ -1728,6 +1728,9 @@ elif test "$CPU_ARCH" = "arm"; then
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dnl ARM platforms may trap on unaligned accesses; catch the signal and
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dnl recover.
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elif test "$CPU_ARCH" = "aarch64"; then
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AC_DEFINE(JS_CODEGEN_ARM64)
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JS_CODEGEN_ARM64=1
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elif test "$CPU_ARCH" = "mips32"; then
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AC_DEFINE(JS_CODEGEN_MIPS32)
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JS_CODEGEN_MIPS32=1
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