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[JAEGER] x64: Dedicated Type and Payload Mask Registers. no_r=me.
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@ -53,6 +53,8 @@ struct Registers {
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// TODO: Eliminate scratch register (requires rewriting register allocation mechanism)
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#if defined(JS_CPU_X64)
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static const RegisterID TypeMaskReg = JSC::X86Registers::r13;
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static const RegisterID PayloadMaskReg = JSC::X86Registers::r14;
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static const RegisterID ValueReg = JSC::X86Registers::r15;
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#endif
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@ -105,9 +107,9 @@ struct Registers {
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static const uint32 SavedRegs =
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/* r11 is scratchRegister, used by JSC. */
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(1 << JSC::X86Registers::r12)
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| (1 << JSC::X86Registers::r13)
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| (1 << JSC::X86Registers::r14)
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// TODO: Remove ValueReg | (1 << JSC::X86Registers::r15)
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// r13 is TypeMaskReg.
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// r14 is PayloadMaskReg.
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// r15 is ValueReg.
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# if defined(_MSC_VER)
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| (1 << JSC::X86Registers::esi)
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| (1 << JSC::X86Registers::edi)
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@ -172,6 +172,9 @@ JS_STATIC_ASSERT(sizeof(VMFrame) % 16 == 0);
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JS_STATIC_ASSERT(offsetof(VMFrame, savedRBX) == 0x58);
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JS_STATIC_ASSERT(offsetof(VMFrame, fp) == 0x38);
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JS_STATIC_ASSERT(JSVAL_TAG_MASK == 0xFFFF800000000000LL);
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JS_STATIC_ASSERT(JSVAL_PAYLOAD_MASK == 0x00007FFFFFFFFFFFLL);
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asm volatile (
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".text\n"
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".globl " SYMBOL_STRING(JaegerTrampoline) "\n"
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@ -186,6 +189,10 @@ SYMBOL_STRING(JaegerTrampoline) ":" "\n"
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"pushq %r15" "\n"
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"pushq %rbx" "\n"
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/* Load mask registers. */
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"movq $0xFFFF800000000000, %r13" "\n"
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"movq $0x00007FFFFFFFFFFF, %r14" "\n"
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/* Build the JIT frame.
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* rdi = cx
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* rsi = fp
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@ -260,9 +267,6 @@ SYMBOL_STRING(JaegerThrowpoline) ":" "\n"
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JS_STATIC_ASSERT(offsetof(JSStackFrame, ncode) == 0x60);
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JS_STATIC_ASSERT(offsetof(VMFrame, fp) == 0x38);
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JS_STATIC_ASSERT(JSVAL_TAG_MASK == 0xFFFF800000000000LL);
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JS_STATIC_ASSERT(JSVAL_PAYLOAD_MASK == 0x00007FFFFFFFFFFFLL);
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asm volatile (
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".text\n"
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".globl " SYMBOL_STRING(SafePointTrampoline) "\n"
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@ -280,7 +284,7 @@ SYMBOL_STRING(InjectJaegerReturn) ":" "\n"
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"movq 0x60(%rbx), %rax" "\n" /* fp->ncode */
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/* Reimplementation of PunboxAssembler::loadValueAsComponents() */
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"movq $0x00007FFFFFFFFFFF, %rdx" "\n" /* payloadReg = JSVAL_PAYLOAD_MASK */
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"movq %r14, %rdx" "\n" /* payloadReg = payloadMaskReg */
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"andq %rcx, %rdx" "\n"
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"xorq %rdx, %rcx" "\n"
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@ -113,11 +113,11 @@ class Assembler : public BaseAssembler
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}
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void convertValueToType(RegisterID val) {
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andPtr(Imm64(JSVAL_TAG_MASK), val);
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andPtr(Registers::TypeMaskReg, val);
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}
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void convertValueToPayload(RegisterID val) {
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andPtr(Imm64(JSVAL_PAYLOAD_MASK), val);
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andPtr(Registers::PayloadMaskReg, val);
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}
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/* Returns a label after the one Value load. */
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@ -125,7 +125,7 @@ class Assembler : public BaseAssembler
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loadValue(address, type);
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Label l = label();
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move(Imm64(JSVAL_PAYLOAD_MASK), payload);
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move(Registers::PayloadMaskReg, payload);
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andPtr(type, payload);
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xorPtr(payload, type);
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