[JAEGER] x64: Dedicated Type and Payload Mask Registers. no_r=me.

This commit is contained in:
Sean Stangl 2010-08-22 00:42:58 -07:00
parent c9015a1f60
commit 23154dc5b9
3 changed files with 16 additions and 10 deletions

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@ -53,6 +53,8 @@ struct Registers {
// TODO: Eliminate scratch register (requires rewriting register allocation mechanism) // TODO: Eliminate scratch register (requires rewriting register allocation mechanism)
#if defined(JS_CPU_X64) #if defined(JS_CPU_X64)
static const RegisterID TypeMaskReg = JSC::X86Registers::r13;
static const RegisterID PayloadMaskReg = JSC::X86Registers::r14;
static const RegisterID ValueReg = JSC::X86Registers::r15; static const RegisterID ValueReg = JSC::X86Registers::r15;
#endif #endif
@ -105,9 +107,9 @@ struct Registers {
static const uint32 SavedRegs = static const uint32 SavedRegs =
/* r11 is scratchRegister, used by JSC. */ /* r11 is scratchRegister, used by JSC. */
(1 << JSC::X86Registers::r12) (1 << JSC::X86Registers::r12)
| (1 << JSC::X86Registers::r13) // r13 is TypeMaskReg.
| (1 << JSC::X86Registers::r14) // r14 is PayloadMaskReg.
// TODO: Remove ValueReg | (1 << JSC::X86Registers::r15) // r15 is ValueReg.
# if defined(_MSC_VER) # if defined(_MSC_VER)
| (1 << JSC::X86Registers::esi) | (1 << JSC::X86Registers::esi)
| (1 << JSC::X86Registers::edi) | (1 << JSC::X86Registers::edi)

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@ -172,6 +172,9 @@ JS_STATIC_ASSERT(sizeof(VMFrame) % 16 == 0);
JS_STATIC_ASSERT(offsetof(VMFrame, savedRBX) == 0x58); JS_STATIC_ASSERT(offsetof(VMFrame, savedRBX) == 0x58);
JS_STATIC_ASSERT(offsetof(VMFrame, fp) == 0x38); JS_STATIC_ASSERT(offsetof(VMFrame, fp) == 0x38);
JS_STATIC_ASSERT(JSVAL_TAG_MASK == 0xFFFF800000000000LL);
JS_STATIC_ASSERT(JSVAL_PAYLOAD_MASK == 0x00007FFFFFFFFFFFLL);
asm volatile ( asm volatile (
".text\n" ".text\n"
".globl " SYMBOL_STRING(JaegerTrampoline) "\n" ".globl " SYMBOL_STRING(JaegerTrampoline) "\n"
@ -186,6 +189,10 @@ SYMBOL_STRING(JaegerTrampoline) ":" "\n"
"pushq %r15" "\n" "pushq %r15" "\n"
"pushq %rbx" "\n" "pushq %rbx" "\n"
/* Load mask registers. */
"movq $0xFFFF800000000000, %r13" "\n"
"movq $0x00007FFFFFFFFFFF, %r14" "\n"
/* Build the JIT frame. /* Build the JIT frame.
* rdi = cx * rdi = cx
* rsi = fp * rsi = fp
@ -260,9 +267,6 @@ SYMBOL_STRING(JaegerThrowpoline) ":" "\n"
JS_STATIC_ASSERT(offsetof(JSStackFrame, ncode) == 0x60); JS_STATIC_ASSERT(offsetof(JSStackFrame, ncode) == 0x60);
JS_STATIC_ASSERT(offsetof(VMFrame, fp) == 0x38); JS_STATIC_ASSERT(offsetof(VMFrame, fp) == 0x38);
JS_STATIC_ASSERT(JSVAL_TAG_MASK == 0xFFFF800000000000LL);
JS_STATIC_ASSERT(JSVAL_PAYLOAD_MASK == 0x00007FFFFFFFFFFFLL);
asm volatile ( asm volatile (
".text\n" ".text\n"
".globl " SYMBOL_STRING(SafePointTrampoline) "\n" ".globl " SYMBOL_STRING(SafePointTrampoline) "\n"
@ -280,7 +284,7 @@ SYMBOL_STRING(InjectJaegerReturn) ":" "\n"
"movq 0x60(%rbx), %rax" "\n" /* fp->ncode */ "movq 0x60(%rbx), %rax" "\n" /* fp->ncode */
/* Reimplementation of PunboxAssembler::loadValueAsComponents() */ /* Reimplementation of PunboxAssembler::loadValueAsComponents() */
"movq $0x00007FFFFFFFFFFF, %rdx" "\n" /* payloadReg = JSVAL_PAYLOAD_MASK */ "movq %r14, %rdx" "\n" /* payloadReg = payloadMaskReg */
"andq %rcx, %rdx" "\n" "andq %rcx, %rdx" "\n"
"xorq %rdx, %rcx" "\n" "xorq %rdx, %rcx" "\n"

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@ -113,11 +113,11 @@ class Assembler : public BaseAssembler
} }
void convertValueToType(RegisterID val) { void convertValueToType(RegisterID val) {
andPtr(Imm64(JSVAL_TAG_MASK), val); andPtr(Registers::TypeMaskReg, val);
} }
void convertValueToPayload(RegisterID val) { void convertValueToPayload(RegisterID val) {
andPtr(Imm64(JSVAL_PAYLOAD_MASK), val); andPtr(Registers::PayloadMaskReg, val);
} }
/* Returns a label after the one Value load. */ /* Returns a label after the one Value load. */
@ -125,7 +125,7 @@ class Assembler : public BaseAssembler
loadValue(address, type); loadValue(address, type);
Label l = label(); Label l = label();
move(Imm64(JSVAL_PAYLOAD_MASK), payload); move(Registers::PayloadMaskReg, payload);
andPtr(type, payload); andPtr(type, payload);
xorPtr(payload, type); xorPtr(payload, type);