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Bug 1294606 - Part 1: Implement LIRGenerator::useByteOpRegisterAtStart. r=nbp

Browse Source 
---
 js/src/jit/arm/Lowering-arm.cpp                 | 6 ++++++
 js/src/jit/arm/Lowering-arm.h                   | 1 +
 js/src/jit/arm64/Lowering-arm64.cpp             | 6 ++++++
 js/src/jit/arm64/Lowering-arm64.h               | 1 +
 js/src/jit/mips-shared/Lowering-mips-shared.cpp | 6 ++++++
 js/src/jit/mips-shared/Lowering-mips-shared.h   | 1 +
 js/src/jit/none/Lowering-none.h                 | 1 +
 js/src/jit/x64/Lowering-x64.cpp                 | 6 ++++++
 js/src/jit/x64/Lowering-x64.h                   | 1 +
 js/src/jit/x86/Lowering-x86.cpp                 | 6 ++++++
 js/src/jit/x86/Lowering-x86.h                   | 1 +
 11 files changed, 36 insertions(+)
This commit is contained in:
Heiher 2016-08-21 22:16:09 +08:00
parent 00e1330640
commit 246b59f85c
11 changed files with 36 additions and 0 deletions
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6
js/src/jit/arm/Lowering-arm.cpp
View File

@ -34,6 +34,12 @@ LIRGeneratorARM::useByteOpRegister(MDefinition* mir)
return useRegister(mir);
}
LAllocation
LIRGeneratorARM::useByteOpRegisterAtStart(MDefinition* mir)
{
return useRegisterAtStart(mir);
}
LAllocation
LIRGeneratorARM::useByteOpRegisterOrNonDoubleConstant(MDefinition* mir)
{

1
js/src/jit/arm/Lowering-arm.h
View File

@ -27,6 +27,7 @@ class LIRGeneratorARM : public LIRGeneratorShared
// x86 has constraints on what registers can be formatted for 1-byte
// stores and loads; on ARM all registers are okay.
LAllocation useByteOpRegister(MDefinition* mir);
LAllocation useByteOpRegisterAtStart(MDefinition* mir);
LAllocation useByteOpRegisterOrNonDoubleConstant(MDefinition* mir);
LDefinition tempByteOpRegister();

6
js/src/jit/arm64/Lowering-arm64.cpp
View File

@ -29,6 +29,12 @@ LIRGeneratorARM64::useByteOpRegister(MDefinition* mir)
MOZ_CRASH("useByteOpRegister");
}
LAllocation
LIRGeneratorARM64::useByteOpRegisterAtStart(MDefinition* mir)
{
MOZ_CRASH("useByteOpRegister");
}
LAllocation
LIRGeneratorARM64::useByteOpRegisterOrNonDoubleConstant(MDefinition* mir)
{

1
js/src/jit/arm64/Lowering-arm64.h
View File

@ -25,6 +25,7 @@ class LIRGeneratorARM64 : public LIRGeneratorShared
bool useAtStart = false);
LAllocation useByteOpRegister(MDefinition* mir);
LAllocation useByteOpRegisterAtStart(MDefinition* mir);
LAllocation useByteOpRegisterOrNonDoubleConstant(MDefinition* mir);
inline LDefinition tempToUnbox() {

6
js/src/jit/mips-shared/Lowering-mips-shared.cpp
View File

@ -23,6 +23,12 @@ LIRGeneratorMIPSShared::useByteOpRegister(MDefinition* mir)
return useRegister(mir);
}
LAllocation
LIRGeneratorMIPSShared::useByteOpRegisterAtStart(MDefinition* mir)
{
return useRegisterAtStart(mir);
}
LAllocation
LIRGeneratorMIPSShared::useByteOpRegisterOrNonDoubleConstant(MDefinition* mir)
{

1
js/src/jit/mips-shared/Lowering-mips-shared.h
View File

@ -23,6 +23,7 @@ class LIRGeneratorMIPSShared : public LIRGeneratorShared
// x86 has constraints on what registers can be formatted for 1-byte
// stores and loads; on MIPS all registers are okay.
LAllocation useByteOpRegister(MDefinition* mir);
LAllocation useByteOpRegisterAtStart(MDefinition* mir);
LAllocation useByteOpRegisterOrNonDoubleConstant(MDefinition* mir);
LDefinition tempByteOpRegister();

1
js/src/jit/none/Lowering-none.h
View File

@ -24,6 +24,7 @@ class LIRGeneratorNone : public LIRGeneratorShared
LBoxAllocation useBoxFixed(MDefinition*, Register, Register, bool useAtStart = false) { MOZ_CRASH(); }
LAllocation useByteOpRegister(MDefinition*) { MOZ_CRASH(); }
LAllocation useByteOpRegisterAtStart(MDefinition*) { MOZ_CRASH(); }
LAllocation useByteOpRegisterOrNonDoubleConstant(MDefinition*) { MOZ_CRASH(); }
LDefinition tempByteOpRegister() { MOZ_CRASH(); }
LDefinition tempToUnbox() { MOZ_CRASH(); }

6
js/src/jit/x64/Lowering-x64.cpp
View File

@ -29,6 +29,12 @@ LIRGeneratorX64::useByteOpRegister(MDefinition* mir)
return useRegister(mir);
}
LAllocation
LIRGeneratorX64::useByteOpRegisterAtStart(MDefinition* mir)
{
return useRegisterAtStart(mir);
}
LAllocation
LIRGeneratorX64::useByteOpRegisterOrNonDoubleConstant(MDefinition* mir)
{

1
js/src/jit/x64/Lowering-x64.h
View File

@ -35,6 +35,7 @@ class LIRGeneratorX64 : public LIRGeneratorX86Shared
// x86 has constraints on what registers can be formatted for 1-byte
// stores and loads; on x64 all registers are okay.
LAllocation useByteOpRegister(MDefinition* mir);
LAllocation useByteOpRegisterAtStart(MDefinition* mir);
LAllocation useByteOpRegisterOrNonDoubleConstant(MDefinition* mir);
LDefinition tempByteOpRegister();

6
js/src/jit/x86/Lowering-x86.cpp
View File

@ -31,6 +31,12 @@ LIRGeneratorX86::useByteOpRegister(MDefinition* mir)
return useFixed(mir, eax);
}
LAllocation
LIRGeneratorX86::useByteOpRegisterAtStart(MDefinition* mir)
{
return useFixedAtStart(mir, eax);
}
LAllocation
LIRGeneratorX86::useByteOpRegisterOrNonDoubleConstant(MDefinition* mir)
{

1
js/src/jit/x86/Lowering-x86.h
View File

@ -30,6 +30,7 @@ class LIRGeneratorX86 : public LIRGeneratorX86Shared
// will assert on us.) Ideally, we'd just ask the register allocator to
// give us one of {al,bl,cl,dl}. For now, just useFixed(al).
LAllocation useByteOpRegister(MDefinition* mir);
LAllocation useByteOpRegisterAtStart(MDefinition* mir);
LAllocation useByteOpRegisterOrNonDoubleConstant(MDefinition* mir);
LDefinition tempByteOpRegister();