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Bug 1697818 - Drop handrolled NEON SIMD wrappers. r=aosmond
We require Rust 1.50 now which is new enough to not need these wrappers anymore. Differential Revision: https://phabricator.services.mozilla.com/D108337
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@ -1,8 +1,14 @@
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use crate::transform::{qcms_transform, Format, BGRA, CLAMPMAXVAL, FLOATSCALE, RGB, RGBA};
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#[cfg(target_arch = "aarch64")]
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use core::arch::aarch64::{float32x4_t, int32x4_t, vaddq_f32};
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use core::arch::aarch64::{
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float32x4_t, int32x4_t, vaddq_f32, vcvtq_s32_f32, vgetq_lane_s32, vld1q_dup_f32, vld1q_f32,
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vmaxq_f32, vminq_f32, vmulq_f32,
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};
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#[cfg(target_arch = "arm")]
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use core::arch::arm::{float32x4_t, int32x4_t, vaddq_f32};
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use core::arch::arm::{
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float32x4_t, int32x4_t, vaddq_f32, vcvtq_s32_f32, vgetq_lane_s32, vld1q_dup_f32, vld1q_f32,
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vmaxq_f32, vminq_f32, vmulq_f32,
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};
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use std::mem::zeroed;
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static mut floatScale: f32 = FLOATSCALE;
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@ -150,106 +156,3 @@ pub unsafe fn qcms_transform_data_bgra_out_lut_neon(
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) {
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qcms_transform_data_template_lut_neon::<BGRA>(transform, src, dest, length);
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}
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use std::mem::transmute;
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg(target_arch = "aarch64")]
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pub unsafe fn vld1q_f32(addr: *const f32) -> float32x4_t {
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transmute([*addr, *addr.offset(1), *addr.offset(2), *addr.offset(3)])
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}
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#[inline]
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#[cfg(target_arch = "arm")]
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#[target_feature(enable = "neon")]
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#[target_feature(enable = "v7")]
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pub unsafe fn vld1q_f32(addr: *const f32) -> float32x4_t {
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vld1q_v4f32(addr as *const u8, 4)
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}
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#[cfg(target_arch = "arm")]
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#[allow(improper_ctypes)]
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extern "C" {
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#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vld1.v4f32.p0i8")]
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fn vld1q_v4f32(addr: *const u8, align: u32) -> float32x4_t;
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}
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#[cfg(target_arch = "aarch64")]
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#[allow(improper_ctypes)]
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extern "C" {
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#[link_name = "llvm.aarch64.neon.fcvtzs.v4.v4f32"]
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fn vcvtq_s32_f32_(a: float32x4_t) -> int32x4_t;
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}
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#[allow(improper_ctypes)]
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extern "C" {
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#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxs.v4f32")]
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.fmax.v4f32")]
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fn vmaxq_f32_(a: float32x4_t, b: float32x4_t) -> float32x4_t;
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#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmins.v4f32")]
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.fmin.v4f32")]
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fn vminq_f32_(a: float32x4_t, b: float32x4_t) -> float32x4_t;
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}
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/// Move vector element to general-purpose register
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#[inline]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
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pub unsafe fn vgetq_lane_s32(v: int32x4_t, imm5: i32) -> i32 {
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assert!(imm5 >= 0 && imm5 <= 3);
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simd_extract(v, imm5 as u32)
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}
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/// Multiply
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
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pub unsafe fn vmulq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
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simd_mul(a, b)
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}
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/// Floating-point minimum (vector).
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
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pub unsafe fn vminq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
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vminq_f32_(a, b)
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}
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/// Floating-point maxmimum (vector).
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
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pub unsafe fn vmaxq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
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vmaxq_f32_(a, b)
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}
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#[inline]
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#[cfg(target_arch = "aarch64")]
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#[target_feature(enable = "neon")]
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pub unsafe fn vcvtq_s32_f32(a: float32x4_t) -> int32x4_t {
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vcvtq_s32_f32_(a)
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}
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/// Floating-point Convert to Signed fixed-point, rounding toward Zero (vector)
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#[inline]
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#[cfg(target_arch = "arm")]
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#[target_feature(enable = "neon")]
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#[target_feature(enable = "v7")]
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pub unsafe fn vcvtq_s32_f32(a: float32x4_t) -> int32x4_t {
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simd_cast::<_, int32x4_t>(a)
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}
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/// Load one single-element structure and Replicate to all lanes (of one register).
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
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pub unsafe fn vld1q_dup_f32(addr: *const f32) -> float32x4_t {
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let v = *addr;
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transmute([v, v, v, v])
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}
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extern "platform-intrinsic" {
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pub fn simd_mul<T>(x: T, y: T) -> T;
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pub fn simd_extract<T, U>(x: T, idx: u32) -> U;
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pub fn simd_cast<T, U>(x: T) -> U;
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}
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