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Bug 1693912 - Renumber SIMD instructions based on final spec. r=rhunt

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Renumbers instructions based on final SIMD spec.

Removes I16x8AnyTrue / I32x4AnyTrue

Differential Revision: https://phabricator.services.mozilla.com/D105840
This commit is contained in:
Yury Delendik 2021-03-12 17:23:54 +00:00
parent 6ea22959c8
commit 2f5f62242f
27 changed files with 234 additions and 629 deletions
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8
Cargo.lock generated
View File

@ -5711,18 +5711,18 @@ source = "git+https://github.com/mozilla-spidermonkey/wasm-tools?rev=1b7763faa48
[[package]]
name = "wast"
version = "33.0.0"
version = "34.0.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "1d04fe175c7f78214971293e7d8875673804e736092206a3a4544dbc12811c1b"
checksum = "3de71ea922e46a60d0bde4b27ebf24ab7c4991006fd5de23ce9c58e129b3ab3c"
dependencies = [
"leb128",
]
[[package]]
name = "wat"
version = "1.0.34"
version = "1.0.35"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "7ec9c6ee01ae07a26adadcdfed22c7a97e0b8cbee9c06e0e96076ece5aeb5cfe"
checksum = "474403335b9a90b21120ab8131dd888f0a8d041c2d365ab960feddfe5a73c4b6"
dependencies = [
"wast",
]

16
js/moz.configure
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@ -768,12 +768,9 @@ def default_wasm_simd(jit_enabled, simulator, target):
return
if simulator:
if simulator[0] == "arm64":
return True
else:
return
return
if target.cpu in ("x86_64", "x86", "aarch64"):
if target.cpu in ("x86_64", "x86"):
return True
@ -793,15 +790,12 @@ def wasm_simd(value, jit_enabled, simulator, target):
return
if simulator:
if simulator[0] == "arm64":
return True
else:
return
return
if target.cpu in ("x86_64", "x86", "aarch64"):
if target.cpu in ("x86_64", "x86"):
return True
die("--enable-wasm-simd only possible when targeting the x86_64/x86/arm64 jits")
die("--enable-wasm-simd only possible when targeting the x86_64/x86 jits")
set_config("ENABLE_WASM_SIMD", wasm_simd)

11
js/src/jit-test/tests/wasm/binary.js
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@ -303,11 +303,12 @@ if (!wasmSimdEnabled()) {
}
} else {
let reservedSimd = [
0x67, 0x68, 0x6a, 0x74, 0x75, 0x7a, 0x7c, 0x7d, 0x7e,
0x7f, 0x94, 0xa5, 0xa6, 0xaf,
0xb0, 0xb2, 0xb3, 0xb4, 0xbc, 0xc2, 0xc3, 0xc5, 0xc6,
0xd4,
0xee, 0xfe, 0xff,
0x62, 0x7c, 0x7d, 0x7e, 0x7f, 0x9a,
0xa2, 0xa5, 0xa6, 0xaf,
0xb0, 0xb2, 0xb3, 0xb4, 0xbb,
0xc0, 0xc2, 0xc5, 0xc6, 0xcf,
0xd0, 0xd2, 0xd3, 0xd4, 0xd8, 0xd9, 0xda, 0xdb,
0xe2, 0xee,
];
for (let i of reservedSimd) {
checkIllegalPrefixed(SimdPrefix, i);

8
js/src/jit-test/tests/wasm/simd/spec/simd_i16x8_arith2.js
View File

@ -1974,14 +1974,6 @@ assertEq(thrown, true)
assertEq(saved instanceof SyntaxError, true)
var thrown = false;
var saved;
try { wasmTextToBinary(`
(module
(memory 1) (func (result v128) (i64x2.abs (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1))))
`) } catch (e) { thrown = true; saved = e; }
assertEq(thrown, true)
assertEq(saved instanceof SyntaxError, true)
var thrown = false;
var saved;
var bin = wasmTextToBinary(`
( module ( func ( result v128 ) ( i16x8.min_s ( i32.const 0 ) ( f32.const 0.0 ) ) ) )
`);

2
js/src/jit/MIR.cpp
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@ -4440,8 +4440,6 @@ MDefinition* MWasmReduceSimd128::foldsTo(TempAllocator& alloc) {
int32_t i32Result = 0;
switch (simdOp()) {
case wasm::SimdOp::V128AnyTrue:
case wasm::SimdOp::I16x8AnyTrue:
case wasm::SimdOp::I32x4AnyTrue:
i32Result = !c.isZeroBits();
break;
case wasm::SimdOp::I8x16AllTrue:

4
js/src/jit/x86-shared/CodeGenerator-x86-shared.cpp
View File

@ -3405,8 +3405,6 @@ void CodeGenerator::visitWasmReduceSimd128(LWasmReduceSimd128* ins) {
switch (ins->simdOp()) {
case wasm::SimdOp::V128AnyTrue:
case wasm::SimdOp::I16x8AnyTrue:
case wasm::SimdOp::I32x4AnyTrue:
masm.anyTrueSimd128(src, ToRegister(dest));
break;
case wasm::SimdOp::I8x16AllTrue:
@ -3465,8 +3463,6 @@ void CodeGenerator::visitWasmReduceAndBranchSimd128(
switch (ins->simdOp()) {
case wasm::SimdOp::V128AnyTrue:
case wasm::SimdOp::I16x8AnyTrue:
case wasm::SimdOp::I32x4AnyTrue:
// Set the zero flag if all of the lanes are zero, and branch on that.
masm.vptest(src, src);
emitBranch(Assembler::NotEqual, ins->ifTrue(), ins->ifFalse());

2
js/src/jit/x86-shared/Lowering-x86-shared.cpp
View File

@ -1356,8 +1356,6 @@ void LIRGenerator::visitWasmStoreLaneSimd128(MWasmStoreLaneSimd128* ins) {
bool LIRGeneratorX86Shared::canFoldReduceSimd128AndBranch(wasm::SimdOp op) {
switch (op) {
case wasm::SimdOp::V128AnyTrue:
case wasm::SimdOp::I16x8AnyTrue:
case wasm::SimdOp::I32x4AnyTrue:
case wasm::SimdOp::I8x16AllTrue:
case wasm::SimdOp::I16x8AllTrue:
case wasm::SimdOp::I32x4AllTrue:

2
js/src/rust/Cargo.toml
View File

@ -20,5 +20,5 @@ smoosh = ['jsrust_shared/smoosh']
jsrust_shared = { path = "./shared" }
# Workaround for https://github.com/rust-lang/rust/issues/58393
mozglue-static = { path = "../../../mozglue/static/rust" }
wat = { version = "1.0.34" }
wat = { version = "1.0.35" }
wasmparser = { version = "0.48.2" }

2
js/src/wasm/WasmBaselineCompile.cpp
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@ -16357,8 +16357,6 @@ bool BaseCompiler::emitBody() {
case uint32_t(SimdOp::F64x2Splat):
CHECK_NEXT(dispatchSplat(SplatF64x2, ValType::F64));
case uint32_t(SimdOp::V128AnyTrue):
case uint32_t(SimdOp::I16x8AnyTrue):
case uint32_t(SimdOp::I32x4AnyTrue):
CHECK_NEXT(dispatchVectorReduction(AnyTrue));
case uint32_t(SimdOp::I8x16AllTrue):
CHECK_NEXT(dispatchVectorReduction(AllTrueI8x16));

96
js/src/wasm/WasmConstants.h
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@ -560,30 +560,30 @@ enum class SimdOp {
V128Or = 0x50,
V128Xor = 0x51,
V128Bitselect = 0x52,
F64x2ConvertLowI32x4S = 0x53,
F64x2ConvertLowI32x4U = 0x54,
I32x4TruncSatF64x2SZero = 0x55,
I32x4TruncSatF64x2UZero = 0x56,
F32x4DemoteF64x2Zero = 0x57,
V128Load8Lane = 0x58,
V128Load16Lane = 0x59,
V128Load32Lane = 0x5a,
V128Load64Lane = 0x5b,
V128Store8Lane = 0x5c,
V128Store16Lane = 0x5d,
V128Store32Lane = 0x5e,
V128Store64Lane = 0x5f,
V128AnyTrue = 0x53,
V128Load8Lane = 0x54,
V128Load16Lane = 0x55,
V128Load32Lane = 0x56,
V128Load64Lane = 0x57,
V128Store8Lane = 0x58,
V128Store16Lane = 0x59,
V128Store32Lane = 0x5a,
V128Store64Lane = 0x5b,
V128Load32Zero = 0x5c,
V128Load64Zero = 0x5d,
F32x4DemoteF64x2Zero = 0x5e,
F64x2PromoteLowF32x4 = 0x5f,
I8x16Abs = 0x60,
I8x16Neg = 0x61,
V128AnyTrue = 0x62, // Used to be I8x16AnyTrue
// Unused = 0x62
I8x16AllTrue = 0x63,
I8x16Bitmask = 0x64,
I8x16NarrowSI16x8 = 0x65,
I8x16NarrowUI16x8 = 0x66,
// Widen = 0x67
// Widen = 0x68
F64x2PromoteLowF32x4 = 0x69,
// Widen = 0x6a
F32x4Ceil = 0x67,
F32x4Floor = 0x68,
F32x4Trunc = 0x69,
F32x4Nearest = 0x6a,
I8x16Shl = 0x6b,
I8x16ShrS = 0x6c,
I8x16ShrU = 0x6d,
@ -593,13 +593,13 @@ enum class SimdOp {
I8x16Sub = 0x71,
I8x16SubSaturateS = 0x72,
I8x16SubSaturateU = 0x73,
// Dot = 0x74
// Mul = 0x75
F64x2Ceil = 0x74,
F64x2Floor = 0x75,
I8x16MinS = 0x76,
I8x16MinU = 0x77,
I8x16MaxS = 0x78,
I8x16MaxU = 0x79,
// AvgrS = 0x7a
F64x2Trunc = 0x7a,
I8x16AvgrU = 0x7b,
// Unused = 0x7c
// Unused = 0x7d
@ -607,7 +607,7 @@ enum class SimdOp {
// Unused = 0x7f
I16x8Abs = 0x80,
I16x8Neg = 0x81,
I16x8AnyTrue = 0x82, // OBSOLETE, but keeping it for now
I16x8Q15MulrSatS = 0x82,
I16x8AllTrue = 0x83,
I16x8Bitmask = 0x84,
I16x8NarrowSI32x4 = 0x85,
@ -625,21 +625,21 @@ enum class SimdOp {
I16x8Sub = 0x91,
I16x8SubSaturateS = 0x92,
I16x8SubSaturateU = 0x93,
// Dot = 0x94
F64x2Nearest = 0x94,
I16x8Mul = 0x95,
I16x8MinS = 0x96,
I16x8MinU = 0x97,
I16x8MaxS = 0x98,
I16x8MaxU = 0x99,
I16x8ExtMulLowSI8x16 = 0x9a,
// Unused = 0x9a
I16x8AvgrU = 0x9b,
I16x8Q15MulrSatS = 0x9c,
I16x8ExtMulLowSI8x16 = 0x9c,
I16x8ExtMulHighSI8x16 = 0x9d,
I16x8ExtMulLowUI8x16 = 0x9e,
I16x8ExtMulHighUI8x16 = 0x9f,
I32x4Abs = 0xa0,
I32x4Neg = 0xa1,
I32x4AnyTrue = 0xa2, // OBSOLETE, but keeping it for now
// Narrow = 0xa2
I32x4AllTrue = 0xa3,
I32x4Bitmask = 0xa4,
// Narrow = 0xa5
@ -664,15 +664,15 @@ enum class SimdOp {
I32x4MaxS = 0xb8,
I32x4MaxU = 0xb9,
I32x4DotSI16x8 = 0xba,
I32x4ExtMulLowSI16x8 = 0xbb,
// Unused = 0xbc
// Unused = 0xbb
I32x4ExtMulLowSI16x8 = 0xbc,
I32x4ExtMulHighSI16x8 = 0xbd,
I32x4ExtMulLowUI16x8 = 0xbe,
I32x4ExtMulHighUI16x8 = 0xbf,
I64x2Eq = 0xc0,
// Unused = 0xc0
I64x2Neg = 0xc1,
// AnyTrue = 0xc2
// AllTrue = 0xc3
I64x2AllTrue = 0xc3,
I64x2Bitmask = 0xc4,
// Narrow = 0xc5
// Narrow = 0xc6
@ -684,23 +684,23 @@ enum class SimdOp {
I64x2ShrS = 0xcc,
I64x2ShrU = 0xcd,
I64x2Add = 0xce,
I64x2AllTrue = 0xcf,
I64x2Ne = 0xd0,
// Unused = 0xcf
// Unused = 0xd0
I64x2Sub = 0xd1,
I64x2ExtMulLowSI32x4 = 0xd2,
I64x2ExtMulHighSI32x4 = 0xd3,
// Unused = 0xd2
// Unused = 0xd3
// Dot = 0xd4
I64x2Mul = 0xd5,
I64x2ExtMulLowUI32x4 = 0xd6,
I64x2ExtMulHighUI32x4 = 0xd7,
F32x4Ceil = 0xd8,
F32x4Floor = 0xd9,
F32x4Trunc = 0xda,
F32x4Nearest = 0xdb,
F64x2Ceil = 0xdc,
F64x2Floor = 0xdd,
F64x2Trunc = 0xde,
F64x2Nearest = 0xdf,
I64x2Eq = 0xd6,
I64x2Ne = 0xd7,
// Unused = 0xd8
// Unused = 0xd9
// Unused = 0xda
// Unused = 0xdb
I64x2ExtMulLowSI32x4 = 0xdc,
I64x2ExtMulHighSI32x4 = 0xdd,
I64x2ExtMulLowUI32x4 = 0xde,
I64x2ExtMulHighUI32x4 = 0xdf,
F32x4Abs = 0xe0,
F32x4Neg = 0xe1,
// Round = 0xe2
@ -729,9 +729,11 @@ enum class SimdOp {
I32x4TruncUSatF32x4 = 0xf9,
F32x4ConvertSI32x4 = 0xfa,
F32x4ConvertUI32x4 = 0xfb,
V128Load32Zero = 0xfc,
V128Load64Zero = 0xfd,
// Unused = 0xfe and up
I32x4TruncSatF64x2SZero = 0xfc,
I32x4TruncSatF64x2UZero = 0xfd,
F64x2ConvertLowI32x4S = 0xfe,
F64x2ConvertLowI32x4U = 0xff,
// Unused = 0x100 and up
// Mozilla extensions, highly experimental and platform-specific
#ifdef ENABLE_WASM_SIMD_WORMHOLE

2
js/src/wasm/WasmIonCompile.cpp
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@ -5128,8 +5128,6 @@ static bool EmitBodyExprs(FunctionCompiler& f) {
case uint32_t(SimdOp::I32x4TruncSatF64x2UZero):
CHECK(EmitUnarySimd128(f, SimdOp(op.b1)));
case uint32_t(SimdOp::V128AnyTrue):
case uint32_t(SimdOp::I16x8AnyTrue):
case uint32_t(SimdOp::I32x4AnyTrue):
case uint32_t(SimdOp::I8x16AllTrue):
case uint32_t(SimdOp::I16x8AllTrue):
case uint32_t(SimdOp::I32x4AllTrue):

2
js/src/wasm/WasmOpIter.cpp
View File

@ -356,9 +356,7 @@ OpKind wasm::Classify(OpBytes op) {
case SimdOp::F64x2Splat:
case SimdOp::V128AnyTrue:
case SimdOp::I8x16AllTrue:
case SimdOp::I16x8AnyTrue:
case SimdOp::I16x8AllTrue:
case SimdOp::I32x4AnyTrue:
case SimdOp::I32x4AllTrue:
case SimdOp::I64x2AllTrue:
case SimdOp::I8x16Bitmask:

2
js/src/wasm/WasmValidate.cpp
View File

@ -1012,9 +1012,7 @@ static bool DecodeFunctionBodyExprs(const ModuleEnvironment& env,
case uint32_t(SimdOp::V128AnyTrue):
case uint32_t(SimdOp::I8x16AllTrue):
case uint32_t(SimdOp::I16x8AnyTrue):
case uint32_t(SimdOp::I16x8AllTrue):
case uint32_t(SimdOp::I32x4AnyTrue):
case uint32_t(SimdOp::I32x4AllTrue):
case uint32_t(SimdOp::I64x2AllTrue):
case uint32_t(SimdOp::I8x16Bitmask):

2
third_party/rust/wast/.cargo-checksum.json vendored
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File diff suppressed because one or more lines are too long

2
third_party/rust/wast/Cargo.toml vendored
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@ -13,7 +13,7 @@
[package]
edition = "2018"
name = "wast"
version = "33.0.0"
version = "34.0.0"
authors = ["Alex Crichton <alex@alexcrichton.com>"]
description = "Customizable Rust parsers for the WebAssembly Text formats WAT and WAST\n"
homepage = "https://github.com/bytecodealliance/wasm-tools/tree/main/crates/wast"

201
third_party/rust/wast/LICENSE-APACHE vendored
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@ -1,201 +0,0 @@
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You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.

25
third_party/rust/wast/LICENSE-MIT vendored
View File

@ -1,25 +0,0 @@
Copyright (c) 2014 Alex Crichton
Permission is hereby granted, free of charge, to any
person obtaining a copy of this software and associated
documentation files (the "Software"), to deal in the
Software without restriction, including without
limitation the rights to use, copy, modify, merge,
publish, distribute, sublicense, and/or sell copies of
the Software, and to permit persons to whom the Software
is furnished to do so, subject to the following
conditions:
The above copyright notice and this permission notice
shall be included in all copies or substantial portions
of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF
ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED
TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.

52
third_party/rust/wast/src/ast/alias.rs vendored
View File

@ -11,17 +11,18 @@ pub struct Alias<'a> {
pub id: Option<ast::Id<'a>>,
/// An optional name for this alias stored in the custom `name` section.
pub name: Option<ast::NameAnnotation<'a>>,
/// The item in the parent instance that we're aliasing.
pub kind: AliasKind<'a>,
/// The source of this alias.
pub source: AliasSource<'a>,
/// The kind of item that's being aliased.
pub kind: ast::ExportKind,
}
#[derive(Debug)]
#[allow(missing_docs)]
pub enum AliasKind<'a> {
pub enum AliasSource<'a> {
InstanceExport {
instance: ast::ItemRef<'a, kw::instance>,
export: &'a str,
kind: ast::ExportKind,
},
Outer {
/// The index of the module that this reference is referring to.
@ -29,48 +30,31 @@ pub enum AliasKind<'a> {
/// The index of the item within `module` that this alias is referering
/// to.
index: ast::Index<'a>,
/// The kind of item that's being aliased.
kind: ast::ExportKind,
},
}
impl Alias<'_> {
/// Returns the kind of item defined by this alias.
pub fn item_kind(&self) -> ast::ExportKind {
match self.kind {
AliasKind::InstanceExport { kind, .. } => kind,
AliasKind::Outer { kind, .. } => kind,
}
}
}
impl<'a> Parse<'a> for Alias<'a> {
fn parse(parser: Parser<'a>) -> Result<Self> {
let span = parser.parse::<kw::alias>()?.0;
let id = parser.parse()?;
let name = parser.parse()?;
let kind = parser.parens(|p| {
let kind = p.parse()?;
Ok(if parser.parse::<Option<kw::outer>>()?.is_some() {
AliasKind::Outer {
module: parser.parse()?,
index: parser.parse()?,
kind,
}
} else {
AliasKind::InstanceExport {
instance: parser.parse::<ast::IndexOrRef<_>>()?.0,
export: parser.parse()?,
kind,
}
})
})?;
let source = if parser.parse::<Option<kw::outer>>()?.is_some() {
AliasSource::Outer {
module: parser.parse()?,
index: parser.parse()?,
}
} else {
AliasSource::InstanceExport {
instance: parser.parse::<ast::IndexOrRef<_>>()?.0,
export: parser.parse()?,
}
};
let (kind, id, name) = parser.parens(|p| Ok((p.parse()?, p.parse()?, p.parse()?)))?;
Ok(Alias {
span,
id,
name,
kind,
source,
})
}
}

230
third_party/rust/wast/src/ast/expr.rs vendored
View File

@ -84,10 +84,12 @@ enum If<'a> {
enum Try<'a> {
/// Next thing to parse is the `do` block.
Do(Instruction<'a>),
/// Next thing to parse is `catch`/`catch_all`, or `unwind`.
CatchOrUnwind,
/// Next thing to parse is `catch`/`catch_all`, `unwind`, or `delegate`.
CatchUnwindOrDelegate,
/// Next thing to parse is a `catch` block or `catch_all`.
Catch,
/// Finished parsing like the `End` case, but does not push `end` opcode.
Delegate,
/// This `try` statement has finished parsing and if anything remains it's a
/// syntax error.
End,
@ -193,15 +195,16 @@ impl<'a> ExpressionParser<'a> {
// Both `do` and `catch` are required in a `try` statement, so
// we will signal those errors here. Otherwise, terminate with
// an `end` instruction.
// an `end` or `delegate` instruction.
Level::Try(Try::Do(_)) => {
return Err(parser.error("previous `try` had no `do`"));
}
Level::Try(Try::CatchOrUnwind) => {
Level::Try(Try::CatchUnwindOrDelegate) => {
return Err(
parser.error("previous `try` had no `catch`, `catch_all`, or `unwind`")
parser.error("previous `try` had no `catch`, `catch_all`, `unwind`, or `delegate`")
);
}
Level::Try(Try::Delegate) => {}
Level::Try(_) => {
self.instrs.push(Instruction::End(None));
}
@ -332,7 +335,7 @@ impl<'a> ExpressionParser<'a> {
if parser.parse::<Option<kw::r#do>>()?.is_some() {
// The state is advanced here only if the parse succeeds in
// order to strictly require the keyword.
*i = Try::CatchOrUnwind;
*i = Try::CatchUnwindOrDelegate;
self.stack.push(Level::TryArm);
return Ok(true);
}
@ -343,7 +346,7 @@ impl<'a> ExpressionParser<'a> {
}
// After a try's `do`, there are several possible kinds of handlers.
if let Try::CatchOrUnwind = i {
if let Try::CatchUnwindOrDelegate = i {
// `catch` may be followed by more `catch`s or `catch_all`.
if parser.parse::<Option<kw::catch>>()?.is_some() {
let evt = parser.parse::<ast::Index<'a>>()?;
@ -366,6 +369,16 @@ impl<'a> ExpressionParser<'a> {
self.stack.push(Level::TryArm);
return Ok(true);
}
// `delegate` has an index, and also ends the block like `end`.
if parser.parse::<Option<kw::delegate>>()?.is_some() {
let depth = parser.parse::<ast::Index<'a>>()?;
self.instrs.push(Instruction::Delegate(depth));
*i = Try::Delegate;
match self.paren(parser)? {
Paren::Left | Paren::None => { return Ok(false) }
Paren::Right => { return Ok(true) }
}
}
return Ok(false);
}
@ -591,9 +604,6 @@ instructions! {
StructGetU(StructAccess<'a>) : [0xfb, 0x05] : "struct.get_u",
StructSet(StructAccess<'a>) : [0xfb, 0x06] : "struct.set",
// gc proposal (moz specific, will be removed)
StructNarrow(StructNarrow<'a>) : [0xfb, 0x07] : "struct.narrow",
// gc proposal: array
ArrayNewWithRtt(ast::Index<'a>) : [0xfb, 0x11] : "array.new_with_rtt",
ArrayNewDefaultWithRtt(ast::Index<'a>) : [0xfb, 0x12] : "array.new_default_with_rtt",
@ -608,12 +618,23 @@ instructions! {
I31GetS : [0xfb, 0x21] : "i31.get_s",
I31GetU : [0xfb, 0x22] : "i31.get_u",
// gc proposal, rtt/casting
RTTCanon(HeapType<'a>) : [0xfb, 0x30] : "rtt.canon",
RTTSub(RTTSub<'a>) : [0xfb, 0x31] : "rtt.sub",
RefTest(RefTest<'a>) : [0xfb, 0x40] : "ref.test",
RefCast(RefTest<'a>) : [0xfb, 0x41] : "ref.cast",
BrOnCast(BrOnCast<'a>) : [0xfb, 0x42] : "br_on_cast",
// gc proposal, rtt casting
RTTCanon(ast::Index<'a>) : [0xfb, 0x30] : "rtt.canon",
RTTSub(ast::Index<'a>) : [0xfb, 0x31] : "rtt.sub",
RefTest : [0xfb, 0x40] : "ref.test",
RefCast : [0xfb, 0x41] : "ref.cast",
BrOnCast(ast::Index<'a>) : [0xfb, 0x42] : "br_on_cast",
// gc proposal, heap casting
RefIsFunc : [0xfb, 0x50] : "ref.is_func",
RefIsData : [0xfb, 0x51] : "ref.is_data",
RefIsI31 : [0xfb, 0x52] : "ref.is_i31",
RefAsFunc : [0xfb, 0x58] : "ref.as_func",
RefAsData : [0xfb, 0x59] : "ref.as_data",
RefAsI31 : [0xfb, 0x5a] : "ref.as_i31",
BrOnFunc(ast::Index<'a>) : [0xfb, 0x60] : "br_on_func",
BrOnData(ast::Index<'a>) : [0xfb, 0x61] : "br_on_data",
BrOnI31(ast::Index<'a>) : [0xfb, 0x62] : "br_on_i31",
I32Const(i32) : [0x41] : "i32.const",
I64Const(i64) : [0x42] : "i64.const",
@ -936,30 +957,34 @@ instructions! {
V128Or : [0xfd, 0x50] : "v128.or",
V128Xor : [0xfd, 0x51] : "v128.xor",
V128Bitselect : [0xfd, 0x52] : "v128.bitselect",
V128AnyTrue : [0xfd, 0x53] : "v128.any_true",
F64x2ConvertLowI32x4S : [0xfd, 0x53] : "f64x2.convert_low_i32x4_s",
F64x2ConvertLowI32x4U : [0xfd, 0x54] : "f64x2.convert_low_i32x4_u",
I32x4TruncSatF64x2SZero : [0xfd, 0x55] : "i32x4.trunc_sat_f64x2_s_zero",
I32x4TruncSatF64x2UZero : [0xfd, 0x56] : "i32x4.trunc_sat_f64x2_u_zero",
F32x4DemoteF64x2Zero : [0xfd, 0x57] : "f32x4.demote_f64x2_zero",
V128Load8Lane(LoadOrStoreLane<1>) : [0xfd, 0x54] : "v128.load8_lane",
V128Load16Lane(LoadOrStoreLane<2>) : [0xfd, 0x55] : "v128.load16_lane",
V128Load32Lane(LoadOrStoreLane<4>) : [0xfd, 0x56] : "v128.load32_lane",
V128Load64Lane(LoadOrStoreLane<8>): [0xfd, 0x57] : "v128.load64_lane",
V128Store8Lane(LoadOrStoreLane<1>) : [0xfd, 0x58] : "v128.store8_lane",
V128Store16Lane(LoadOrStoreLane<2>) : [0xfd, 0x59] : "v128.store16_lane",
V128Store32Lane(LoadOrStoreLane<4>) : [0xfd, 0x5a] : "v128.store32_lane",
V128Store64Lane(LoadOrStoreLane<8>) : [0xfd, 0x5b] : "v128.store64_lane",
V128Load8Lane(LoadOrStoreLane<1>) : [0xfd, 0x58] : "v128.load8_lane",
V128Load16Lane(LoadOrStoreLane<2>) : [0xfd, 0x59] : "v128.load16_lane",
V128Load32Lane(LoadOrStoreLane<4>) : [0xfd, 0x5a] : "v128.load32_lane",
V128Load64Lane(LoadOrStoreLane<8>): [0xfd, 0x5b] : "v128.load64_lane",
V128Store8Lane(LoadOrStoreLane<1>) : [0xfd, 0x5c] : "v128.store8_lane",
V128Store16Lane(LoadOrStoreLane<2>) : [0xfd, 0x5d] : "v128.store16_lane",
V128Store32Lane(LoadOrStoreLane<4>) : [0xfd, 0x5e] : "v128.store32_lane",
V128Store64Lane(LoadOrStoreLane<8>) : [0xfd, 0x5f] : "v128.store64_lane",
V128Load32Zero(MemArg<4>) : [0xfd, 0x5c] : "v128.load32_zero",
V128Load64Zero(MemArg<8>) : [0xfd, 0x5d] : "v128.load64_zero",
F32x4DemoteF64x2Zero : [0xfd, 0x5e] : "f32x4.demote_f64x2_zero",
F64x2PromoteLowF32x4 : [0xfd, 0x5f] : "f64x2.promote_low_f32x4",
I8x16Abs : [0xfd, 0x60] : "i8x16.abs",
I8x16Neg : [0xfd, 0x61] : "i8x16.neg",
V128AnyTrue : [0xfd, 0x62] : "v128.any_true",
I8x16Popcnt : [0xfd, 0x62] : "i8x16.popcnt",
I8x16AllTrue : [0xfd, 0x63] : "i8x16.all_true",
I8x16Bitmask : [0xfd, 0x64] : "i8x16.bitmask",
I8x16NarrowI16x8S : [0xfd, 0x65] : "i8x16.narrow_i16x8_s",
I8x16NarrowI16x8U : [0xfd, 0x66] : "i8x16.narrow_i16x8_u",
F64x2PromoteLowF32x4 : [0xfd, 0x69] : "f64x2.promote_low_f32x4",
F32x4Ceil : [0xfd, 0x67] : "f32x4.ceil",
F32x4Floor : [0xfd, 0x68] : "f32x4.floor",
F32x4Trunc : [0xfd, 0x69] : "f32x4.trunc",
F32x4Nearest : [0xfd, 0x6a] : "f32x4.nearest",
I8x16Shl : [0xfd, 0x6b] : "i8x16.shl",
I8x16ShrS : [0xfd, 0x6c] : "i8x16.shr_s",
I8x16ShrU : [0xfd, 0x6d] : "i8x16.shr_u",
@ -969,14 +994,22 @@ instructions! {
I8x16Sub : [0xfd, 0x71] : "i8x16.sub",
I8x16SubSatS : [0xfd, 0x72] : "i8x16.sub_sat_s",
I8x16SubSatU : [0xfd, 0x73] : "i8x16.sub_sat_u",
F64x2Ceil : [0xfd, 0x74] : "f64x2.ceil",
F64x2Floor : [0xfd, 0x75] : "f64x2.floor",
I8x16MinS : [0xfd, 0x76] : "i8x16.min_s",
I8x16MinU : [0xfd, 0x77] : "i8x16.min_u",
I8x16MaxS : [0xfd, 0x78] : "i8x16.max_s",
I8x16MaxU : [0xfd, 0x79] : "i8x16.max_u",
F64x2Trunc : [0xfd, 0x7a] : "f64x2.trunc",
I8x16AvgrU : [0xfd, 0x7b] : "i8x16.avgr_u",
I16x8ExtAddPairwiseI8x16S : [0xfd, 0x7c] : "i16x8.extadd_pairwise_i8x16_s",
I16x8ExtAddPairwiseI8x16U : [0xfd, 0x7d] : "i16x8.extadd_pairwise_i8x16_u",
I32x4ExtAddPairwiseI16x8S : [0xfd, 0x7e] : "i32x4.extadd_pairwise_i16x8_s",
I32x4ExtAddPairwiseI16x8U : [0xfd, 0x7f] : "i32x4.extadd_pairwise_i16x8_u",
I16x8Abs : [0xfd, 0x80] : "i16x8.abs",
I16x8Neg : [0xfd, 0x81] : "i16x8.neg",
I16x8Q15MulrSatS : [0xfd, 0x82] : "i16x8.q15mulr_sat_s",
I16x8AllTrue : [0xfd, 0x83] : "i16x8.all_true",
I16x8Bitmask : [0xfd, 0x84] : "i16x8.bitmask",
I16x8NarrowI32x4S : [0xfd, 0x85] : "i16x8.narrow_i32x4_s",
@ -994,14 +1027,14 @@ instructions! {
I16x8Sub : [0xfd, 0x91] : "i16x8.sub",
I16x8SubSatS : [0xfd, 0x92] : "i16x8.sub_sat_s",
I16x8SubSatU : [0xfd, 0x93] : "i16x8.sub_sat_u",
F64x2Nearest : [0xfd, 0x94] : "f64x2.nearest",
I16x8Mul : [0xfd, 0x95] : "i16x8.mul",
I16x8MinS : [0xfd, 0x96] : "i16x8.min_s",
I16x8MinU : [0xfd, 0x97] : "i16x8.min_u",
I16x8MaxS : [0xfd, 0x98] : "i16x8.max_s",
I16x8MaxU : [0xfd, 0x99] : "i16x8.max_u",
I16x8ExtMulLowI8x16S : [0xfd, 0x9a] : "i16x8.extmul_low_i8x16_s",
I16x8AvgrU : [0xfd, 0x9b] : "i16x8.avgr_u",
I16x8Q15MulrSatS : [0xfd, 0x9c] : "i16x8.q15mulr_sat_s",
I16x8ExtMulLowI8x16S : [0xfd, 0x9c] : "i16x8.extmul_low_i8x16_s",
I16x8ExtMulHighI8x16S : [0xfd, 0x9d] : "i16x8.extmul_high_i8x16_s",
I16x8ExtMulLowI8x16U : [0xfd, 0x9e] : "i16x8.extmul_low_i8x16_u",
I16x8ExtMulHighI8x16U : [0xfd, 0x9f] : "i16x8.extmul_high_i8x16_u",
@ -1025,39 +1058,35 @@ instructions! {
I32x4MaxS : [0xfd, 0xb8] : "i32x4.max_s",
I32x4MaxU : [0xfd, 0xb9] : "i32x4.max_u",
I32x4DotI16x8S : [0xfd, 0xba] : "i32x4.dot_i16x8_s",
I32x4ExtMulLowI16x8S : [0xfd, 0xbb] : "i32x4.extmul_low_i16x8_s",
I32x4ExtMulLowI16x8S : [0xfd, 0xbc] : "i32x4.extmul_low_i16x8_s",
I32x4ExtMulHighI16x8S : [0xfd, 0xbd] : "i32x4.extmul_high_i16x8_s",
I32x4ExtMulLowI16x8U : [0xfd, 0xbe] : "i32x4.extmul_low_i16x8_u",
I32x4ExtMulHighI16x8U : [0xfd, 0xbf] : "i32x4.extmul_high_i16x8_u",
I64x2Eq : [0xfd, 0xc0] : "i64x2.eq",
I64x2Abs : [0xfd, 0xc0] : "i64x2.abs",
I64x2Neg : [0xfd, 0xc1] : "i64x2.neg",
I64x2Shl : [0xfd, 0xcb] : "i64x2.shl",
I64x2AllTrue : [0xfd, 0xc3] : "i64x2.all_true",
I64x2Bitmask : [0xfd, 0xc4] : "i64x2.bitmask",
I64x2WidenLowI32x4S : [0xfd, 0xc7] : "i64x2.widen_low_i32x4_s",
I64x2WidenHighI32x4S : [0xfd, 0xc8] : "i64x2.widen_high_i32x4_s",
I64x2WidenLowI32x4U : [0xfd, 0xc9] : "i64x2.widen_low_i32x4_u",
I64x2WidenHighI32x4U : [0xfd, 0xca] : "i64x2.widen_high_i32x4_u",
I64x2Shl : [0xfd, 0xcb] : "i64x2.shl",
I64x2ShrS : [0xfd, 0xcc] : "i64x2.shr_s",
I64x2ShrU : [0xfd, 0xcd] : "i64x2.shr_u",
I64x2Add : [0xfd, 0xce] : "i64x2.add",
I64x2AllTrue : [0xfd, 0xcf] : "i64x2.all_true",
I64x2Ne : [0xfd, 0xd0] : "i64x2.ne",
I64x2Sub : [0xfd, 0xd1] : "i64x2.sub",
I64x2ExtMulLowI32x4S : [0xfd, 0xd2] : "i64x2.extmul_low_i32x4_s",
I64x2ExtMulHighI32x4S : [0xfd, 0xd3] : "i64x2.extmul_high_i32x4_s",
I64x2Mul : [0xfd, 0xd5] : "i64x2.mul",
I64x2ExtMulLowI32x4U : [0xfd, 0xd6] : "i64x2.extmul_low_i32x4_u",
I64x2ExtMulHighI32x4U : [0xfd, 0xd7] : "i64x2.extmul_high_i32x4_u",
F32x4Ceil : [0xfd, 0xd8] : "f32x4.ceil",
F32x4Floor : [0xfd, 0xd9] : "f32x4.floor",
F32x4Trunc : [0xfd, 0xda] : "f32x4.trunc",
F32x4Nearest : [0xfd, 0xdb] : "f32x4.nearest",
F64x2Ceil : [0xfd, 0xdc] : "f64x2.ceil",
F64x2Floor : [0xfd, 0xdd] : "f64x2.floor",
F64x2Trunc : [0xfd, 0xde] : "f64x2.trunc",
F64x2Nearest : [0xfd, 0xdf] : "f64x2.nearest",
I64x2Eq : [0xfd, 0xd6] : "i64x2.eq",
I64x2Ne : [0xfd, 0xd7] : "i64x2.ne",
I64x2LtS : [0xfd, 0xd8] : "i64x2.lt_s",
I64x2GtS : [0xfd, 0xd9] : "i64x2.gt_s",
I64x2LeS : [0xfd, 0xda] : "i64x2.le_s",
I64x2GeS : [0xfd, 0xdb] : "i64x2.ge_s",
I64x2ExtMulLowI32x4S : [0xfd, 0xdc] : "i64x2.extmul_low_i32x4_s",
I64x2ExtMulHighI32x4S : [0xfd, 0xdd] : "i64x2.extmul_high_i32x4_s",
I64x2ExtMulLowI32x4U : [0xfd, 0xde] : "i64x2.extmul_low_i32x4_u",
I64x2ExtMulHighI32x4U : [0xfd, 0xdf] : "i64x2.extmul_high_i32x4_u",
F32x4Abs : [0xfd, 0xe0] : "f32x4.abs",
F32x4Neg : [0xfd, 0xe1] : "f32x4.neg",
@ -1088,16 +1117,19 @@ instructions! {
F32x4ConvertI32x4S : [0xfd, 0xfa] : "f32x4.convert_i32x4_s",
F32x4ConvertI32x4U : [0xfd, 0xfb] : "f32x4.convert_i32x4_u",
V128Load32Zero(MemArg<4>) : [0xfd, 0xfc] : "v128.load32_zero",
V128Load64Zero(MemArg<8>) : [0xfd, 0xfd] : "v128.load64_zero",
I32x4TruncSatF64x2SZero : [0xfd, 0xfc] : "i32x4.trunc_sat_f64x2_s_zero",
I32x4TruncSatF64x2UZero : [0xfd, 0xfd] : "i32x4.trunc_sat_f64x2_u_zero",
F64x2ConvertLowI32x4S : [0xfd, 0xfe] : "f64x2.convert_low_i32x4_s",
F64x2ConvertLowI32x4U : [0xfd, 0xff] : "f64x2.convert_low_i32x4_u",
// Exception handling proposal
CatchAll : [0x05] : "catch_all", // Reuses the else opcode.
Try(BlockType<'a>) : [0x06] : "try",
Catch(ast::Index<'a>) : [0x07] : "catch",
Throw(ast::Index<'a>) : [0x08] : "throw",
Rethrow(ast::Index<'a>) : [0x09] : "rethrow",
Unwind : [0x0a] : "unwind",
Delegate(ast::Index<'a>) : [0x18] : "delegate",
CatchAll : [0x19] : "catch_all",
}
}
@ -1463,24 +1495,6 @@ impl<'a> Parse<'a> for StructAccess<'a> {
}
}
/// Extra data associated with the `struct.narrow` instruction
#[derive(Debug)]
pub struct StructNarrow<'a> {
/// The type of the struct we're casting from
pub from: ast::ValType<'a>,
/// The type of the struct we're casting to
pub to: ast::ValType<'a>,
}
impl<'a> Parse<'a> for StructNarrow<'a> {
fn parse(parser: Parser<'a>) -> Result<Self> {
Ok(StructNarrow {
from: parser.parse()?,
to: parser.parse()?,
})
}
}
/// Different ways to specify a `v128.const` instruction
#[derive(Debug)]
#[rustfmt::skip]
@ -1704,75 +1718,3 @@ impl<'a> Parse<'a> for SelectTypes<'a> {
Ok(SelectTypes { tys })
}
}
/// Payload of the `br_on_exn` instruction
#[derive(Debug)]
#[allow(missing_docs)]
pub struct BrOnExn<'a> {
pub label: ast::Index<'a>,
pub exn: ast::Index<'a>,
}
impl<'a> Parse<'a> for BrOnExn<'a> {
fn parse(parser: Parser<'a>) -> Result<Self> {
let label = parser.parse()?;
let exn = parser.parse()?;
Ok(BrOnExn { label, exn })
}
}
/// Payload of the `br_on_cast` instruction
#[derive(Debug)]
#[allow(missing_docs)]
pub struct BrOnCast<'a> {
pub label: ast::Index<'a>,
pub val: HeapType<'a>,
pub rtt: HeapType<'a>,
}
impl<'a> Parse<'a> for BrOnCast<'a> {
fn parse(parser: Parser<'a>) -> Result<Self> {
let label = parser.parse()?;
let val = parser.parse()?;
let rtt = parser.parse()?;
Ok(BrOnCast { label, val, rtt })
}
}
/// Payload of the `rtt.sub` instruction
#[derive(Debug)]
#[allow(missing_docs)]
pub struct RTTSub<'a> {
pub depth: u32,
pub input_rtt: HeapType<'a>,
pub output_rtt: HeapType<'a>,
}
impl<'a> Parse<'a> for RTTSub<'a> {
fn parse(parser: Parser<'a>) -> Result<Self> {
let depth = parser.parse()?;
let input_rtt = parser.parse()?;
let output_rtt = parser.parse()?;
Ok(RTTSub {
depth,
input_rtt,
output_rtt,
})
}
}
/// Payload of the `ref.test/cast` instruction
#[derive(Debug)]
#[allow(missing_docs)]
pub struct RefTest<'a> {
pub val: HeapType<'a>,
pub rtt: HeapType<'a>,
}
impl<'a> Parse<'a> for RefTest<'a> {
fn parse(parser: Parser<'a>) -> Result<Self> {
let val = parser.parse()?;
let rtt = parser.parse()?;
Ok(RefTest { val, rtt })
}
}

3
third_party/rust/wast/src/ast/instance.rs vendored
View File

@ -61,7 +61,7 @@ impl<'a> Parse<'a> for Instance<'a> {
let module = p.parse::<ast::IndexOrRef<_>>()?.0;
let mut args = Vec::new();
while !p.is_empty() {
args.push(p.parse()?);
args.push(p.parens(|p| p.parse())?);
}
Ok(InstanceKind::Inline { module, args })
})?
@ -78,6 +78,7 @@ impl<'a> Parse<'a> for Instance<'a> {
impl<'a> Parse<'a> for InstanceArg<'a> {
fn parse(parser: Parser<'a>) -> Result<Self> {
parser.parse::<kw::import>()?;
Ok(InstanceArg {
name: parser.parse()?,
index: parser.parse()?,

4
third_party/rust/wast/src/ast/mod.rs vendored
View File

@ -350,13 +350,13 @@ pub mod kw {
custom_keyword!(catch_all);
custom_keyword!(code);
custom_keyword!(data);
custom_keyword!(dataref);
custom_keyword!(declare);
custom_keyword!(delegate);
custom_keyword!(r#do = "do");
custom_keyword!(elem);
custom_keyword!(end);
custom_keyword!(event);
custom_keyword!(exn);
custom_keyword!(exnref);
custom_keyword!(export);
custom_keyword!(r#extern = "extern");
custom_keyword!(externref);

39
third_party/rust/wast/src/ast/types.rs vendored
View File

@ -12,7 +12,7 @@ pub enum ValType<'a> {
F64,
V128,
Ref(RefType<'a>),
Rtt(u32, ast::Index<'a>),
Rtt(Option<u32>, ast::Index<'a>),
}
impl<'a> Parse<'a> for ValType<'a> {
@ -79,12 +79,11 @@ pub enum HeapType<'a> {
/// A reference to any reference value: anyref. This is part of the GC
/// proposal.
Any,
/// A reference to an exception: exnref. This is part of the exception
/// handling proposal.
Exn,
/// A reference that has an identity that can be compared: eqref. This is
/// part of the GC proposal.
Eq,
/// A reference to a GC object. This is part of the GC proposal.
Data,
/// An unboxed 31-bit integer: i31ref. This may be going away if there is no common
/// supertype of all reference types. Part of the GC proposal.
I31,
@ -105,12 +104,12 @@ impl<'a> Parse<'a> for HeapType<'a> {
} else if l.peek::<kw::r#any>() {
parser.parse::<kw::r#any>()?;
Ok(HeapType::Any)
} else if l.peek::<kw::exn>() {
parser.parse::<kw::exn>()?;
Ok(HeapType::Exn)
} else if l.peek::<kw::eq>() {
parser.parse::<kw::eq>()?;
Ok(HeapType::Eq)
} else if l.peek::<kw::data>() {
parser.parse::<kw::data>()?;
Ok(HeapType::Data)
} else if l.peek::<kw::i31>() {
parser.parse::<kw::i31>()?;
Ok(HeapType::I31)
@ -127,8 +126,8 @@ impl<'a> Peek for HeapType<'a> {
kw::func::peek(cursor)
|| kw::r#extern::peek(cursor)
|| kw::any::peek(cursor)
|| kw::exn::peek(cursor)
|| kw::eq::peek(cursor)
|| kw::data::peek(cursor)
|| kw::i31::peek(cursor)
|| (ast::LParen::peek(cursor) && kw::r#type::peek2(cursor))
}
@ -170,14 +169,6 @@ impl<'a> RefType<'a> {
}
}
/// An `exnref` as an abbreviation for `(ref null exn)`.
pub fn exn() -> Self {
RefType {
nullable: true,
heap: HeapType::Exn,
}
}
/// An `eqref` as an abbreviation for `(ref null eq)`.
pub fn eq() -> Self {
RefType {
@ -186,6 +177,14 @@ impl<'a> RefType<'a> {
}
}
/// An `dataref` as an abbreviation for `(ref null data)`.
pub fn data() -> Self {
RefType {
nullable: true,
heap: HeapType::Data,
}
}
/// An `i31ref` as an abbreviation for `(ref null i31)`.
pub fn i31() -> Self {
RefType {
@ -210,12 +209,12 @@ impl<'a> Parse<'a> for RefType<'a> {
} else if l.peek::<kw::anyref>() {
parser.parse::<kw::anyref>()?;
Ok(RefType::any())
} else if l.peek::<kw::exnref>() {
parser.parse::<kw::exnref>()?;
Ok(RefType::exn())
} else if l.peek::<kw::eqref>() {
parser.parse::<kw::eqref>()?;
Ok(RefType::eq())
} else if l.peek::<kw::dataref>() {
parser.parse::<kw::dataref>()?;
Ok(RefType::data())
} else if l.peek::<kw::i31ref>() {
parser.parse::<kw::i31ref>()?;
Ok(RefType::i31())
@ -251,8 +250,8 @@ impl<'a> Peek for RefType<'a> {
|| /* legacy */ kw::anyfunc::peek(cursor)
|| kw::externref::peek(cursor)
|| kw::anyref::peek(cursor)
|| kw::exnref::peek(cursor)
|| kw::eqref::peek(cursor)
|| kw::dataref::peek(cursor)
|| kw::i31ref::peek(cursor)
|| (ast::LParen::peek(cursor) && kw::r#ref::peek2(cursor))
}

79
third_party/rust/wast/src/binary.rs vendored
View File

@ -339,11 +339,15 @@ impl<'a> Encode for ValType<'a> {
ValType::F32 => e.push(0x7d),
ValType::F64 => e.push(0x7c),
ValType::V128 => e.push(0x7b),
ValType::Rtt(depth, index) => {
ValType::Rtt(Some(depth), index) => {
e.push(0x69);
depth.encode(e);
index.encode(e);
}
ValType::Rtt(None, index) => {
e.push(0x68);
index.encode(e);
}
ValType::Ref(ty) => {
ty.encode(e);
}
@ -358,8 +362,8 @@ impl<'a> Encode for HeapType<'a> {
HeapType::Extern => e.push(0x6f),
HeapType::Any => e.push(0x6e),
HeapType::Eq => e.push(0x6d),
HeapType::Data => e.push(0x67),
HeapType::I31 => e.push(0x6a),
HeapType::Exn => e.push(0x68),
HeapType::Index(index) => {
index.encode(e);
}
@ -385,16 +389,16 @@ impl<'a> Encode for RefType<'a> {
nullable: true,
heap: HeapType::Eq,
} => e.push(0x6d),
// The 'dataref' binary abbreviation
RefType {
nullable: true,
heap: HeapType::Data,
} => e.push(0x67),
// The 'i31ref' binary abbreviation
RefType {
nullable: true,
heap: HeapType::I31,
} => e.push(0x6a),
// The 'exnref' binary abbreviation
RefType {
nullable: true,
heap: HeapType::Exn,
} => e.push(0x68),
// Generic 'ref opt <heaptype>' encoding
RefType {
@ -1026,11 +1030,7 @@ fn find_names<'a>(
ModuleField::Alias(Alias {
id,
name,
kind:
AliasKind::InstanceExport {
kind: ExportKind::Func,
..
},
kind: ExportKind::Func,
..
}) => {
if let Some(name) = get_name(id, name) {
@ -1136,36 +1136,6 @@ impl Encode for EventType<'_> {
}
}
impl Encode for BrOnExn<'_> {
fn encode(&self, e: &mut Vec<u8>) {
self.label.encode(e);
self.exn.encode(e);
}
}
impl Encode for BrOnCast<'_> {
fn encode(&self, e: &mut Vec<u8>) {
self.label.encode(e);
self.val.encode(e);
self.rtt.encode(e);
}
}
impl Encode for RTTSub<'_> {
fn encode(&self, e: &mut Vec<u8>) {
self.depth.encode(e);
self.input_rtt.encode(e);
self.output_rtt.encode(e);
}
}
impl Encode for RefTest<'_> {
fn encode(&self, e: &mut Vec<u8>) {
self.val.encode(e);
self.rtt.encode(e);
}
}
impl Encode for StructAccess<'_> {
fn encode(&self, e: &mut Vec<u8>) {
self.r#struct.encode(e);
@ -1173,13 +1143,6 @@ impl Encode for StructAccess<'_> {
}
}
impl Encode for StructNarrow<'_> {
fn encode(&self, e: &mut Vec<u8>) {
self.from.encode(e);
self.to.encode(e);
}
}
impl Encode for NestedModule<'_> {
fn encode(&self, e: &mut Vec<u8>) {
let fields = match &self.kind {
@ -1216,25 +1179,17 @@ impl Encode for InstanceArg<'_> {
impl Encode for Alias<'_> {
fn encode(&self, e: &mut Vec<u8>) {
match &self.kind {
AliasKind::InstanceExport {
instance,
export,
kind,
} => {
match &self.source {
AliasSource::InstanceExport { instance, export } => {
e.push(0x00);
instance.encode(e);
kind.encode(e);
self.kind.encode(e);
export.encode(e);
}
AliasKind::Outer {
module,
index,
kind,
} => {
AliasSource::Outer { module, index } => {
e.push(0x01);
module.encode(e);
kind.encode(e);
self.kind.encode(e);
index.encode(e);
}
}

26
third_party/rust/wast/src/resolve/aliases.rs vendored
View File

@ -67,22 +67,14 @@ impl<'a> Expander<'a> {
match field {
ModuleField::Alias(a) => {
let id = gensym::fill(a.span, &mut a.id);
match &mut a.kind {
AliasKind::InstanceExport {
instance,
export,
kind,
} => {
match &mut a.source {
AliasSource::InstanceExport { instance, export } => {
self.expand(instance);
self.instances
.insert((*instance.unwrap_index(), export, *kind), id.into());
.insert((*instance.unwrap_index(), export, a.kind), id.into());
}
AliasKind::Outer {
module,
index,
kind,
} => {
self.parents.insert((*module, *index, *kind), id.into());
AliasSource::Outer { module, index } => {
self.parents.insert((*module, *index, a.kind), id.into());
}
}
}
@ -231,11 +223,11 @@ impl<'a> Expander<'a> {
span,
id: Some(id),
name: None,
kind: AliasKind::Outer {
source: AliasSource::Outer {
module: *module,
index: *idx,
kind: (*kind).into(),
},
kind: (*kind).into(),
}));
*v.insert(Index::Id(id))
}
@ -265,8 +257,8 @@ impl<'a> Expander<'a> {
span,
id: Some(id),
name: None,
kind: AliasKind::InstanceExport {
kind,
kind,
source: AliasSource::InstanceExport {
instance: ItemRef::Item {
kind: kw::instance(span),
idx: cur,

37
third_party/rust/wast/src/resolve/names.rs vendored
View File

@ -126,7 +126,7 @@ impl<'a> Resolver<'a> {
ModuleField::Elem(e) => self.elems.register(e.id, "elem")?,
ModuleField::Data(d) => self.datas.register(d.id, "data")?,
ModuleField::Event(e) => self.events.register(e.id, "event")?,
ModuleField::Alias(a) => match a.item_kind() {
ModuleField::Alias(a) => match a.kind {
ExportKind::Func => self.funcs.register(a.id, "func")?,
ExportKind::Table => self.tables.register(a.id, "table")?,
ExportKind::Memory => self.memories.register(a.id, "memory")?,
@ -310,15 +310,11 @@ impl<'a> Resolver<'a> {
}
ModuleField::Alias(a) => {
match &mut a.kind {
AliasKind::InstanceExport { instance, .. } => {
match &mut a.source {
AliasSource::InstanceExport { instance, .. } => {
self.resolve_item_ref(instance)?;
}
AliasKind::Outer {
module,
index,
kind,
} => {
AliasSource::Outer { module, index } => {
match (index, module) {
// If both indices are numeric then don't try to
// resolve anything since we could fail to walk up
@ -328,7 +324,7 @@ impl<'a> Resolver<'a> {
(index, module) => {
parents
.resolve(module)?
.resolve(index, Ns::from_export(kind))?;
.resolve(index, Ns::from_export(&a.kind))?;
}
}
}
@ -784,10 +780,8 @@ impl<'a, 'b> ExprResolver<'a, 'b> {
self.resolver.resolve(i, Ns::Event)?;
}
BrOnCast(b) => {
self.resolve_label(&mut b.label)?;
self.resolver.resolve_heaptype(&mut b.val)?;
self.resolver.resolve_heaptype(&mut b.rtt)?;
BrOnCast(l) | BrOnFunc(l) | BrOnData(l) | BrOnI31(l) => {
self.resolve_label(l)?;
}
Select(s) => {
@ -810,26 +804,17 @@ impl<'a, 'b> ExprResolver<'a, 'b> {
| ArrayLen(i) => {
self.resolver.resolve(i, Ns::Type)?;
}
RTTCanon(t) => {
self.resolver.resolve_heaptype(t)?;
RTTCanon(i) => {
self.resolver.resolve(i, Ns::Type)?;
}
RTTSub(s) => {
self.resolver.resolve_heaptype(&mut s.input_rtt)?;
self.resolver.resolve_heaptype(&mut s.output_rtt)?;
}
RefTest(t) | RefCast(t) => {
self.resolver.resolve_heaptype(&mut t.val)?;
self.resolver.resolve_heaptype(&mut t.rtt)?;
RTTSub(i) => {
self.resolver.resolve(i, Ns::Type)?;
}
StructSet(s) | StructGet(s) | StructGetS(s) | StructGetU(s) => {
self.resolver.resolve(&mut s.r#struct, Ns::Type)?;
self.resolver.fields.resolve(&mut s.field, "field")?;
}
StructNarrow(s) => {
self.resolver.resolve_valtype(&mut s.from)?;
self.resolver.resolve_valtype(&mut s.to)?;
}
RefNull(ty) => self.resolver.resolve_heaptype(ty)?,

2
third_party/rust/wat/.cargo-checksum.json vendored
View File

@ -1 +1 @@
{"files":{"Cargo.toml":"f7ca0d9798f14a41a9e88b687e7c4a1583c8d729af3a24549dfd92011d088f01","README.md":"6653a386a2210f0f7e36964f15214bc441e2c723c42867dfe90dfcedcd301814","src/lib.rs":"03652351228b7f7a520f4e7f1e689fa34a37b8e5e0fc8367a167cc893cdbc449"},"package":"7ec9c6ee01ae07a26adadcdfed22c7a97e0b8cbee9c06e0e96076ece5aeb5cfe"}
{"files":{"Cargo.toml":"c7339baf9b180c8ab620bd9fc8b896a4d50a56a319378c4ca433fe41a6710718","README.md":"6653a386a2210f0f7e36964f15214bc441e2c723c42867dfe90dfcedcd301814","src/lib.rs":"03652351228b7f7a520f4e7f1e689fa34a37b8e5e0fc8367a167cc893cdbc449"},"package":"474403335b9a90b21120ab8131dd888f0a8d041c2d365ab960feddfe5a73c4b6"}

4
third_party/rust/wat/Cargo.toml vendored
View File

@ -13,7 +13,7 @@
[package]
edition = "2018"
name = "wat"
version = "1.0.34"
version = "1.0.35"
authors = ["Alex Crichton <alex@alexcrichton.com>"]
description = "Rust parser for the WebAssembly Text format, WAT\n"
homepage = "https://github.com/bytecodealliance/wasm-tools/tree/main/crates/wat"
@ -22,4 +22,4 @@ readme = "README.md"
license = "Apache-2.0 WITH LLVM-exception"
repository = "https://github.com/bytecodealliance/wasm-tools/tree/main/crates/wat"
[dependencies.wast]
version = "33.0.0"
version = "34.0.0"