diff --git a/js/src/nanojit/Assembler.cpp b/js/src/nanojit/Assembler.cpp
index b493f2fec830..d60dd42ea309 100755
--- a/js/src/nanojit/Assembler.cpp
+++ b/js/src/nanojit/Assembler.cpp
@@ -824,7 +824,7 @@ namespace nanojit
         _inExit = false;
 
         //verbose_only( verbose_outputf("         LIR_xt/xf swapCodeChunks, _nIns is now %08X(%08X), _nExitIns is now %08X(%08X)",_nIns, *_nIns,_nExitIns,*_nExitIns) );
-        verbose_only( verbose_outputf("%010lx:", (unsigned long)jmpTarget);)
+        verbose_only( verbose_outputf("%p:", jmpTarget);)
         verbose_only( verbose_outputf("----------------------------------- ## BEGIN exit block (LIR_xt|LIR_xf)") );
 
 #ifdef NANOJIT_IA32
diff --git a/js/src/nanojit/Native.h b/js/src/nanojit/Native.h
index 2b23c6645d24..ff9b7c80e4b0 100644
--- a/js/src/nanojit/Native.h
+++ b/js/src/nanojit/Native.h
@@ -152,7 +152,7 @@ namespace nanojit {
         #define asm_output(...) do { \
             if (_logc->lcbits & LC_Native) { \
                 outline[0]='\0'; \
-               VMPI_sprintf(outline, "%010lx   ", (unsigned long)_nIns); \
+               VMPI_sprintf(outline, "%p   ", _nIns); \
                 sprintf(&outline[13], ##__VA_ARGS__); \
                 output(); \
             } \
diff --git a/js/src/nanojit/NativeX64.h b/js/src/nanojit/NativeX64.h
index caca6f7907d1..420779da9ea4 100644
--- a/js/src/nanojit/NativeX64.h
+++ b/js/src/nanojit/NativeX64.h
@@ -328,7 +328,7 @@ namespace nanojit
 
     static const RegisterMask GpRegs = 0xffff;
     static const RegisterMask FpRegs = 0xffff0000;
-#ifdef _MSC_VER
+#ifdef _WIN64
     static const RegisterMask SavedRegs = 1<<RBX | 1<<RSI | 1<<RDI | 1<<R12 | 1<<R13 | 1<<R14 | 1<<R15;
     static const int NumSavedRegs = 7; // rbx, rsi, rdi, r12-15
     static const int NumArgRegs = 4;