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Bug 1290812 - Part 13: Implement the 64bit variant of PopCnt on mips64. r=lth
--- js/src/jit/MacroAssembler.h | 3 ++- .../jit/mips-shared/CodeGenerator-mips-shared.cpp | 10 ++++++++ js/src/jit/mips-shared/CodeGenerator-mips-shared.h | 1 + js/src/jit/mips64/MacroAssembler-mips64-inl.h | 29 ++++++++++++++++++++++ js/src/jit/mips64/MacroAssembler-mips64.cpp | 6 +++++ js/src/jit/mips64/MacroAssembler-mips64.h | 1 + 6 files changed, 49 insertions(+), 1 deletion(-)
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@ -926,7 +926,8 @@ class MacroAssembler : public MacroAssemblerSpecific
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DEFINED_ON(arm, x86_shared, mips_shared);
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// temp may be invalid only if the chip has the POPCNT instruction.
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inline void popcnt64(Register64 src, Register64 dest, Register temp) DEFINED_ON(x86, x64, arm);
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inline void popcnt64(Register64 src, Register64 dest, Register temp)
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DEFINED_ON(x86, x64, arm, mips64);
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// ===============================================================
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// Branch functions
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@ -1073,6 +1073,16 @@ CodeGeneratorMIPSShared::visitPopcntI(LPopcntI* ins)
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masm.popcnt32(input, output, tmp);
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}
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void
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CodeGeneratorMIPSShared::visitPopcntI64(LPopcntI64* ins)
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{
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Register64 input = ToRegister64(ins->getInt64Operand(0));
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Register64 output = ToOutRegister64(ins);
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Register tmp = ToRegister(ins->getTemp(0));
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masm.popcnt64(input, output, tmp);
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}
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void
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CodeGeneratorMIPSShared::visitPowHalfD(LPowHalfD* ins)
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{
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@ -152,6 +152,7 @@ class CodeGeneratorMIPSShared : public CodeGeneratorShared
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virtual void visitClzI(LClzI* ins);
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virtual void visitCtzI(LCtzI* ins);
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virtual void visitPopcntI(LPopcntI* ins);
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virtual void visitPopcntI64(LPopcntI64* lir);
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virtual void visitTestIAndBranch(LTestIAndBranch* test);
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virtual void visitCompare(LCompare* comp);
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@ -400,6 +400,35 @@ MacroAssembler::rotateRight64(Register count, Register64 src, Register64 dest, R
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ma_dror(dest.reg, src.reg, count);
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}
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// ===============================================================
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// Bit counting functions
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void
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MacroAssembler::popcnt64(Register64 input, Register64 output, Register tmp)
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{
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ma_move(output.reg, input.reg);
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ma_dsra(tmp, input.reg, Imm32(1));
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ma_li(ScratchRegister, ImmWord(0x5555555555555555UL));
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ma_and(tmp, ScratchRegister);
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ma_dsubu(output.reg, tmp);
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ma_dsra(tmp, output.reg, Imm32(2));
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ma_li(ScratchRegister, ImmWord(0x3333333333333333UL));
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ma_and(output.reg, ScratchRegister);
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ma_and(tmp, ScratchRegister);
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ma_daddu(output.reg, tmp);
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ma_dsrl(tmp, output.reg, Imm32(4));
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ma_daddu(output.reg, tmp);
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ma_li(ScratchRegister, ImmWord(0xF0F0F0F0F0F0F0FUL));
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ma_and(output.reg, ScratchRegister);
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ma_dsll(tmp, output.reg, Imm32(8));
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ma_daddu(output.reg, tmp);
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ma_dsll(tmp, output.reg, Imm32(16));
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ma_daddu(output.reg, tmp);
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ma_dsll(tmp, output.reg, Imm32(32));
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ma_daddu(output.reg, tmp);
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ma_dsra(output.reg, output.reg, Imm32(56));
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}
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// ===============================================================
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// Branch functions
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@ -458,6 +458,12 @@ MacroAssemblerMIPS64::ma_dsubu(Register rd, Register rs, Imm32 imm)
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}
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}
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void
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MacroAssemblerMIPS64::ma_dsubu(Register rd, Register rs)
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{
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as_dsubu(rd, rd, rs);
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}
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void
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MacroAssemblerMIPS64::ma_dsubu(Register rd, Imm32 imm)
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{
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@ -99,6 +99,7 @@ class MacroAssemblerMIPS64 : public MacroAssemblerMIPSShared
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// subtract
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void ma_dsubu(Register rd, Register rs, Imm32 imm);
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void ma_dsubu(Register rd, Register rs);
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void ma_dsubu(Register rd, Imm32 imm);
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void ma_subTestOverflow(Register rd, Register rs, Register rt, Label* overflow);
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