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Bug 1694020 - land NSS NSS_3_63_RTM UPGRADE_NSS_RELEASE, r=beurdouche
Differential Revision: https://phabricator.services.mozilla.com/D108957
This commit is contained in:
Benjamin Beurdouche
parent
d6a03f029d
commit
8d848a2cbe
@ -1 +1 @@
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61e70233f80e
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NSS_3_63_RTM
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@ -1,4 +1,4 @@
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4.29
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4.30
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# The first line of this file must contain the human readable NSPR
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# version number, which is the minimum required version of NSPR
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@ -21,7 +21,6 @@
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#include "secoid.h"
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#include "nssutil.h"
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#include "ecl-curve.h"
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#include "chacha20poly1305.h"
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#include "pkcs1_vectors.h"
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@ -629,20 +628,19 @@ typedef enum {
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bltestSEED_ECB, /* SEED algorithm */
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bltestSEED_CBC, /* SEED algorithm */
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#endif
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bltestCHACHA20_CTR, /* ChaCha20 block cipher */
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bltestCHACHA20, /* ChaCha20 + Poly1305 */
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bltestRSA, /* Public Key Ciphers */
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bltestRSA_OAEP, /* . (Public Key Enc.) */
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bltestRSA_PSS, /* . (Public Key Sig.) */
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bltestECDSA, /* . (Public Key Sig.) */
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bltestDSA, /* . (Public Key Sig.) */
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bltestMD2, /* Hash algorithms */
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bltestMD5, /* . */
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bltestSHA1, /* . */
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bltestSHA224, /* . */
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bltestSHA256, /* . */
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bltestSHA384, /* . */
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bltestSHA512, /* . */
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bltestCHACHA20, /* ChaCha20 + Poly1305 */
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bltestRSA, /* Public Key Ciphers */
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bltestRSA_OAEP, /* . (Public Key Enc.) */
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bltestRSA_PSS, /* . (Public Key Sig.) */
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bltestECDSA, /* . (Public Key Sig.) */
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bltestDSA, /* . (Public Key Sig.) */
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bltestMD2, /* Hash algorithms */
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bltestMD5, /* . */
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bltestSHA1, /* . */
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bltestSHA224, /* . */
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bltestSHA256, /* . */
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bltestSHA384, /* . */
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bltestSHA512, /* . */
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NUMMODES
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} bltestCipherMode;
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@ -672,7 +670,6 @@ static char *mode_strings[] =
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"seed_ecb",
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"seed_cbc",
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#endif
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"chacha20_ctr",
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"chacha20_poly1305",
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"rsa",
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"rsa_oaep",
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@ -803,8 +800,12 @@ struct bltestCipherInfoStr {
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PRBool
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is_symmkeyCipher(bltestCipherMode mode)
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{
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/* change as needed! */
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if (mode >= bltestDES_ECB && mode <= bltestCHACHA20_CTR)
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/* change as needed! */
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#ifndef NSS_DISABLE_DEPRECATED_SEED
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if (mode >= bltestDES_ECB && mode <= bltestSEED_CBC)
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#else
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if (mode >= bltestDES_ECB && mode <= bltestCAMELLIA_CBC)
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#endif
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return PR_TRUE;
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return PR_FALSE;
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}
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@ -841,7 +842,6 @@ is_singleShotCipher(bltestCipherMode mode)
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switch (mode) {
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case bltestAES_GCM:
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case bltestAES_CTS:
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case bltestCHACHA20_CTR:
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case bltestCHACHA20:
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return PR_TRUE;
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default:
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@ -897,7 +897,6 @@ cipher_requires_IV(bltestCipherMode mode)
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#ifndef NSS_DISABLE_DEPRECATED_SEED
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case bltestSEED_CBC:
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#endif
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case bltestCHACHA20_CTR:
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case bltestCHACHA20:
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return PR_TRUE;
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default:
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@ -1151,21 +1150,6 @@ aes_Decrypt(void *cx, unsigned char *output, unsigned int *outputLen,
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input, inputLen);
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}
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SECStatus
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chacha20_Encrypt(void *cx, unsigned char *output, unsigned int *outputLen,
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unsigned int maxOutputLen, const unsigned char *input,
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unsigned int inputLen)
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{
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if (maxOutputLen < inputLen) {
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PORT_SetError(SEC_ERROR_OUTPUT_LEN);
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return SECFailure;
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}
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ChaCha20Context *ctx = cx;
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*outputLen = inputLen;
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return ChaCha20_Xor(output, input, inputLen, ctx->key, ctx->nonce,
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ctx->counter);
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}
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SECStatus
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chacha20_poly1305_Encrypt(void *cx, unsigned char *output,
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unsigned int *outputLen, unsigned int maxOutputLen,
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@ -1671,24 +1655,6 @@ bltest_seed_init(bltestCipherInfo *cipherInfo, PRBool encrypt)
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}
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#endif /* NSS_DISABLE_DEPRECATED_SEED */
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SECStatus
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bltest_chacha20_ctr_init(bltestCipherInfo *cipherInfo, PRBool encrypt)
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{
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const PRUint32 counter = 1;
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bltestSymmKeyParams *sk = &cipherInfo->params.sk;
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cipherInfo->cx = ChaCha20_CreateContext(sk->key.buf.data, sk->key.buf.len,
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sk->iv.buf.data, sk->iv.buf.len,
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counter);
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if (cipherInfo->cx == NULL) {
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PR_fprintf(PR_STDERR, "ChaCha20_CreateContext() returned NULL\n"
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"key must be 32 bytes, iv must be 12 bytes\n");
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return SECFailure;
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}
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cipherInfo->cipher.symmkeyCipher = chacha20_Encrypt;
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return SECSuccess;
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}
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SECStatus
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bltest_chacha20_init(bltestCipherInfo *cipherInfo, PRBool encrypt)
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{
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@ -2350,11 +2316,6 @@ cipherInit(bltestCipherInfo *cipherInfo, PRBool encrypt)
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return bltest_seed_init(cipherInfo, encrypt);
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break;
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#endif /* NSS_DISABLE_DEPRECATED_SEED */
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case bltestCHACHA20_CTR:
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outlen = cipherInfo->input.pBuf.len;
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SECITEM_AllocItem(cipherInfo->arena, &cipherInfo->output.buf, outlen);
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return bltest_chacha20_ctr_init(cipherInfo, encrypt);
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break;
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case bltestCHACHA20:
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outlen = cipherInfo->input.pBuf.len + (encrypt ? 16 : 0);
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SECITEM_AllocItem(cipherInfo->arena, &cipherInfo->output.buf, outlen);
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@ -2659,9 +2620,6 @@ cipherFinish(bltestCipherInfo *cipherInfo)
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SEED_DestroyContext((SEEDContext *)cipherInfo->cx, PR_TRUE);
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break;
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#endif /* NSS_DISABLE_DEPRECATED_SEED */
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case bltestCHACHA20_CTR:
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ChaCha20_DestroyContext((ChaCha20Context *)cipherInfo->cx, PR_TRUE);
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break;
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case bltestCHACHA20:
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ChaCha20Poly1305_DestroyContext((ChaCha20Poly1305Context *)
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cipherInfo->cx,
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@ -2748,10 +2706,7 @@ getHighUnitBytes(PRInt64 res)
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}
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}
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if (i == 0)
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return PR_smprintf("%d%s", spl[i], marks[i]);
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else
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return PR_smprintf("%d%s %d%s", spl[i], marks[i], spl[i - 1], marks[i - 1]);
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return PR_smprintf("%d%s", spl[i], marks[i]);
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}
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static void
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@ -10,3 +10,4 @@
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*/
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#error "Do not include this header file."
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@ -298,8 +298,6 @@ ifdef USE_64
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PPC_ABI := $(shell $(CC) -dM -E - < /dev/null | awk '$$2 == "_CALL_ELF" {print $$3}')
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ifeq ($(PPC_ABI),2)
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ASFILES += sha512-p8.s
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EXTRA_SRCS += chacha20poly1305-ppc.c
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ASFILES += chacha20-ppc64le.s
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endif
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endif # USE_64
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endif # ppc
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@ -764,7 +762,6 @@ $(OBJDIR)/$(PROG_PREFIX)gcm$(OBJ_SUFFIX): CFLAGS += -mcrypto -maltivec -mvsx
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$(OBJDIR)/$(PROG_PREFIX)rijndael$(OBJ_SUFFIX): CFLAGS += -mcrypto -maltivec -mvsx
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$(OBJDIR)/$(PROG_PREFIX)sha512$(OBJ_SUFFIX): CFLAGS += -mcrypto -maltivec -mvsx \
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-funroll-loops -fpeel-loops
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$(OBJDIR)/$(PROG_PREFIX)chacha20poly1305-ppc$(OBJ_SUFFIX): CFLAGS += -mcrypto -maltivec -mvsx
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endif
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endif
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@ -1041,26 +1041,6 @@ Camellia_Decrypt(CamelliaContext *cx, unsigned char *output,
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unsigned int *outputLen, unsigned int maxOutputLen,
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const unsigned char *input, unsigned int inputLen);
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/******************************************/
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/*
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** ChaCha20 block cipher
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*/
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extern SECStatus ChaCha20_InitContext(ChaCha20Context *ctx,
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const unsigned char *key,
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unsigned int keyLen,
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const unsigned char *nonce,
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unsigned int nonceLen,
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PRUint32 ctr);
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extern ChaCha20Context *ChaCha20_CreateContext(const unsigned char *key,
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unsigned int keyLen,
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const unsigned char *nonce,
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unsigned int nonceLen,
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PRUint32 ctr);
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extern void ChaCha20_DestroyContext(ChaCha20Context *ctx, PRBool freeit);
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/******************************************/
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/*
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** ChaCha20+Poly1305 AEAD
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@ -245,7 +245,6 @@ struct SHA256ContextStr;
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struct SHA512ContextStr;
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struct AESKeyWrapContextStr;
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struct SEEDContextStr;
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struct ChaCha20ContextStr;
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struct ChaCha20Poly1305ContextStr;
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struct Blake2bContextStr;
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@ -266,7 +265,6 @@ typedef struct SHA512ContextStr SHA512Context;
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typedef struct SHA512ContextStr SHA384Context;
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typedef struct AESKeyWrapContextStr AESKeyWrapContext;
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typedef struct SEEDContextStr SEEDContext;
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typedef struct ChaCha20ContextStr ChaCha20Context;
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typedef struct ChaCha20Poly1305ContextStr ChaCha20Poly1305Context;
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typedef struct Blake2bContextStr BLAKE2BContext;
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@ -1,546 +0,0 @@
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# This Source Code Form is subject to the terms of the Mozilla Public
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# License, v. 2.0. If a copy of the MPL was not distributed with this
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# file, You can obtain one at http://mozilla.org/MPL/2.0/.
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# vs0 - vs15 : buffer for xor
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# vs32 - vs47 (v0 - v15) : 4 "converted" states
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# vs48 - vs51 (v16 - v19) : original state
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# vs52 - vs55 (v20 - v23) : "converted" constants
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# vs56 (v24) : "converted" counter
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# vs57 (v25) : increment for "converted" counter
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# vs60 - vs63 (v28 - v31) : constants for rotate left or vpermxor
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#include <ppc-asm.h>
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.equ rSIZE, r3
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.equ rDST, r4
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.equ rSRC, r5
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.equ rKEY, r6
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.equ rNONCE, r7
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.equ rCNTR, r8
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.abiversion 2
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.section ".data"
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.align 5
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lblock: .skip 256
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cnts0: .long 0x61707865, 0x3320646e, 0x79622d32, 0x6b206574
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cnts1: .long 0x61707865, 0x61707865, 0x61707865, 0x61707865
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cnts2: .long 0x3320646e, 0x3320646e, 0x3320646e, 0x3320646e
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cnts3: .long 0x79622d32, 0x79622d32, 0x79622d32, 0x79622d32
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cnts4: .long 0x6b206574, 0x6b206574, 0x6b206574, 0x6b206574
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st4: .long 0, 0, 0, 0
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cntr: .long 0, 0, 0, 0
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incr: .long 4, 4, 4, 4
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rotl1: .long 0x22330011, 0x66774455, 0xAABB8899, 0xEEFFCCDD
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rotl2: .long 12, 12, 12, 12
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rotl3: .long 0x11223300, 0x55667744, 0x99AABB88, 0xDDEEFFCC
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rotl4: .long 7, 7, 7, 7
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.section ".text"
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.align 5
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.globl chacha20vsx
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.type chacha20vsx, @function
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chacha20vsx:
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# prologue
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addis 2, r12, .TOC.-chacha20vsx@ha
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addi 2, 2, .TOC.-chacha20vsx@l
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.localentry chacha20vsx, .-chacha20vsx
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std r14, -8(sp)
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std r15, -16(sp)
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std r16, -24(sp)
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std r17, -32(sp)
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std r18, -40(sp)
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std r19, -48(sp)
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std r20, -56(sp)
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std r21, -64(sp)
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std r22, -72(sp)
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std r23, -80(sp)
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std r24, -88(sp)
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std r25, -96(sp)
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std r26, -104(sp)
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std r27, -112(sp)
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std r28, -120(sp)
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std r29, -128(sp)
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std r30, -136(sp)
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std r31, -144(sp)
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addi r14, sp, -160
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li r16, -16
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li r17, -32
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li r18, -48
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li r19, -64
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li r20, -80
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li r21, -96
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li r22, -112
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li r23, -128
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li r24, -144
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li r25, -160
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li r26, -176
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li r27, -192
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li r28, -208
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# save f14, f15
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stxvw4x vs14, 0, r14
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stxvw4x vs15, r16, r14
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# save v20 - v31
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stxvw4x vs52, r17, r14
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stxvw4x vs53, r18, r14
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stxvw4x vs54, r19, r14
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stxvw4x vs55, r20, r14
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stxvw4x vs56, r21, r14
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stxvw4x vs57, r22, r14
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stxvw4x vs58, r23, r14
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stxvw4x vs59, r24, r14
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stxvw4x vs60, r25, r14
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stxvw4x vs61, r26, r14
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stxvw4x vs62, r27, r14
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stxvw4x vs63, r28, r14
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# offset in src/dst
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li r17, 16
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li r18, 32
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li r19, 48
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li r20, 64
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li r21, 80
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li r22, 96
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li r23, 112
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li r24, 128
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li r25, 144
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li r26, 160
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li r27, 176
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li r28, 192
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li r29, 208
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li r30, 224
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li r31, 240
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# load const's address
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addis r14, 2, cnts0@toc@ha
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addi r14, r14, cnts0@toc@l
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# save nonce to st4
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lwz r15, 0(rNONCE)
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stw r15, 84(r14)
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lwz r15, 4(rNONCE)
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stw r15, 88(r14)
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lwz r15, 8(rNONCE)
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stw r15, 92(r14)
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# load state to vectors
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lxvw4x vs48, 0, r14
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lxvw4x vs49, 0, rKEY
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lxvw4x vs50, r17, rKEY
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lxvw4x vs51, r21, r14
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# load consts for x4 rounds
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lxvw4x vs52, r17, r14
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lxvw4x vs53, r18, r14
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lxvw4x vs54, r19, r14
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lxvw4x vs55, r20, r14
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# counter
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stw rCNTR, 96(r14)
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addi rCNTR, rCNTR, 1
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stw rCNTR, 100(r14)
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addi rCNTR, rCNTR, 1
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stw rCNTR, 104(r14)
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addi rCNTR, rCNTR, 1
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stw rCNTR, 108(r14)
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lxvw4x vs56, r22, r14
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# load increment
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lxvw4x vs57, r23, r14
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# load rotl to vectors
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lxvw4x vs60, r24, r14
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lxvw4x vs61, r25, r14
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lxvw4x vs62, r26, r14
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lxvw4x vs63, r27, r14
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# counter for loop = size/256
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li r15, 256
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divdu. r16, rSIZE, r15
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beq lastblock
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mtctr r16
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mainloop:
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# init 16 vectors (4 states x4)
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vor v0, v20, v20
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vor v1, v21, v21
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vor v2, v22, v22
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vor v3, v23, v23
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vspltw v4, v17, v0
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vspltw v5, v17, v1
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vspltw v6, v17, v2
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vspltw v7, v17, v3
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vspltw v8, v18, v0
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vspltw v9, v18, v1
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vspltw v10, v18, v2
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vspltw v11, v18, v3
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vor v12, v24, v24
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vspltw v13, v19, v1
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vspltw v14, v19, v2
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vspltw v15, v19, v3
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.macro _plus a b_y b_x
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vadduwm \a, \a, \b_y*4+(\b_x)%4
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vadduwm \a+1, \a+1, \b_y*4+(\b_x+1)%4
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vadduwm \a+2, \a+2, \b_y*4+(\b_x+2)%4
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vadduwm \a+3, \a+3, \b_y*4+(\b_x+3)%4
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.endm
|
||||
|
||||
.macro _xor a b_y b_x
|
||||
vxor \a, \a, \b_y*4+(\b_x)%4
|
||||
vxor \a+1, \a+1, \b_y*4+(\b_x+1)%4
|
||||
vxor \a+2, \a+2, \b_y*4+(\b_x+2)%4
|
||||
vxor \a+3, \a+3, \b_y*4+(\b_x+3)%4
|
||||
.endm
|
||||
|
||||
.macro _rotl a b
|
||||
vrlw \a, \a, \b
|
||||
vrlw \a+1, \a+1, \b
|
||||
vrlw \a+2, \a+2, \b
|
||||
vrlw \a+3, \a+3, \b
|
||||
.endm
|
||||
|
||||
.macro _pxor a b_y b_x c
|
||||
vpermxor \a, \a, \b_y*4+(\b_x)%4, \c
|
||||
vpermxor \a+1, \a+1, \b_y*4+(\b_x+1)%4, \c
|
||||
vpermxor \a+2, \a+2, \b_y*4+(\b_x+2)%4, \c
|
||||
vpermxor \a+3, \a+3, \b_y*4+(\b_x+3)%4, \c
|
||||
.endm
|
||||
|
||||
# 00 01 02 03
|
||||
# 04 05 06 07
|
||||
# 08 09 10 11
|
||||
# 12 13 14 15
|
||||
.macro doubleround
|
||||
# column round
|
||||
_plus v0, v1, v0 # a+=b
|
||||
_pxor v12, v0, v0, v28 # d^=a; d<<<=16
|
||||
_plus v8, v3, v0 # c+=d
|
||||
_xor v4, v2, v0 # b^=c
|
||||
_rotl v4, v29 # b<<<=12
|
||||
_plus v0, v1, v0 # a+=b
|
||||
_pxor v12, v0, v0, v30 # d^=a; d<<<=8
|
||||
_plus v8, v3, v0 # c+=d
|
||||
_xor v4, v2, v0 # b^=c
|
||||
_rotl v4, v31 # b<<<=7
|
||||
|
||||
# diagonal round
|
||||
_plus v0, v1, v1 # a+=b
|
||||
_pxor v12, v0, v1, v28 # d^=a; d<<<=16
|
||||
_plus v8, v3, v1 # c+=d
|
||||
_xor v4, v2, v1 # b^=c
|
||||
_rotl v4, v29 # b<<<=12
|
||||
_plus v0, v1, v1 # a+=b
|
||||
_pxor v12, v0, v1, v30 # d^=a; d<<<=8
|
||||
_plus v8, v3, v1 # c+=d
|
||||
_xor v4, v2, v1 # b^=c
|
||||
_rotl v4, v31 # b<<<=7
|
||||
.endm
|
||||
|
||||
doubleround # 1
|
||||
doubleround # 2
|
||||
doubleround # 3
|
||||
doubleround # 4
|
||||
doubleround # 5
|
||||
doubleround # 6
|
||||
doubleround # 7
|
||||
doubleround # 8
|
||||
doubleround # 9
|
||||
doubleround # 10
|
||||
|
||||
# counter += original counter
|
||||
vadduwm v12, v12, v24
|
||||
|
||||
.macro convert a
|
||||
vmrgew 26, 0+\a, 1+\a
|
||||
vmrgew 27, 2+\a, 3+\a
|
||||
vmrgow 0+\a, 0+\a, 1+\a
|
||||
vmrgow 2+\a, 2+\a, 3+\a
|
||||
xxmrghd 33+\a, 32+\a, 34+\a
|
||||
xxmrgld 35+\a, 32+\a, 34+\a
|
||||
xxmrghd 32+\a, 58, 59
|
||||
xxmrgld 34+\a, 58, 59
|
||||
.endm
|
||||
|
||||
convert 0
|
||||
convert 4
|
||||
convert 8
|
||||
convert 12
|
||||
|
||||
.macro addition a
|
||||
vadduwm 0+\a, 0+\a, 16
|
||||
vadduwm 4+\a, 4+\a, 17
|
||||
vadduwm 8+\a, 8+\a, 18
|
||||
vadduwm 12+\a, 12+\a, 19
|
||||
.endm
|
||||
|
||||
addition 0
|
||||
addition 1
|
||||
addition 2
|
||||
addition 3
|
||||
|
||||
# load text/cipher
|
||||
lxvw4x vs0, 0, rSRC
|
||||
lxvw4x vs1, r17, rSRC
|
||||
lxvw4x vs2, r18, rSRC
|
||||
lxvw4x vs3, r19, rSRC
|
||||
lxvw4x vs4, r20, rSRC
|
||||
lxvw4x vs5, r21, rSRC
|
||||
lxvw4x vs6, r22, rSRC
|
||||
lxvw4x vs7, r23, rSRC
|
||||
lxvw4x vs8, r24, rSRC
|
||||
lxvw4x vs9, r25, rSRC
|
||||
lxvw4x vs10, r26, rSRC
|
||||
lxvw4x vs11, r27, rSRC
|
||||
lxvw4x vs12, r28, rSRC
|
||||
lxvw4x vs13, r29, rSRC
|
||||
lxvw4x vs14, r30, rSRC
|
||||
lxvw4x vs15, r31, rSRC
|
||||
# xor (encrypt/decrypt)
|
||||
xxlxor vs0, vs0, vs32
|
||||
xxlxor vs1, vs1, vs36
|
||||
xxlxor vs2, vs2, vs40
|
||||
xxlxor vs3, vs3, vs44
|
||||
xxlxor vs4, vs4, vs33
|
||||
xxlxor vs5, vs5, vs37
|
||||
xxlxor vs6, vs6, vs41
|
||||
xxlxor vs7, vs7, vs45
|
||||
xxlxor vs8, vs8, vs34
|
||||
xxlxor vs9, vs9, vs38
|
||||
xxlxor vs10, vs10, vs42
|
||||
xxlxor vs11, vs11, vs46
|
||||
xxlxor vs12, vs12, vs35
|
||||
xxlxor vs13, vs13, vs39
|
||||
xxlxor vs14, vs14, vs43
|
||||
xxlxor vs15, vs15, vs47
|
||||
# store cipher/text
|
||||
stxvw4x vs0, 0, rDST
|
||||
stxvw4x vs1, r17, rDST
|
||||
stxvw4x vs2, r18, rDST
|
||||
stxvw4x vs3, r19, rDST
|
||||
stxvw4x vs4, r20, rDST
|
||||
stxvw4x vs5, r21, rDST
|
||||
stxvw4x vs6, r22, rDST
|
||||
stxvw4x vs7, r23, rDST
|
||||
stxvw4x vs8, r24, rDST
|
||||
stxvw4x vs9, r25, rDST
|
||||
stxvw4x vs10, r26, rDST
|
||||
stxvw4x vs11, r27, rDST
|
||||
stxvw4x vs12, r28, rDST
|
||||
stxvw4x vs13, r29, rDST
|
||||
stxvw4x vs14, r30, rDST
|
||||
stxvw4x vs15, r31, rDST
|
||||
|
||||
# src/dst increment
|
||||
addi rSRC, rSRC, 256
|
||||
addi rDST, rDST, 256
|
||||
|
||||
# counter increment
|
||||
vadduwm v24, v24, v25
|
||||
|
||||
bdnz mainloop
|
||||
|
||||
lastblock:
|
||||
# reminder
|
||||
mulld r16, r16, r15
|
||||
subf. r16, r16, rSIZE
|
||||
|
||||
# check reminder
|
||||
beq exitsub
|
||||
|
||||
addi r14, r14, -256
|
||||
# last block x4
|
||||
# init 16 vectors (4 states x4)
|
||||
vor v0, v20, v20
|
||||
vor v1, v21, v21
|
||||
vor v2, v22, v22
|
||||
vor v3, v23, v23
|
||||
vspltw v4, v17, v0
|
||||
vspltw v5, v17, v1
|
||||
vspltw v6, v17, v2
|
||||
vspltw v7, v17, v3
|
||||
vspltw v8, v18, v0
|
||||
vspltw v9, v18, v1
|
||||
vspltw v10, v18, v2
|
||||
vspltw v11, v18, v3
|
||||
vor v12, v24, v24
|
||||
vspltw v13, v19, v1
|
||||
vspltw v14, v19, v2
|
||||
vspltw v15, v19, v3
|
||||
|
||||
doubleround # 1
|
||||
doubleround # 2
|
||||
doubleround # 3
|
||||
doubleround # 4
|
||||
doubleround # 5
|
||||
doubleround # 6
|
||||
doubleround # 7
|
||||
doubleround # 8
|
||||
doubleround # 9
|
||||
doubleround # 10
|
||||
|
||||
vadduwm v12, v12, v24
|
||||
|
||||
convert 0
|
||||
convert 4
|
||||
convert 8
|
||||
convert 12
|
||||
|
||||
addition 0
|
||||
addition 1
|
||||
addition 2
|
||||
addition 3
|
||||
|
||||
# store vectors
|
||||
stxvw4x vs32, 0, r14
|
||||
stxvw4x vs36, r17, r14
|
||||
stxvw4x vs40, r18, r14
|
||||
stxvw4x vs44, r19, r14
|
||||
stxvw4x vs33, r20, r14
|
||||
stxvw4x vs37, r21, r14
|
||||
stxvw4x vs41, r22, r14
|
||||
stxvw4x vs45, r23, r14
|
||||
stxvw4x vs34, r24, r14
|
||||
stxvw4x vs38, r25, r14
|
||||
stxvw4x vs42, r26, r14
|
||||
stxvw4x vs46, r27, r14
|
||||
stxvw4x vs35, r28, r14
|
||||
stxvw4x vs39, r29, r14
|
||||
stxvw4x vs43, r30, r14
|
||||
stxvw4x vs47, r31, r14
|
||||
|
||||
mtctr r16
|
||||
addi rSIZE, r14, -1
|
||||
addi rSRC, rSRC, -1
|
||||
addi rDST, rDST, -1
|
||||
xorlast:
|
||||
lbzu r15, 1(rSIZE)
|
||||
lbzu r16, 1(rSRC)
|
||||
xor r15, r15, r16
|
||||
stbu r15, 1(rDST)
|
||||
bdnz xorlast
|
||||
|
||||
# zeroing last block
|
||||
xxlxor vs0, vs0, vs0
|
||||
stxvw4x vs0, 0, r14
|
||||
stxvw4x vs0, r17, r14
|
||||
stxvw4x vs0, r18, r14
|
||||
stxvw4x vs0, r19, r14
|
||||
stxvw4x vs0, r20, r14
|
||||
stxvw4x vs0, r21, r14
|
||||
stxvw4x vs0, r22, r14
|
||||
stxvw4x vs0, r23, r14
|
||||
stxvw4x vs0, r24, r14
|
||||
stxvw4x vs0, r25, r14
|
||||
stxvw4x vs0, r26, r14
|
||||
stxvw4x vs0, r27, r14
|
||||
stxvw4x vs0, r28, r14
|
||||
stxvw4x vs0, r29, r14
|
||||
stxvw4x vs0, r30, r14
|
||||
stxvw4x vs0, r31, r14
|
||||
|
||||
exitsub:
|
||||
# zeroing volatile registers
|
||||
xxlxor vs0, vs0, vs0
|
||||
xxlxor vs1, vs1, vs1
|
||||
xxlxor vs2, vs2, vs2
|
||||
xxlxor vs3, vs3, vs3
|
||||
xxlxor vs4, vs4, vs4
|
||||
xxlxor vs5, vs5, vs5
|
||||
xxlxor vs6, vs6, vs6
|
||||
xxlxor vs7, vs7, vs7
|
||||
xxlxor vs8, vs8, vs8
|
||||
xxlxor vs9, vs9, vs9
|
||||
xxlxor vs10, vs10, vs10
|
||||
xxlxor vs11, vs11, vs11
|
||||
xxlxor vs12, vs12, vs12
|
||||
xxlxor vs13, vs13, vs13
|
||||
|
||||
xxlxor vs32, vs32, vs32
|
||||
xxlxor vs33, vs33, vs33
|
||||
xxlxor vs34, vs34, vs34
|
||||
xxlxor vs35, vs35, vs35
|
||||
xxlxor vs36, vs36, vs36
|
||||
xxlxor vs37, vs37, vs37
|
||||
xxlxor vs38, vs38, vs38
|
||||
xxlxor vs39, vs39, vs39
|
||||
xxlxor vs40, vs40, vs40
|
||||
xxlxor vs41, vs41, vs41
|
||||
xxlxor vs42, vs42, vs42
|
||||
xxlxor vs43, vs43, vs43
|
||||
xxlxor vs44, vs44, vs44
|
||||
xxlxor vs45, vs45, vs45
|
||||
xxlxor vs46, vs46, vs46
|
||||
xxlxor vs47, vs47, vs47
|
||||
xxlxor vs48, vs48, vs48
|
||||
xxlxor vs49, vs49, vs49
|
||||
xxlxor vs50, vs50, vs50
|
||||
xxlxor vs51, vs51, vs51
|
||||
|
||||
li rSIZE, 0
|
||||
li rDST, 0
|
||||
li rSRC, 0
|
||||
li rKEY, 0
|
||||
li rNONCE, 0
|
||||
li rCNTR, 0
|
||||
|
||||
# epilogue
|
||||
addi r14, sp, -160
|
||||
|
||||
li r16, -16
|
||||
li r17, -32
|
||||
li r18, -48
|
||||
li r19, -64
|
||||
li r20, -80
|
||||
li r21, -96
|
||||
li r22, -112
|
||||
li r23, -128
|
||||
li r24, -144
|
||||
li r25, -160
|
||||
li r26, -176
|
||||
li r27, -192
|
||||
li r28, -208
|
||||
|
||||
# load f14, f15
|
||||
lxvw4x vs14, 0, r14
|
||||
lxvw4x vs15, r16, r14
|
||||
|
||||
# load v20 - v31
|
||||
lxvw4x vs52, r17, r14
|
||||
lxvw4x vs53, r18, r14
|
||||
lxvw4x vs54, r19, r14
|
||||
lxvw4x vs55, r20, r14
|
||||
lxvw4x vs56, r21, r14
|
||||
lxvw4x vs57, r22, r14
|
||||
lxvw4x vs58, r23, r14
|
||||
lxvw4x vs59, r24, r14
|
||||
lxvw4x vs60, r25, r14
|
||||
lxvw4x vs61, r26, r14
|
||||
lxvw4x vs62, r27, r14
|
||||
lxvw4x vs63, r28, r14
|
||||
|
||||
ld r14, -8(sp)
|
||||
ld r15, -16(sp)
|
||||
ld r16, -24(sp)
|
||||
ld r17, -32(sp)
|
||||
ld r18, -40(sp)
|
||||
ld r19, -48(sp)
|
||||
ld r20, -56(sp)
|
||||
ld r21, -64(sp)
|
||||
ld r22, -72(sp)
|
||||
ld r23, -80(sp)
|
||||
ld r24, -88(sp)
|
||||
ld r25, -96(sp)
|
||||
ld r26, -104(sp)
|
||||
ld r27, -112(sp)
|
||||
ld r28, -120(sp)
|
||||
ld r29, -128(sp)
|
||||
ld r30, -136(sp)
|
||||
ld r31, -144(sp)
|
||||
|
||||
blr
|
||||
@ -1,588 +0,0 @@
|
||||
/* MIT License
|
||||
*
|
||||
* Copyright (c) 2016-2020 INRIA, CMU and Microsoft Corporation
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "Hacl_Chacha20Poly1305_32.h"
|
||||
|
||||
/* Forward declaration from chacha20-ppc64le.S */
|
||||
void chacha20vsx(uint32_t len, uint8_t *output, uint8_t *block, uint8_t *k,
|
||||
uint8_t *nonce, uint32_t ctr);
|
||||
|
||||
static inline void
|
||||
poly1305_padded_32(uint64_t *ctx, uint32_t len, uint8_t *text)
|
||||
{
|
||||
uint32_t n = len / (uint32_t)16U;
|
||||
uint32_t r = len % (uint32_t)16U;
|
||||
uint8_t *blocks = text;
|
||||
uint8_t *rem = text + n * (uint32_t)16U;
|
||||
uint64_t *pre0 = ctx + (uint32_t)5U;
|
||||
uint64_t *acc0 = ctx;
|
||||
uint32_t nb = n * (uint32_t)16U / (uint32_t)16U;
|
||||
uint32_t rem1 = n * (uint32_t)16U % (uint32_t)16U;
|
||||
for (uint32_t i = (uint32_t)0U; i < nb; i++) {
|
||||
uint8_t *block = blocks + i * (uint32_t)16U;
|
||||
uint64_t e[5U] = { 0U };
|
||||
uint64_t u0 = load64_le(block);
|
||||
uint64_t lo = u0;
|
||||
uint64_t u = load64_le(block + (uint32_t)8U);
|
||||
uint64_t hi = u;
|
||||
uint64_t f0 = lo;
|
||||
uint64_t f1 = hi;
|
||||
uint64_t f010 = f0 & (uint64_t)0x3ffffffU;
|
||||
uint64_t f110 = f0 >> (uint32_t)26U & (uint64_t)0x3ffffffU;
|
||||
uint64_t f20 = f0 >> (uint32_t)52U | (f1 & (uint64_t)0x3fffU) << (uint32_t)12U;
|
||||
uint64_t f30 = f1 >> (uint32_t)14U & (uint64_t)0x3ffffffU;
|
||||
uint64_t f40 = f1 >> (uint32_t)40U;
|
||||
uint64_t f01 = f010;
|
||||
uint64_t f111 = f110;
|
||||
uint64_t f2 = f20;
|
||||
uint64_t f3 = f30;
|
||||
uint64_t f41 = f40;
|
||||
e[0U] = f01;
|
||||
e[1U] = f111;
|
||||
e[2U] = f2;
|
||||
e[3U] = f3;
|
||||
e[4U] = f41;
|
||||
uint64_t b = (uint64_t)0x1000000U;
|
||||
uint64_t mask = b;
|
||||
uint64_t f4 = e[4U];
|
||||
e[4U] = f4 | mask;
|
||||
uint64_t *r1 = pre0;
|
||||
uint64_t *r5 = pre0 + (uint32_t)5U;
|
||||
uint64_t r0 = r1[0U];
|
||||
uint64_t r11 = r1[1U];
|
||||
uint64_t r2 = r1[2U];
|
||||
uint64_t r3 = r1[3U];
|
||||
uint64_t r4 = r1[4U];
|
||||
uint64_t r51 = r5[1U];
|
||||
uint64_t r52 = r5[2U];
|
||||
uint64_t r53 = r5[3U];
|
||||
uint64_t r54 = r5[4U];
|
||||
uint64_t f10 = e[0U];
|
||||
uint64_t f11 = e[1U];
|
||||
uint64_t f12 = e[2U];
|
||||
uint64_t f13 = e[3U];
|
||||
uint64_t f14 = e[4U];
|
||||
uint64_t a0 = acc0[0U];
|
||||
uint64_t a1 = acc0[1U];
|
||||
uint64_t a2 = acc0[2U];
|
||||
uint64_t a3 = acc0[3U];
|
||||
uint64_t a4 = acc0[4U];
|
||||
uint64_t a01 = a0 + f10;
|
||||
uint64_t a11 = a1 + f11;
|
||||
uint64_t a21 = a2 + f12;
|
||||
uint64_t a31 = a3 + f13;
|
||||
uint64_t a41 = a4 + f14;
|
||||
uint64_t a02 = r0 * a01;
|
||||
uint64_t a12 = r11 * a01;
|
||||
uint64_t a22 = r2 * a01;
|
||||
uint64_t a32 = r3 * a01;
|
||||
uint64_t a42 = r4 * a01;
|
||||
uint64_t a03 = a02 + r54 * a11;
|
||||
uint64_t a13 = a12 + r0 * a11;
|
||||
uint64_t a23 = a22 + r11 * a11;
|
||||
uint64_t a33 = a32 + r2 * a11;
|
||||
uint64_t a43 = a42 + r3 * a11;
|
||||
uint64_t a04 = a03 + r53 * a21;
|
||||
uint64_t a14 = a13 + r54 * a21;
|
||||
uint64_t a24 = a23 + r0 * a21;
|
||||
uint64_t a34 = a33 + r11 * a21;
|
||||
uint64_t a44 = a43 + r2 * a21;
|
||||
uint64_t a05 = a04 + r52 * a31;
|
||||
uint64_t a15 = a14 + r53 * a31;
|
||||
uint64_t a25 = a24 + r54 * a31;
|
||||
uint64_t a35 = a34 + r0 * a31;
|
||||
uint64_t a45 = a44 + r11 * a31;
|
||||
uint64_t a06 = a05 + r51 * a41;
|
||||
uint64_t a16 = a15 + r52 * a41;
|
||||
uint64_t a26 = a25 + r53 * a41;
|
||||
uint64_t a36 = a35 + r54 * a41;
|
||||
uint64_t a46 = a45 + r0 * a41;
|
||||
uint64_t t0 = a06;
|
||||
uint64_t t1 = a16;
|
||||
uint64_t t2 = a26;
|
||||
uint64_t t3 = a36;
|
||||
uint64_t t4 = a46;
|
||||
uint64_t mask26 = (uint64_t)0x3ffffffU;
|
||||
uint64_t z0 = t0 >> (uint32_t)26U;
|
||||
uint64_t z1 = t3 >> (uint32_t)26U;
|
||||
uint64_t x0 = t0 & mask26;
|
||||
uint64_t x3 = t3 & mask26;
|
||||
uint64_t x1 = t1 + z0;
|
||||
uint64_t x4 = t4 + z1;
|
||||
uint64_t z01 = x1 >> (uint32_t)26U;
|
||||
uint64_t z11 = x4 >> (uint32_t)26U;
|
||||
uint64_t t = z11 << (uint32_t)2U;
|
||||
uint64_t z12 = z11 + t;
|
||||
uint64_t x11 = x1 & mask26;
|
||||
uint64_t x41 = x4 & mask26;
|
||||
uint64_t x2 = t2 + z01;
|
||||
uint64_t x01 = x0 + z12;
|
||||
uint64_t z02 = x2 >> (uint32_t)26U;
|
||||
uint64_t z13 = x01 >> (uint32_t)26U;
|
||||
uint64_t x21 = x2 & mask26;
|
||||
uint64_t x02 = x01 & mask26;
|
||||
uint64_t x31 = x3 + z02;
|
||||
uint64_t x12 = x11 + z13;
|
||||
uint64_t z03 = x31 >> (uint32_t)26U;
|
||||
uint64_t x32 = x31 & mask26;
|
||||
uint64_t x42 = x41 + z03;
|
||||
uint64_t o0 = x02;
|
||||
uint64_t o1 = x12;
|
||||
uint64_t o2 = x21;
|
||||
uint64_t o3 = x32;
|
||||
uint64_t o4 = x42;
|
||||
acc0[0U] = o0;
|
||||
acc0[1U] = o1;
|
||||
acc0[2U] = o2;
|
||||
acc0[3U] = o3;
|
||||
acc0[4U] = o4;
|
||||
}
|
||||
if (rem1 > (uint32_t)0U) {
|
||||
uint8_t *last = blocks + nb * (uint32_t)16U;
|
||||
uint64_t e[5U] = { 0U };
|
||||
uint8_t tmp[16U] = { 0U };
|
||||
memcpy(tmp, last, rem1 * sizeof(last[0U]));
|
||||
uint64_t u0 = load64_le(tmp);
|
||||
uint64_t lo = u0;
|
||||
uint64_t u = load64_le(tmp + (uint32_t)8U);
|
||||
uint64_t hi = u;
|
||||
uint64_t f0 = lo;
|
||||
uint64_t f1 = hi;
|
||||
uint64_t f010 = f0 & (uint64_t)0x3ffffffU;
|
||||
uint64_t f110 = f0 >> (uint32_t)26U & (uint64_t)0x3ffffffU;
|
||||
uint64_t f20 = f0 >> (uint32_t)52U | (f1 & (uint64_t)0x3fffU) << (uint32_t)12U;
|
||||
uint64_t f30 = f1 >> (uint32_t)14U & (uint64_t)0x3ffffffU;
|
||||
uint64_t f40 = f1 >> (uint32_t)40U;
|
||||
uint64_t f01 = f010;
|
||||
uint64_t f111 = f110;
|
||||
uint64_t f2 = f20;
|
||||
uint64_t f3 = f30;
|
||||
uint64_t f4 = f40;
|
||||
e[0U] = f01;
|
||||
e[1U] = f111;
|
||||
e[2U] = f2;
|
||||
e[3U] = f3;
|
||||
e[4U] = f4;
|
||||
uint64_t b = (uint64_t)1U << rem1 * (uint32_t)8U % (uint32_t)26U;
|
||||
uint64_t mask = b;
|
||||
uint64_t fi = e[rem1 * (uint32_t)8U / (uint32_t)26U];
|
||||
e[rem1 * (uint32_t)8U / (uint32_t)26U] = fi | mask;
|
||||
uint64_t *r1 = pre0;
|
||||
uint64_t *r5 = pre0 + (uint32_t)5U;
|
||||
uint64_t r0 = r1[0U];
|
||||
uint64_t r11 = r1[1U];
|
||||
uint64_t r2 = r1[2U];
|
||||
uint64_t r3 = r1[3U];
|
||||
uint64_t r4 = r1[4U];
|
||||
uint64_t r51 = r5[1U];
|
||||
uint64_t r52 = r5[2U];
|
||||
uint64_t r53 = r5[3U];
|
||||
uint64_t r54 = r5[4U];
|
||||
uint64_t f10 = e[0U];
|
||||
uint64_t f11 = e[1U];
|
||||
uint64_t f12 = e[2U];
|
||||
uint64_t f13 = e[3U];
|
||||
uint64_t f14 = e[4U];
|
||||
uint64_t a0 = acc0[0U];
|
||||
uint64_t a1 = acc0[1U];
|
||||
uint64_t a2 = acc0[2U];
|
||||
uint64_t a3 = acc0[3U];
|
||||
uint64_t a4 = acc0[4U];
|
||||
uint64_t a01 = a0 + f10;
|
||||
uint64_t a11 = a1 + f11;
|
||||
uint64_t a21 = a2 + f12;
|
||||
uint64_t a31 = a3 + f13;
|
||||
uint64_t a41 = a4 + f14;
|
||||
uint64_t a02 = r0 * a01;
|
||||
uint64_t a12 = r11 * a01;
|
||||
uint64_t a22 = r2 * a01;
|
||||
uint64_t a32 = r3 * a01;
|
||||
uint64_t a42 = r4 * a01;
|
||||
uint64_t a03 = a02 + r54 * a11;
|
||||
uint64_t a13 = a12 + r0 * a11;
|
||||
uint64_t a23 = a22 + r11 * a11;
|
||||
uint64_t a33 = a32 + r2 * a11;
|
||||
uint64_t a43 = a42 + r3 * a11;
|
||||
uint64_t a04 = a03 + r53 * a21;
|
||||
uint64_t a14 = a13 + r54 * a21;
|
||||
uint64_t a24 = a23 + r0 * a21;
|
||||
uint64_t a34 = a33 + r11 * a21;
|
||||
uint64_t a44 = a43 + r2 * a21;
|
||||
uint64_t a05 = a04 + r52 * a31;
|
||||
uint64_t a15 = a14 + r53 * a31;
|
||||
uint64_t a25 = a24 + r54 * a31;
|
||||
uint64_t a35 = a34 + r0 * a31;
|
||||
uint64_t a45 = a44 + r11 * a31;
|
||||
uint64_t a06 = a05 + r51 * a41;
|
||||
uint64_t a16 = a15 + r52 * a41;
|
||||
uint64_t a26 = a25 + r53 * a41;
|
||||
uint64_t a36 = a35 + r54 * a41;
|
||||
uint64_t a46 = a45 + r0 * a41;
|
||||
uint64_t t0 = a06;
|
||||
uint64_t t1 = a16;
|
||||
uint64_t t2 = a26;
|
||||
uint64_t t3 = a36;
|
||||
uint64_t t4 = a46;
|
||||
uint64_t mask26 = (uint64_t)0x3ffffffU;
|
||||
uint64_t z0 = t0 >> (uint32_t)26U;
|
||||
uint64_t z1 = t3 >> (uint32_t)26U;
|
||||
uint64_t x0 = t0 & mask26;
|
||||
uint64_t x3 = t3 & mask26;
|
||||
uint64_t x1 = t1 + z0;
|
||||
uint64_t x4 = t4 + z1;
|
||||
uint64_t z01 = x1 >> (uint32_t)26U;
|
||||
uint64_t z11 = x4 >> (uint32_t)26U;
|
||||
uint64_t t = z11 << (uint32_t)2U;
|
||||
uint64_t z12 = z11 + t;
|
||||
uint64_t x11 = x1 & mask26;
|
||||
uint64_t x41 = x4 & mask26;
|
||||
uint64_t x2 = t2 + z01;
|
||||
uint64_t x01 = x0 + z12;
|
||||
uint64_t z02 = x2 >> (uint32_t)26U;
|
||||
uint64_t z13 = x01 >> (uint32_t)26U;
|
||||
uint64_t x21 = x2 & mask26;
|
||||
uint64_t x02 = x01 & mask26;
|
||||
uint64_t x31 = x3 + z02;
|
||||
uint64_t x12 = x11 + z13;
|
||||
uint64_t z03 = x31 >> (uint32_t)26U;
|
||||
uint64_t x32 = x31 & mask26;
|
||||
uint64_t x42 = x41 + z03;
|
||||
uint64_t o0 = x02;
|
||||
uint64_t o1 = x12;
|
||||
uint64_t o2 = x21;
|
||||
uint64_t o3 = x32;
|
||||
uint64_t o4 = x42;
|
||||
acc0[0U] = o0;
|
||||
acc0[1U] = o1;
|
||||
acc0[2U] = o2;
|
||||
acc0[3U] = o3;
|
||||
acc0[4U] = o4;
|
||||
}
|
||||
uint8_t tmp[16U] = { 0U };
|
||||
memcpy(tmp, rem, r * sizeof(rem[0U]));
|
||||
if (r > (uint32_t)0U) {
|
||||
uint64_t *pre = ctx + (uint32_t)5U;
|
||||
uint64_t *acc = ctx;
|
||||
uint64_t e[5U] = { 0U };
|
||||
uint64_t u0 = load64_le(tmp);
|
||||
uint64_t lo = u0;
|
||||
uint64_t u = load64_le(tmp + (uint32_t)8U);
|
||||
uint64_t hi = u;
|
||||
uint64_t f0 = lo;
|
||||
uint64_t f1 = hi;
|
||||
uint64_t f010 = f0 & (uint64_t)0x3ffffffU;
|
||||
uint64_t f110 = f0 >> (uint32_t)26U & (uint64_t)0x3ffffffU;
|
||||
uint64_t f20 = f0 >> (uint32_t)52U | (f1 & (uint64_t)0x3fffU) << (uint32_t)12U;
|
||||
uint64_t f30 = f1 >> (uint32_t)14U & (uint64_t)0x3ffffffU;
|
||||
uint64_t f40 = f1 >> (uint32_t)40U;
|
||||
uint64_t f01 = f010;
|
||||
uint64_t f111 = f110;
|
||||
uint64_t f2 = f20;
|
||||
uint64_t f3 = f30;
|
||||
uint64_t f41 = f40;
|
||||
e[0U] = f01;
|
||||
e[1U] = f111;
|
||||
e[2U] = f2;
|
||||
e[3U] = f3;
|
||||
e[4U] = f41;
|
||||
uint64_t b = (uint64_t)0x1000000U;
|
||||
uint64_t mask = b;
|
||||
uint64_t f4 = e[4U];
|
||||
e[4U] = f4 | mask;
|
||||
uint64_t *r1 = pre;
|
||||
uint64_t *r5 = pre + (uint32_t)5U;
|
||||
uint64_t r0 = r1[0U];
|
||||
uint64_t r11 = r1[1U];
|
||||
uint64_t r2 = r1[2U];
|
||||
uint64_t r3 = r1[3U];
|
||||
uint64_t r4 = r1[4U];
|
||||
uint64_t r51 = r5[1U];
|
||||
uint64_t r52 = r5[2U];
|
||||
uint64_t r53 = r5[3U];
|
||||
uint64_t r54 = r5[4U];
|
||||
uint64_t f10 = e[0U];
|
||||
uint64_t f11 = e[1U];
|
||||
uint64_t f12 = e[2U];
|
||||
uint64_t f13 = e[3U];
|
||||
uint64_t f14 = e[4U];
|
||||
uint64_t a0 = acc[0U];
|
||||
uint64_t a1 = acc[1U];
|
||||
uint64_t a2 = acc[2U];
|
||||
uint64_t a3 = acc[3U];
|
||||
uint64_t a4 = acc[4U];
|
||||
uint64_t a01 = a0 + f10;
|
||||
uint64_t a11 = a1 + f11;
|
||||
uint64_t a21 = a2 + f12;
|
||||
uint64_t a31 = a3 + f13;
|
||||
uint64_t a41 = a4 + f14;
|
||||
uint64_t a02 = r0 * a01;
|
||||
uint64_t a12 = r11 * a01;
|
||||
uint64_t a22 = r2 * a01;
|
||||
uint64_t a32 = r3 * a01;
|
||||
uint64_t a42 = r4 * a01;
|
||||
uint64_t a03 = a02 + r54 * a11;
|
||||
uint64_t a13 = a12 + r0 * a11;
|
||||
uint64_t a23 = a22 + r11 * a11;
|
||||
uint64_t a33 = a32 + r2 * a11;
|
||||
uint64_t a43 = a42 + r3 * a11;
|
||||
uint64_t a04 = a03 + r53 * a21;
|
||||
uint64_t a14 = a13 + r54 * a21;
|
||||
uint64_t a24 = a23 + r0 * a21;
|
||||
uint64_t a34 = a33 + r11 * a21;
|
||||
uint64_t a44 = a43 + r2 * a21;
|
||||
uint64_t a05 = a04 + r52 * a31;
|
||||
uint64_t a15 = a14 + r53 * a31;
|
||||
uint64_t a25 = a24 + r54 * a31;
|
||||
uint64_t a35 = a34 + r0 * a31;
|
||||
uint64_t a45 = a44 + r11 * a31;
|
||||
uint64_t a06 = a05 + r51 * a41;
|
||||
uint64_t a16 = a15 + r52 * a41;
|
||||
uint64_t a26 = a25 + r53 * a41;
|
||||
uint64_t a36 = a35 + r54 * a41;
|
||||
uint64_t a46 = a45 + r0 * a41;
|
||||
uint64_t t0 = a06;
|
||||
uint64_t t1 = a16;
|
||||
uint64_t t2 = a26;
|
||||
uint64_t t3 = a36;
|
||||
uint64_t t4 = a46;
|
||||
uint64_t mask26 = (uint64_t)0x3ffffffU;
|
||||
uint64_t z0 = t0 >> (uint32_t)26U;
|
||||
uint64_t z1 = t3 >> (uint32_t)26U;
|
||||
uint64_t x0 = t0 & mask26;
|
||||
uint64_t x3 = t3 & mask26;
|
||||
uint64_t x1 = t1 + z0;
|
||||
uint64_t x4 = t4 + z1;
|
||||
uint64_t z01 = x1 >> (uint32_t)26U;
|
||||
uint64_t z11 = x4 >> (uint32_t)26U;
|
||||
uint64_t t = z11 << (uint32_t)2U;
|
||||
uint64_t z12 = z11 + t;
|
||||
uint64_t x11 = x1 & mask26;
|
||||
uint64_t x41 = x4 & mask26;
|
||||
uint64_t x2 = t2 + z01;
|
||||
uint64_t x01 = x0 + z12;
|
||||
uint64_t z02 = x2 >> (uint32_t)26U;
|
||||
uint64_t z13 = x01 >> (uint32_t)26U;
|
||||
uint64_t x21 = x2 & mask26;
|
||||
uint64_t x02 = x01 & mask26;
|
||||
uint64_t x31 = x3 + z02;
|
||||
uint64_t x12 = x11 + z13;
|
||||
uint64_t z03 = x31 >> (uint32_t)26U;
|
||||
uint64_t x32 = x31 & mask26;
|
||||
uint64_t x42 = x41 + z03;
|
||||
uint64_t o0 = x02;
|
||||
uint64_t o1 = x12;
|
||||
uint64_t o2 = x21;
|
||||
uint64_t o3 = x32;
|
||||
uint64_t o4 = x42;
|
||||
acc[0U] = o0;
|
||||
acc[1U] = o1;
|
||||
acc[2U] = o2;
|
||||
acc[3U] = o3;
|
||||
acc[4U] = o4;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void
|
||||
poly1305_do_32(
|
||||
uint8_t *k,
|
||||
uint32_t aadlen,
|
||||
uint8_t *aad,
|
||||
uint32_t mlen,
|
||||
uint8_t *m,
|
||||
uint8_t *out)
|
||||
{
|
||||
uint64_t ctx[25U] = { 0U };
|
||||
uint8_t block[16U] = { 0U };
|
||||
Hacl_Poly1305_32_poly1305_init(ctx, k);
|
||||
poly1305_padded_32(ctx, aadlen, aad);
|
||||
poly1305_padded_32(ctx, mlen, m);
|
||||
store64_le(block, (uint64_t)aadlen);
|
||||
store64_le(block + (uint32_t)8U, (uint64_t)mlen);
|
||||
uint64_t *pre = ctx + (uint32_t)5U;
|
||||
uint64_t *acc = ctx;
|
||||
uint64_t e[5U] = { 0U };
|
||||
uint64_t u0 = load64_le(block);
|
||||
uint64_t lo = u0;
|
||||
uint64_t u = load64_le(block + (uint32_t)8U);
|
||||
uint64_t hi = u;
|
||||
uint64_t f0 = lo;
|
||||
uint64_t f1 = hi;
|
||||
uint64_t f010 = f0 & (uint64_t)0x3ffffffU;
|
||||
uint64_t f110 = f0 >> (uint32_t)26U & (uint64_t)0x3ffffffU;
|
||||
uint64_t f20 = f0 >> (uint32_t)52U | (f1 & (uint64_t)0x3fffU) << (uint32_t)12U;
|
||||
uint64_t f30 = f1 >> (uint32_t)14U & (uint64_t)0x3ffffffU;
|
||||
uint64_t f40 = f1 >> (uint32_t)40U;
|
||||
uint64_t f01 = f010;
|
||||
uint64_t f111 = f110;
|
||||
uint64_t f2 = f20;
|
||||
uint64_t f3 = f30;
|
||||
uint64_t f41 = f40;
|
||||
e[0U] = f01;
|
||||
e[1U] = f111;
|
||||
e[2U] = f2;
|
||||
e[3U] = f3;
|
||||
e[4U] = f41;
|
||||
uint64_t b = (uint64_t)0x1000000U;
|
||||
uint64_t mask = b;
|
||||
uint64_t f4 = e[4U];
|
||||
e[4U] = f4 | mask;
|
||||
uint64_t *r = pre;
|
||||
uint64_t *r5 = pre + (uint32_t)5U;
|
||||
uint64_t r0 = r[0U];
|
||||
uint64_t r1 = r[1U];
|
||||
uint64_t r2 = r[2U];
|
||||
uint64_t r3 = r[3U];
|
||||
uint64_t r4 = r[4U];
|
||||
uint64_t r51 = r5[1U];
|
||||
uint64_t r52 = r5[2U];
|
||||
uint64_t r53 = r5[3U];
|
||||
uint64_t r54 = r5[4U];
|
||||
uint64_t f10 = e[0U];
|
||||
uint64_t f11 = e[1U];
|
||||
uint64_t f12 = e[2U];
|
||||
uint64_t f13 = e[3U];
|
||||
uint64_t f14 = e[4U];
|
||||
uint64_t a0 = acc[0U];
|
||||
uint64_t a1 = acc[1U];
|
||||
uint64_t a2 = acc[2U];
|
||||
uint64_t a3 = acc[3U];
|
||||
uint64_t a4 = acc[4U];
|
||||
uint64_t a01 = a0 + f10;
|
||||
uint64_t a11 = a1 + f11;
|
||||
uint64_t a21 = a2 + f12;
|
||||
uint64_t a31 = a3 + f13;
|
||||
uint64_t a41 = a4 + f14;
|
||||
uint64_t a02 = r0 * a01;
|
||||
uint64_t a12 = r1 * a01;
|
||||
uint64_t a22 = r2 * a01;
|
||||
uint64_t a32 = r3 * a01;
|
||||
uint64_t a42 = r4 * a01;
|
||||
uint64_t a03 = a02 + r54 * a11;
|
||||
uint64_t a13 = a12 + r0 * a11;
|
||||
uint64_t a23 = a22 + r1 * a11;
|
||||
uint64_t a33 = a32 + r2 * a11;
|
||||
uint64_t a43 = a42 + r3 * a11;
|
||||
uint64_t a04 = a03 + r53 * a21;
|
||||
uint64_t a14 = a13 + r54 * a21;
|
||||
uint64_t a24 = a23 + r0 * a21;
|
||||
uint64_t a34 = a33 + r1 * a21;
|
||||
uint64_t a44 = a43 + r2 * a21;
|
||||
uint64_t a05 = a04 + r52 * a31;
|
||||
uint64_t a15 = a14 + r53 * a31;
|
||||
uint64_t a25 = a24 + r54 * a31;
|
||||
uint64_t a35 = a34 + r0 * a31;
|
||||
uint64_t a45 = a44 + r1 * a31;
|
||||
uint64_t a06 = a05 + r51 * a41;
|
||||
uint64_t a16 = a15 + r52 * a41;
|
||||
uint64_t a26 = a25 + r53 * a41;
|
||||
uint64_t a36 = a35 + r54 * a41;
|
||||
uint64_t a46 = a45 + r0 * a41;
|
||||
uint64_t t0 = a06;
|
||||
uint64_t t1 = a16;
|
||||
uint64_t t2 = a26;
|
||||
uint64_t t3 = a36;
|
||||
uint64_t t4 = a46;
|
||||
uint64_t mask26 = (uint64_t)0x3ffffffU;
|
||||
uint64_t z0 = t0 >> (uint32_t)26U;
|
||||
uint64_t z1 = t3 >> (uint32_t)26U;
|
||||
uint64_t x0 = t0 & mask26;
|
||||
uint64_t x3 = t3 & mask26;
|
||||
uint64_t x1 = t1 + z0;
|
||||
uint64_t x4 = t4 + z1;
|
||||
uint64_t z01 = x1 >> (uint32_t)26U;
|
||||
uint64_t z11 = x4 >> (uint32_t)26U;
|
||||
uint64_t t = z11 << (uint32_t)2U;
|
||||
uint64_t z12 = z11 + t;
|
||||
uint64_t x11 = x1 & mask26;
|
||||
uint64_t x41 = x4 & mask26;
|
||||
uint64_t x2 = t2 + z01;
|
||||
uint64_t x01 = x0 + z12;
|
||||
uint64_t z02 = x2 >> (uint32_t)26U;
|
||||
uint64_t z13 = x01 >> (uint32_t)26U;
|
||||
uint64_t x21 = x2 & mask26;
|
||||
uint64_t x02 = x01 & mask26;
|
||||
uint64_t x31 = x3 + z02;
|
||||
uint64_t x12 = x11 + z13;
|
||||
uint64_t z03 = x31 >> (uint32_t)26U;
|
||||
uint64_t x32 = x31 & mask26;
|
||||
uint64_t x42 = x41 + z03;
|
||||
uint64_t o0 = x02;
|
||||
uint64_t o1 = x12;
|
||||
uint64_t o2 = x21;
|
||||
uint64_t o3 = x32;
|
||||
uint64_t o4 = x42;
|
||||
acc[0U] = o0;
|
||||
acc[1U] = o1;
|
||||
acc[2U] = o2;
|
||||
acc[3U] = o3;
|
||||
acc[4U] = o4;
|
||||
Hacl_Poly1305_32_poly1305_finish(out, k, ctx);
|
||||
}
|
||||
|
||||
void
|
||||
Chacha20Poly1305_vsx_aead_encrypt(
|
||||
uint8_t *k,
|
||||
uint8_t *n,
|
||||
uint32_t aadlen,
|
||||
uint8_t *aad,
|
||||
uint32_t mlen,
|
||||
uint8_t *m,
|
||||
uint8_t *cipher,
|
||||
uint8_t *mac)
|
||||
{
|
||||
chacha20vsx(mlen, cipher, m, k, n, (uint32_t)1U);
|
||||
uint8_t tmp[64U] = { 0U };
|
||||
chacha20vsx((uint32_t)64U, tmp, tmp, k, n, (uint32_t)0U);
|
||||
uint8_t *key = tmp;
|
||||
poly1305_do_32(key, aadlen, aad, mlen, cipher, mac);
|
||||
}
|
||||
|
||||
uint32_t
|
||||
Chacha20Poly1305_vsx_aead_decrypt(
|
||||
uint8_t *k,
|
||||
uint8_t *n,
|
||||
uint32_t aadlen,
|
||||
uint8_t *aad,
|
||||
uint32_t mlen,
|
||||
uint8_t *m,
|
||||
uint8_t *cipher,
|
||||
uint8_t *mac)
|
||||
{
|
||||
uint8_t computed_mac[16U] = { 0U };
|
||||
uint8_t tmp[64U] = { 0U };
|
||||
chacha20vsx((uint32_t)64U, tmp, tmp, k, n, (uint32_t)0U);
|
||||
uint8_t *key = tmp;
|
||||
poly1305_do_32(key, aadlen, aad, mlen, cipher, computed_mac);
|
||||
uint8_t res = (uint8_t)255U;
|
||||
for (uint32_t i = (uint32_t)0U; i < (uint32_t)16U; i++) {
|
||||
uint8_t uu____0 = FStar_UInt8_eq_mask(computed_mac[i], mac[i]);
|
||||
res = uu____0 & res;
|
||||
}
|
||||
uint8_t z = res;
|
||||
if (z == (uint8_t)255U) {
|
||||
chacha20vsx(mlen, m, cipher, k, n, (uint32_t)1U);
|
||||
return (uint32_t)0U;
|
||||
}
|
||||
return (uint32_t)1U;
|
||||
}
|
||||
@ -69,80 +69,6 @@ Hacl_Chacha20Poly1305_32_aead_decrypt(uint8_t *k, uint8_t *n1, uint32_t aadlen,
|
||||
uint8_t *aad, uint32_t mlen, uint8_t *m,
|
||||
uint8_t *cipher, uint8_t *mac);
|
||||
|
||||
// Forward declaration from chacha20-ppc64le.S
|
||||
void chacha20vsx(uint32_t len, uint8_t *output, uint8_t *block, uint8_t *k,
|
||||
uint8_t *nonce, uint32_t ctr);
|
||||
|
||||
// Forward declaration from chacha20poly1305-ppc.c
|
||||
extern void
|
||||
Chacha20Poly1305_vsx_aead_encrypt(uint8_t *k, uint8_t *n1, uint32_t aadlen,
|
||||
uint8_t *aad, uint32_t mlen, uint8_t *m,
|
||||
uint8_t *cipher, uint8_t *mac);
|
||||
extern uint32_t
|
||||
Chacha20Poly1305_vsx_aead_decrypt(uint8_t *k, uint8_t *n1, uint32_t aadlen,
|
||||
uint8_t *aad, uint32_t mlen, uint8_t *m,
|
||||
uint8_t *cipher, uint8_t *mac);
|
||||
|
||||
SECStatus
|
||||
ChaCha20_InitContext(ChaCha20Context *ctx, const unsigned char *key,
|
||||
unsigned int keyLen, const unsigned char *nonce,
|
||||
unsigned int nonceLen, PRUint32 ctr)
|
||||
{
|
||||
#ifdef NSS_DISABLE_CHACHAPOLY
|
||||
return SECFailure;
|
||||
#else
|
||||
if (keyLen != 32) {
|
||||
PORT_SetError(SEC_ERROR_BAD_KEY);
|
||||
return SECFailure;
|
||||
}
|
||||
if (nonceLen != 12) {
|
||||
PORT_SetError(SEC_ERROR_INVALID_ARGS);
|
||||
return SECFailure;
|
||||
}
|
||||
|
||||
ctx->counter = ctr;
|
||||
PORT_Memcpy(ctx->key, key, sizeof(ctx->key));
|
||||
PORT_Memcpy(ctx->nonce, nonce, sizeof(ctx->nonce));
|
||||
|
||||
return SECSuccess;
|
||||
#endif
|
||||
}
|
||||
|
||||
ChaCha20Context *
|
||||
ChaCha20_CreateContext(const unsigned char *key, unsigned int keyLen,
|
||||
const unsigned char *nonce, unsigned int nonceLen,
|
||||
PRUint32 ctr)
|
||||
{
|
||||
#ifdef NSS_DISABLE_CHACHAPOLY
|
||||
return NULL;
|
||||
#else
|
||||
ChaCha20Context *ctx;
|
||||
|
||||
ctx = PORT_New(ChaCha20Context);
|
||||
if (ctx == NULL) {
|
||||
return NULL;
|
||||
}
|
||||
|
||||
if (ChaCha20_InitContext(ctx, key, keyLen, nonce, nonceLen, ctr) != SECSuccess) {
|
||||
PORT_Free(ctx);
|
||||
ctx = NULL;
|
||||
}
|
||||
|
||||
return ctx;
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
ChaCha20_DestroyContext(ChaCha20Context *ctx, PRBool freeit)
|
||||
{
|
||||
#ifndef NSS_DISABLE_CHACHAPOLY
|
||||
PORT_Memset(ctx, 0, sizeof(*ctx));
|
||||
if (freeit) {
|
||||
PORT_Free(ctx);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
SECStatus
|
||||
ChaCha20Poly1305_InitContext(ChaCha20Poly1305Context *ctx,
|
||||
const unsigned char *key, unsigned int keyLen,
|
||||
@ -218,11 +144,6 @@ ChaCha20Xor(uint8_t *output, uint8_t *block, uint32_t len, uint8_t *k,
|
||||
}
|
||||
#endif
|
||||
} else
|
||||
#elif defined(__powerpc64__) && defined(__LITTLE_ENDIAN__) && \
|
||||
!defined(NSS_DISABLE_ALTIVEC) && !defined(NSS_DISABLE_CRYPTO_VSX)
|
||||
if (__builtin_cpu_supports("vsx")) {
|
||||
chacha20vsx(len, output, block, k, nonce, ctr);
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
Hacl_Chacha20_chacha20_encrypt(len, output, block, k, nonce, ctr);
|
||||
@ -291,13 +212,6 @@ ChaCha20Poly1305_Seal(const ChaCha20Poly1305Context *ctx, unsigned char *output,
|
||||
}
|
||||
#endif
|
||||
} else
|
||||
#elif defined(__powerpc64__) && defined(__LITTLE_ENDIAN__) && \
|
||||
!defined(NSS_DISABLE_ALTIVEC) && !defined(NSS_DISABLE_CRYPTO_VSX)
|
||||
if (__builtin_cpu_supports("vsx")) {
|
||||
Chacha20Poly1305_vsx_aead_encrypt(
|
||||
(uint8_t *)ctx->key, (uint8_t *)nonce, adLen, (uint8_t *)ad, inputLen,
|
||||
(uint8_t *)input, output, output + inputLen);
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
Hacl_Chacha20Poly1305_32_aead_encrypt(
|
||||
@ -360,13 +274,6 @@ ChaCha20Poly1305_Open(const ChaCha20Poly1305Context *ctx, unsigned char *output,
|
||||
}
|
||||
#endif
|
||||
} else
|
||||
#elif defined(__powerpc64__) && defined(__LITTLE_ENDIAN__) && \
|
||||
!defined(NSS_DISABLE_ALTIVEC) && !defined(NSS_DISABLE_CRYPTO_VSX)
|
||||
if (__builtin_cpu_supports("vsx")) {
|
||||
res = Chacha20Poly1305_vsx_aead_decrypt(
|
||||
(uint8_t *)ctx->key, (uint8_t *)nonce, adLen, (uint8_t *)ad, ciphertextLen,
|
||||
(uint8_t *)output, (uint8_t *)input, (uint8_t *)input + ciphertextLen);
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
res = Hacl_Chacha20Poly1305_32_aead_decrypt(
|
||||
@ -416,13 +323,6 @@ ChaCha20Poly1305_Encrypt(const ChaCha20Poly1305Context *ctx,
|
||||
(uint8_t *)ctx->key, (uint8_t *)nonce, adLen, (uint8_t *)ad, inputLen,
|
||||
(uint8_t *)input, output, outTag);
|
||||
} else
|
||||
#elif defined(__powerpc64__) && defined(__LITTLE_ENDIAN__) && \
|
||||
!defined(NSS_DISABLE_ALTIVEC) && !defined(NSS_DISABLE_CRYPTO_VSX)
|
||||
if (__builtin_cpu_supports("vsx")) {
|
||||
Chacha20Poly1305_vsx_aead_encrypt(
|
||||
(uint8_t *)ctx->key, (uint8_t *)nonce, adLen, (uint8_t *)ad, inputLen,
|
||||
(uint8_t *)input, output, outTag);
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
Hacl_Chacha20Poly1305_32_aead_encrypt(
|
||||
@ -470,13 +370,6 @@ ChaCha20Poly1305_Decrypt(const ChaCha20Poly1305Context *ctx,
|
||||
(uint8_t *)ctx->key, (uint8_t *)nonce, adLen, (uint8_t *)ad, ciphertextLen,
|
||||
(uint8_t *)output, (uint8_t *)input, (uint8_t *)tagIn);
|
||||
} else
|
||||
#elif defined(__powerpc64__) && defined(__LITTLE_ENDIAN__) && \
|
||||
!defined(NSS_DISABLE_ALTIVEC) && !defined(NSS_DISABLE_CRYPTO_VSX)
|
||||
if (__builtin_cpu_supports("vsx")) {
|
||||
res = Chacha20Poly1305_vsx_aead_decrypt(
|
||||
(uint8_t *)ctx->key, (uint8_t *)nonce, adLen, (uint8_t *)ad, ciphertextLen,
|
||||
(uint8_t *)output, (uint8_t *)input, (uint8_t *)tagIn);
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
res = Hacl_Chacha20Poly1305_32_aead_decrypt(
|
||||
|
||||
@ -12,10 +12,4 @@ struct ChaCha20Poly1305ContextStr {
|
||||
unsigned char tagLen;
|
||||
};
|
||||
|
||||
struct ChaCha20ContextStr {
|
||||
unsigned char key[32];
|
||||
unsigned char nonce[12];
|
||||
PRUint32 counter;
|
||||
};
|
||||
|
||||
#endif /* _CHACHA20_POLY1305_H_ */
|
||||
|
||||
@ -324,14 +324,6 @@
|
||||
'FREEBL_NO_DEPEND',
|
||||
],
|
||||
},
|
||||
{
|
||||
'target_name': 'chacha20-ppc_lib',
|
||||
'type': 'static_library',
|
||||
'sources': [
|
||||
'chacha20poly1305-ppc.c',
|
||||
'chacha20-ppc64le.S',
|
||||
]
|
||||
},
|
||||
{
|
||||
'target_name': 'armv8_c_lib',
|
||||
'type': 'static_library',
|
||||
@ -418,7 +410,6 @@
|
||||
'dependencies': [
|
||||
'gcm-aes-ppc_c_lib',
|
||||
'gcm-sha512-ppc_c_lib',
|
||||
'chacha20-ppc_lib',
|
||||
],
|
||||
}],
|
||||
[ 'disable_altivec==1 and (target_arch=="ppc64" or target_arch=="ppc64le")', {
|
||||
|
||||
@ -95,12 +95,6 @@
|
||||
'mpi/mpi_arm.c',
|
||||
],
|
||||
}],
|
||||
[ 'target_arch=="ppc64le"', {
|
||||
'sources': [
|
||||
'chacha20poly1305-ppc.c',
|
||||
'chacha20-ppc64le.S',
|
||||
],
|
||||
}]
|
||||
],
|
||||
}],
|
||||
[ 'OS=="win"', {
|
||||
|
||||
@ -371,14 +371,9 @@ static const struct FREEBLVectorStr vector =
|
||||
AESKeyWrap_DecryptKWP,
|
||||
|
||||
/* End of version 3.023 */
|
||||
KEA_PrimeCheck,
|
||||
KEA_PrimeCheck
|
||||
|
||||
/* End of version 3.024 */
|
||||
ChaCha20_InitContext,
|
||||
ChaCha20_CreateContext,
|
||||
ChaCha20_DestroyContext
|
||||
|
||||
/* End of version 3.025 */
|
||||
};
|
||||
|
||||
const FREEBLVector*
|
||||
|
||||
@ -2158,36 +2158,6 @@ ChaCha20_Xor(unsigned char *output, const unsigned char *block, unsigned int len
|
||||
return (vector->p_ChaCha20_Xor)(output, block, len, k, nonce, ctr);
|
||||
}
|
||||
|
||||
SECStatus
|
||||
ChaCha20_InitContext(ChaCha20Context *ctx, const unsigned char *key,
|
||||
unsigned int keyLen,
|
||||
const unsigned char *nonce,
|
||||
unsigned int nonceLen,
|
||||
PRUint32 ctr)
|
||||
{
|
||||
if (!vector && PR_SUCCESS != freebl_RunLoaderOnce())
|
||||
return SECFailure;
|
||||
return (vector->p_ChaCha20_InitContext)(ctx, key, keyLen, nonce, nonceLen, ctr);
|
||||
}
|
||||
|
||||
ChaCha20Context *
|
||||
ChaCha20_CreateContext(const unsigned char *key, unsigned int keyLen,
|
||||
const unsigned char *nonce, unsigned int nonceLen,
|
||||
PRUint32 ctr)
|
||||
{
|
||||
if (!vector && PR_SUCCESS != freebl_RunLoaderOnce())
|
||||
return NULL;
|
||||
return (vector->p_ChaCha20_CreateContext)(key, keyLen, nonce, nonceLen, ctr);
|
||||
}
|
||||
|
||||
void
|
||||
ChaCha20_DestroyContext(ChaCha20Context *ctx, PRBool freeit)
|
||||
{
|
||||
if (!vector && PR_SUCCESS != freebl_RunLoaderOnce())
|
||||
return;
|
||||
(vector->p_ChaCha20_DestroyContext)(ctx, freeit);
|
||||
}
|
||||
|
||||
SECStatus
|
||||
ChaCha20Poly1305_InitContext(ChaCha20Poly1305Context *ctx,
|
||||
const unsigned char *key, unsigned int keyLen,
|
||||
|
||||
@ -10,7 +10,7 @@
|
||||
|
||||
#include "blapi.h"
|
||||
|
||||
#define FREEBL_VERSION 0x0325
|
||||
#define FREEBL_VERSION 0x0324
|
||||
|
||||
struct FREEBLVectorStr {
|
||||
|
||||
@ -815,23 +815,6 @@ struct FREEBLVectorStr {
|
||||
PRBool (*p_KEA_PrimeCheck)(SECItem *prime);
|
||||
/* Version 3.024 came to here */
|
||||
|
||||
SECStatus (*p_ChaCha20_InitContext)(ChaCha20Context *ctx,
|
||||
const unsigned char *key,
|
||||
unsigned int keyLen,
|
||||
const unsigned char *nonce,
|
||||
unsigned int nonceLen,
|
||||
PRUint32 ctr);
|
||||
|
||||
ChaCha20Context *(*p_ChaCha20_CreateContext)(const unsigned char *key,
|
||||
unsigned int keyLen,
|
||||
const unsigned char *nonce,
|
||||
unsigned int nonceLen,
|
||||
PRUint32 ctr);
|
||||
|
||||
void (*p_ChaCha20_DestroyContext)(ChaCha20Context *ctx, PRBool freeit);
|
||||
|
||||
/* Version 3.025 came to here */
|
||||
|
||||
/* Add new function pointers at the end of this struct and bump
|
||||
* FREEBL_VERSION at the beginning of this file. */
|
||||
};
|
||||
|
||||
@ -22,12 +22,12 @@
|
||||
* The format of the version string should be
|
||||
* "<major version>.<minor version>[.<patch level>[.<build number>]][ <ECC>][ <Beta>]"
|
||||
*/
|
||||
#define NSS_VERSION "3.63" _NSS_CUSTOMIZED " Beta"
|
||||
#define NSS_VERSION "3.63" _NSS_CUSTOMIZED
|
||||
#define NSS_VMAJOR 3
|
||||
#define NSS_VMINOR 63
|
||||
#define NSS_VPATCH 0
|
||||
#define NSS_VBUILD 0
|
||||
#define NSS_BETA PR_TRUE
|
||||
#define NSS_BETA PR_FALSE
|
||||
|
||||
#ifndef RC_INVOKED
|
||||
|
||||
|
||||
@ -17,11 +17,11 @@
|
||||
* The format of the version string should be
|
||||
* "<major version>.<minor version>[.<patch level>[.<build number>]][ <ECC>][ <Beta>]"
|
||||
*/
|
||||
#define SOFTOKEN_VERSION "3.63" SOFTOKEN_ECC_STRING " Beta"
|
||||
#define SOFTOKEN_VERSION "3.63" SOFTOKEN_ECC_STRING
|
||||
#define SOFTOKEN_VMAJOR 3
|
||||
#define SOFTOKEN_VMINOR 63
|
||||
#define SOFTOKEN_VPATCH 0
|
||||
#define SOFTOKEN_VBUILD 0
|
||||
#define SOFTOKEN_BETA PR_TRUE
|
||||
#define SOFTOKEN_BETA PR_FALSE
|
||||
|
||||
#endif /* _SOFTKVER_H_ */
|
||||
|
||||
@ -19,12 +19,12 @@
|
||||
* The format of the version string should be
|
||||
* "<major version>.<minor version>[.<patch level>[.<build number>]][ <Beta>]"
|
||||
*/
|
||||
#define NSSUTIL_VERSION "3.63 Beta"
|
||||
#define NSSUTIL_VERSION "3.63"
|
||||
#define NSSUTIL_VMAJOR 3
|
||||
#define NSSUTIL_VMINOR 63
|
||||
#define NSSUTIL_VPATCH 0
|
||||
#define NSSUTIL_VBUILD 0
|
||||
#define NSSUTIL_BETA PR_TRUE
|
||||
#define NSSUTIL_BETA PR_FALSE
|
||||
|
||||
SEC_BEGIN_PROTOS
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user