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call underrunProtect more aggressively, and remove some LD32_nochks that weren't being protected
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@ -541,6 +541,8 @@ Assembler::asm_store64(LInsp value, int dr, LInsp base)
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if (value->isconstq()) {
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const int32_t* p = (const int32_t*) (value-2);
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underrunProtect(LD32_size*2 + 8);
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// XXX use another reg, get rid of dependency
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STR(IP, rb, dr);
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LD32_nochk(IP, p[0]);
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@ -574,8 +576,7 @@ Assembler::asm_store64(LInsp value, int dr, LInsp base)
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if (value->isconstq()) {
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const int32_t* p = (const int32_t*) (value-2);
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underrunProtect(12);
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underrunProtect(4*4);
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asm_quad_nochk(rv, p);
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}
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} else {
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@ -626,34 +627,19 @@ Assembler::asm_quad(LInsp ins)
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freeRsrcOf(ins, false);
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if (AvmCore::config.vfp) {
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if (rr == UnknownReg) {
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underrunProtect(LD32_size * 2 + 8);
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if (AvmCore::config.vfp &&
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rr != UnknownReg)
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{
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if (d)
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FSTD(rr, FP, d);
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// asm_mmq might spill a reg, so don't call it;
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// instead do the equivalent directly.
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//asm_mmq(FP, d, PC, -16);
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// XXX use another reg, get rid of dependency
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STR(IP, FP, d);
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LD32_nochk(IP, p[0]);
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STR(IP, FP, d+4);
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LD32_nochk(IP, p[1]);
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} else {
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if (d)
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FSTD(rr, FP, d);
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underrunProtect(16);
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asm_quad_nochk(rr, p);
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}
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underrunProtect(4*4);
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asm_quad_nochk(rr, p);
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} else {
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if (d) {
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underrunProtect(LD32_size * 2 + 8);
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STR(IP, FP, d+4);
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LD32_nochk(IP, p[1]);
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STR(IP, FP, d);
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LD32_nochk(IP, p[0]);
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}
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STR(IP, FP, d+4);
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asm_ld_imm(IP, p[1]);
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STR(IP, FP, d);
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asm_ld_imm(IP, p[0]);
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}
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//asm_output("<<< asm_quad");
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@ -763,6 +749,9 @@ Assembler::nativePageSetup()
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}
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}
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// Note: underrunProtect should not touch any registers, even IP; it
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// might need to allocate a new page in the middle of an IP-using
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// sequence.
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void
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Assembler::underrunProtect(int bytes)
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{
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@ -944,12 +933,17 @@ Assembler::B_cond_chk(ConditionCode _c, NIns* _t, bool _chk)
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{
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int32_t offs = PC_OFFSET_FROM(_t,_nIns-1);
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//fprintf(stderr, "B_cond_chk target: 0x%08x offset: %d @0x%08x\n", _t, offs, _nIns-1);
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// optimistically check if this will fit in 24 bits
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if (isS24(offs>>2)) {
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if (_chk) underrunProtect(4);
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// recalculate the offset, because underrunProtect may have
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// moved _nIns to a new page
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offs = PC_OFFSET_FROM(_t,_nIns-1);
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}
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if (isS24(offs>>2)) {
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// the underrunProtect for this was done above
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*(--_nIns) = (NIns)( ((_c)<<28) | (0xA<<24) | (((offs)>>2) & 0xFFFFFF) );
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} else if (_c == AL) {
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if(_chk) underrunProtect(8);
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@ -1004,7 +998,7 @@ Assembler::asm_add_imm(Register rd, Register rn, int32_t imm, int stat)
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// make sure someone isn't trying to use IP as an operand
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NanoAssert(rn != IP);
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ALUr(AL, add, stat, rd, rn, IP);
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LD32_nochk(IP, imm);
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asm_ld_imm(IP, imm);
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}
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}
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@ -1027,7 +1021,7 @@ Assembler::asm_sub_imm(Register rd, Register rn, int32_t imm, int stat)
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/* more than 510 */
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NanoAssert(rn != IP);
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ALUr(AL, sub, stat, rd, rn, IP);
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LD32_nochk(IP, imm);
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asm_ld_imm(IP, imm);
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}
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} else {
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if (imm >= -510) {
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@ -1039,7 +1033,7 @@ Assembler::asm_sub_imm(Register rd, Register rn, int32_t imm, int stat)
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/* less than -510 */
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NanoAssert(rn != IP);
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ALUr(AL, add, stat, rd, rn, IP);
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LD32_nochk(IP, -imm);
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asm_ld_imm(IP, -imm);
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}
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}
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}
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@ -1283,17 +1277,15 @@ Assembler::asm_cmpi(Register r, int32_t imm)
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if (imm > -256) {
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ALUi(AL, cmn, 1, 0, r, -imm);
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} else {
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underrunProtect(4 + LD32_size);
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CMP(r, IP);
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LD32_nochk(IP, imm);
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asm_ld_imm(IP, imm);
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}
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} else {
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if (imm < 256) {
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ALUi(AL, cmp, 1, 0, r, imm);
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} else {
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underrunProtect(4 + LD32_size);
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CMP(r, IP);
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LD32_nochk(IP, imm);
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asm_ld_imm(IP, imm);
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}
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}
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}
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@ -1705,9 +1697,8 @@ Assembler::asm_arm_farg(LInsp arg, Register rlo, Register rhi)
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// LIR_quad
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const int32_t* p = (const int32_t*) (arg-2);
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underrunProtect(LD32_size * 2 + 8);
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LD32_nochk(rhi, p[1]);
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LD32_nochk(rlo, p[0]);
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asm_ld_imm(rhi, p[1]);
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asm_ld_imm(rlo, p[0]);
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}
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} else if (rlo != UnknownReg && rhi == UnknownReg) {
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if (arg->opcode() == LIR_qjoin) {
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@ -1724,10 +1715,9 @@ Assembler::asm_arm_farg(LInsp arg, Register rlo, Register rhi)
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// LIR_quad
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const int32_t* p = (const int32_t*) (arg-2);
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underrunProtect(LD32_size * 2 + 8);
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STR_preindex(IP, SP, -4);
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LD32_nochk(IP, p[1]);
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LD32_nochk(rlo, p[0]);
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asm_ld_imm(IP, p[1]);
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asm_ld_imm(rlo, p[0]);
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}
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} else {
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asm_pusharg(arg);
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