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Bug 525293 - Cumulative remainder of changes from tamarin, r=dvander.

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This commit is contained in:
Graydon Hoare 2009-10-29 12:29:28 -07:00
parent bc3cdfee08
commit a82b30f40e
4 changed files with 44 additions and 3 deletions
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8
js/src/nanojit/Assembler.cpp Normal file → Executable file
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@ -1412,9 +1412,11 @@ namespace nanojit
LIns *i = p->head;
NanoAssert(i->isop(LIR_live) || i->isop(LIR_flive));
LIns *op1 = i->oprnd1();
if (op1->isconst() || op1->isconstf() || op1->isconstq())
findMemFor(op1);
else
// must findMemFor even if we're going to findRegFor; loop-carried
// operands may spill on another edge, and we need them to always
// spill to the same place.
findMemFor(op1);
if (! (op1->isconst() || op1->isconstf() || op1->isconstq()))
findRegFor(op1, i->isop(LIR_flive) ? FpRegs : GpRegs);
}

12
js/src/nanojit/CodeAlloc.cpp
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@ -260,8 +260,20 @@ extern "C" void __clear_cache(char *BEG, char *END);
#endif
#ifdef AVMPLUS_SPARC
#ifdef __linux__ // bugzilla 502369
void sync_instruction_memory(caddr_t v, u_int len)
{
caddr_t end = v + len;
caddr_t p = v;
while (p < end) {
asm("flush %0" : : "r" (p));
p += 32;
}
}
#else
extern "C" void sync_instruction_memory(caddr_t v, u_int len);
#endif
#endif
#if defined NANOJIT_IA32 || defined NANOJIT_X64
// intel chips have dcache/icache interlock

9
js/src/nanojit/Nativei386.cpp
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@ -1416,6 +1416,15 @@ namespace nanojit
SSE_STQ(stkd, SP, r);
} else {
FSTPQ(stkd, SP);
//
// 22Jul09 rickr - Enabling the evict causes a 10% slowdown on primes
//
// evict() triggers a very expensive fstpq/fldq pair around the store.
// We need to resolve the bug some other way.
//
// see https://bugzilla.mozilla.org/show_bug.cgi?id=491084
/* It's possible that the same LIns* with r=FST0 will appear in the argument list more
* than once. In this case FST0 will not have been evicted and the multiple pop
* actions will unbalance the FPU stack. A quick fix is to always evict FST0 manually.

18
js/src/nanojit/nanojit.h
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@ -70,6 +70,24 @@
#define UNLESS_64BIT(...) __VA_ARGS__
#endif
// set ARM_VFP constant if not already set
#if !defined(ARM_VFP)
#if defined(AVMPLUS_ARM)
#if defined(NJ_ARM_VFP)
#define ARM_VFP 1
#define NJ_SOFTFLOAT 0
#else
#define ARM_VFP 0
#define NJ_SOFTFLOAT 1
#endif
#else
// some LIR features should test VFP on ARM,
// but can be set to "always on" on non-ARM
#define ARM_VFP 1
#define ARM_SOFTFLOAT 1
#endif
#endif
// Embed no-op macros that let Valgrind work with the JIT.
#ifdef MOZ_VALGRIND
# define JS_VALGRIND