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b=479525; fix nanojit on Windows CE (calling conventions, disable regexp double-char optimization); r=dmandelin
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@ -2224,6 +2224,15 @@ class RegExpNativeCompiler {
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return pos;
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}
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#ifdef AVMPLUS_ARM
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/* We can't do this on ARM, since it relies on doing a 32-bit load from
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* a pointer which is only 2-byte aligned.
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*/
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#undef USE_DOUBLE_CHAR_MATCH
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#else
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#define USE_DOUBLE_CHAR_MATCH
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#endif
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JSBool compileNode(RENode* node, LIns* pos, LInsList& fails)
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{
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for (; node; node = node->next) {
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@ -2235,6 +2244,7 @@ class RegExpNativeCompiler {
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pos = compileEmpty(node, pos, fails);
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break;
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case REOP_FLAT:
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#ifdef USE_DOUBLE_CHAR_MATCH
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if (node->u.flat.length == 1) {
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if (node->next && node->next->op == REOP_FLAT &&
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node->next->u.flat.length == 1) {
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@ -2258,6 +2268,14 @@ class RegExpNativeCompiler {
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if (pos && i == node->u.flat.length - 1)
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pos = compileFlatSingleChar(((jschar*) node->kid)[i], pos, fails);
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}
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#else
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for (size_t i = 0; i < node->u.flat.length; i++) {
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if (fragment->lirbuf->outOMem())
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return JS_FALSE;
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pos = compileFlatSingleChar(((jschar*) node->kid)[i], pos, fails);
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if (!pos) break;
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}
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#endif
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break;
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case REOP_ALT:
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case REOP_ALTPREREQ:
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@ -178,6 +178,19 @@ Assembler::genEpilogue()
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return _nIns;
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}
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/* ARM EABI (used by gcc/linux) calling conventions differ from Windows CE; use these
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* as the default.
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*
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* - double arg following an initial dword arg use r0 for the int arg
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* and r2/r3 for the double; r1 is skipped
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* - 3 dword args followed by a double arg cause r3 to be skipped,
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* and the double to be stuck on the stack.
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*
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* Under Windows CE, the arguments are placed in r0-r3 and then the stack,
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* one dword at a time, with the high order dword of a quad/double coming
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* first. No registers are skipped as they are in the EABI case.
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*/
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void
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Assembler::asm_call(LInsp ins)
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{
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@ -193,11 +206,12 @@ Assembler::asm_call(LInsp ins)
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#endif
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atypes >>= 2;
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bool arg0IsInt32FollowedByFloat = false;
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#ifndef UNDER_CE
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// we need to detect if we have arg0 as LO followed by arg1 as F;
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// in that case, we need to skip using r1 -- the F needs to be
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// loaded in r2/r3, at least according to the ARM EABI and gcc 4.2's
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// generated code.
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bool arg0IsInt32FollowedByFloat = false;
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while ((atypes & 3) != ARGSIZE_NONE) {
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if (((atypes >> 2) & 3) == ARGSIZE_LO &&
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((atypes >> 0) & 3) == ARGSIZE_F &&
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@ -208,6 +222,7 @@ Assembler::asm_call(LInsp ins)
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}
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atypes >>= 2;
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}
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#endif
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#ifdef NJ_ARM_VFP
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if (rsize == ARGSIZE_F) {
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@ -244,6 +259,21 @@ Assembler::asm_call(LInsp ins)
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Register r = (i + roffset) < 4 ? argRegs[i+roffset] : UnknownReg;
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#ifdef NJ_ARM_VFP
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if (sz == ARGSIZE_F) {
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#ifdef UNDER_CE
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if (r >= R0 && r <= R2) {
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// we can use up r0/r1, r1/r2, r2/r3 without anything special
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roffset++;
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FMRRD(r, nextreg(r), sr);
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} else if (r == R3) {
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// to use R3 gets complicated; we need to move the high dword
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// into R3, and the low dword on the stack.
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STR_preindex(Scratch, SP, -4);
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FMRDL(Scratch, sr);
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FMRDH(r, sr);
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} else {
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asm_pusharg(arg);
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}
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#else
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if (r == R0 || r == R2) {
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roffset++;
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} else if (r == R1) {
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@ -263,6 +293,7 @@ Assembler::asm_call(LInsp ins)
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} else {
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asm_pusharg(arg);
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}
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#endif
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} else {
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asm_arg(sz, arg, r);
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}
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@ -271,6 +302,7 @@ Assembler::asm_call(LInsp ins)
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asm_arg(sz, arg, r);
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#endif
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// Under CE, arg0IsInt32FollowedByFloat will always be false
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if (i == 0 && arg0IsInt32FollowedByFloat)
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roffset = 1;
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}
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@ -1373,14 +1405,24 @@ Assembler::asm_ld(LInsp ins)
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Register rr = prepResultReg(ins, GpRegs);
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int d = disp->constval();
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Register ra = getBaseReg(base, d, GpRegs);
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if (op == LIR_ld || op == LIR_ldc)
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// these will always be 4-byte aligned
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if (op == LIR_ld || op == LIR_ldc) {
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LD(rr, d, ra);
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else if (op == LIR_ldcb)
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LDRB(rr, d, ra);
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else if (op == LIR_ldcs)
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return;
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}
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// these will be 2 or 4-byte aligned
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if (op == LIR_ldcs) {
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LDRH(rr, d, ra);
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else
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NanoAssertMsg(0, "Unsupported instruction in asm_ld");
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}
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// aaand this is just any byte.
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if (op == LIR_ldcb) {
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LDRB(rr, d, ra);
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}
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NanoAssertMsg(0, "Unsupported instruction in asm_ld");
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}
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void
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@ -793,6 +793,13 @@ typedef enum {
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asm_output("fmrrd %s,%s,%s", gpn(_Rd), gpn(_Rn), gpn(_Dm)); \
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} while (0)
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#define FMRDH(_Rd,_Dn) do { \
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underrunProtect(4); \
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NanoAssert(IsGpReg(_Rd) && IsFpReg(_Dm)); \
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*(--_nIns) = (NIns)( COND_AL | (0xE3<<20) | (FpRegNum(_Dn)<<16) | ((_Rd)<<12) | (0xB<<8) | (1<<4) ); \
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asm_output("fmrdh %s,%s", gpn(_Rd), gpn(_Dn)); \
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} while (0)
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#define FSTD(_Dd,_Rn,_offs) do { \
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underrunProtect(4); \
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NanoAssert((((_offs) & 3) == 0) && isS8((_offs) >> 2)); \
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@ -2705,8 +2705,5 @@ pref("network.tcp.sendbuffer", 131072);
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#endif
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#ifdef WINCE
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// Note that this overwrites an option set earlier, until
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// we can fix the jit on CE.
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pref("javascript.options.jit.content", false);
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pref("mozilla.widget.disable-native-theme", true);
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#endif
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