Bug 1516720 - Make an overbroad assertion narrower. r=jseward

We use a cmpxchg loop on x86 / x64 systems to implement bitwise
read-modify-write atomic operations.  This means that we can use
word-width operations even when we're operating on sub-wordsize data,
so there's no reason to force the RMW operand into a byte-wide
register - only the registers used for the memory access need be
special on x86, since memory accesses must still be word-wide.

Thus the assertion that asserts that the value must be in a byte
register applies only to ADD and SUB (since they use XADD and require
a byte register).

--HG--
extra : rebase_source : 087c2c9d369e1e488915d817d89b8961041d7620
This commit is contained in:
Lars T Hansen 2019-01-02 11:01:27 +01:00
parent a00401d6f8
commit cf02f0c73f

View File

@ -1174,11 +1174,11 @@ static void AtomicFetchOp(MacroAssembler& masm,
switch (Scalar::byteSize(arrayType)) {
case 1:
CheckBytereg(value);
CheckBytereg(output);
switch (op) {
case AtomicFetchAddOp:
case AtomicFetchSubOp:
CheckBytereg(value); // But not for the bitwise ops
SetupValue(masm, op, value, output);
if (access) masm.append(*access, masm.size());
masm.lock_xaddb(output, Operand(mem));