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Bug 1341650: A few drive-by nits fixing in WasmBaselineCompile.cpp; r=lth

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MozReview-Commit-ID: 9SpdNG8sL9y

--HG--
extra : rebase_source : 090ffd90a120ffd7211862bbd31f2b7d85d874dc
This commit is contained in:
Benjamin Bouvier 2017-02-22 18:37:49 +01:00
parent 7316b0a5c0
commit fafada56ef
2 changed files with 27 additions and 25 deletions
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2
js/src/jit/MacroAssembler.cpp
View File

@ -2807,7 +2807,7 @@ MacroAssembler::wasmCallBuiltinInstanceMethod(const ABIArg& instanceArg,
if (instanceArg.kind() == ABIArg::GPR) {
loadPtr(Address(WasmTlsReg, offsetof(wasm::TlsData, instance)), instanceArg.gpr());
} else if (instanceArg.kind() == ABIArg::Stack) {
// Safe to use ABINonArgReg0 since its the last thing before the call
// Safe to use ABINonArgReg0 since it's the last thing before the call.
Register scratch = ABINonArgReg0;
loadPtr(Address(WasmTlsReg, offsetof(wasm::TlsData, instance)), scratch);
storePtr(scratch, Address(getStackPointer(), instanceArg.offsetFromArgBase()));

50
js/src/wasm/WasmBaselineCompile.cpp
View File

@ -2046,31 +2046,31 @@ class BaseCompiler
AllocatableGeneralRegisterSet knownGPR_ = availGPR_;
AllocatableFloatRegisterSet knownFPU_ = availFPU_;
for (size_t i = 0 ; i < stk_.length() ; i++) {
Stk& item = stk_[i];
switch (item.kind_) {
case Stk::RegisterI32:
knownGPR_.add(item.i32reg());
break;
case Stk::RegisterI64:
Stk& item = stk_[i];
switch (item.kind_) {
case Stk::RegisterI32:
knownGPR_.add(item.i32reg());
break;
case Stk::RegisterI64:
#ifdef JS_PUNBOX64
knownGPR_.add(item.i64reg().reg);
knownGPR_.add(item.i64reg().reg);
#else
knownGPR_.add(item.i64reg().high);
knownGPR_.add(item.i64reg().low);
knownGPR_.add(item.i64reg().high);
knownGPR_.add(item.i64reg().low);
#endif
break;
case Stk::RegisterF32:
knownFPU_.add(item.f32reg());
break;
case Stk::RegisterF64:
knownFPU_.add(item.f64reg());
break;
default:
break;
}
}
MOZ_ASSERT(knownGPR_.bits() == allGPR_.bits());
MOZ_ASSERT(knownFPU_.bits() == allFPU_.bits());
break;
case Stk::RegisterF32:
knownFPU_.add(item.f32reg());
break;
case Stk::RegisterF64:
knownFPU_.add(item.f64reg());
break;
default:
break;
}
}
MOZ_ASSERT(knownGPR_.bits() == allGPR_.bits());
MOZ_ASSERT(knownFPU_.bits() == allFPU_.bits());
}
#endif
@ -2908,7 +2908,8 @@ class BaseCompiler
// movl clears the high bits if the two registers are the same.
masm.movl(src.reg, dest);
#elif defined(JS_NUNBOX32)
masm.move32(src.low, dest);
if (src.low != dest)
masm.move32(src.low, dest);
#else
MOZ_CRASH("BaseCompiler platform hook: wrapI64ToI32");
#endif
@ -2947,7 +2948,8 @@ class BaseCompiler
#if defined(JS_CODEGEN_X64)
masm.movl(src, dest.reg);
#elif defined(JS_NUNBOX32)
masm.move32(src, dest.low);
if (src != dest.low)
masm.move32(src, dest.low);
masm.move32(Imm32(0), dest.high);
#else
MOZ_CRASH("BaseCompiler platform hook: extendU32ToI64");