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3cc53df2c0
WASI lacks of the <atomic> support yet, so this patch is adding stub implementation of atomics for WASI. Differential Revision: https://phabricator.services.mozilla.com/D110215
522 lines
19 KiB
C++
522 lines
19 KiB
C++
/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- */
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/* vim: set ts=8 sts=2 et sw=2 tw=80: */
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/* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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/*
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* Implements (almost always) lock-free atomic operations. The operations here
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* are a subset of that which can be found in C++11's <atomic> header, with a
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* different API to enforce consistent memory ordering constraints.
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*
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* Anyone caught using |volatile| for inter-thread memory safety needs to be
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* sent a copy of this header and the C++11 standard.
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*/
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#ifndef mozilla_Atomics_h
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#define mozilla_Atomics_h
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#include "mozilla/Assertions.h"
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#include "mozilla/Attributes.h"
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#include "mozilla/Compiler.h"
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#ifdef __wasi__
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# include "mozilla/WasiAtomic.h"
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#else
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# include <atomic>
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#endif // __wasi__
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#include <stdint.h>
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#include <type_traits>
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namespace mozilla {
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/**
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* An enum of memory ordering possibilities for atomics.
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*
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* Memory ordering is the observable state of distinct values in memory.
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* (It's a separate concept from atomicity, which concerns whether an
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* operation can ever be observed in an intermediate state. Don't
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* conflate the two!) Given a sequence of operations in source code on
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* memory, it is *not* always the case that, at all times and on all
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* cores, those operations will appear to have occurred in that exact
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* sequence. First, the compiler might reorder that sequence, if it
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* thinks another ordering will be more efficient. Second, the CPU may
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* not expose so consistent a view of memory. CPUs will often perform
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* their own instruction reordering, above and beyond that performed by
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* the compiler. And each core has its own memory caches, and accesses
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* (reads and writes both) to "memory" may only resolve to out-of-date
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* cache entries -- not to the "most recently" performed operation in
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* some global sense. Any access to a value that may be used by
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* multiple threads, potentially across multiple cores, must therefore
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* have a memory ordering imposed on it, for all code on all
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* threads/cores to have a sufficiently coherent worldview.
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*
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* http://gcc.gnu.org/wiki/Atomic/GCCMM/AtomicSync and
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* http://en.cppreference.com/w/cpp/atomic/memory_order go into more
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* detail on all this, including examples of how each mode works.
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*
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* Note that for simplicity and practicality, not all of the modes in
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* C++11 are supported. The missing C++11 modes are either subsumed by
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* the modes we provide below, or not relevant for the CPUs we support
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* in Gecko. These three modes are confusing enough as it is!
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*/
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enum MemoryOrdering {
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/*
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* Relaxed ordering is the simplest memory ordering: none at all.
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* When the result of a write is observed, nothing may be inferred
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* about other memory. Writes ostensibly performed "before" on the
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* writing thread may not yet be visible. Writes performed "after" on
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* the writing thread may already be visible, if the compiler or CPU
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* reordered them. (The latter can happen if reads and/or writes get
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* held up in per-processor caches.) Relaxed ordering means
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* operations can always use cached values (as long as the actual
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* updates to atomic values actually occur, correctly, eventually), so
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* it's usually the fastest sort of atomic access. For this reason,
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* *it's also the most dangerous kind of access*.
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*
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* Relaxed ordering is good for things like process-wide statistics
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* counters that don't need to be consistent with anything else, so
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* long as updates themselves are atomic. (And so long as any
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* observations of that value can tolerate being out-of-date -- if you
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* need some sort of up-to-date value, you need some sort of other
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* synchronizing operation.) It's *not* good for locks, mutexes,
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* reference counts, etc. that mediate access to other memory, or must
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* be observably consistent with other memory.
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*
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* x86 architectures don't take advantage of the optimization
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* opportunities that relaxed ordering permits. Thus it's possible
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* that using relaxed ordering will "work" on x86 but fail elsewhere
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* (ARM, say, which *does* implement non-sequentially-consistent
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* relaxed ordering semantics). Be extra-careful using relaxed
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* ordering if you can't easily test non-x86 architectures!
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*/
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Relaxed,
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/*
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* When an atomic value is updated with ReleaseAcquire ordering, and
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* that new value is observed with ReleaseAcquire ordering, prior
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* writes (atomic or not) are also observable. What ReleaseAcquire
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* *doesn't* give you is any observable ordering guarantees for
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* ReleaseAcquire-ordered operations on different objects. For
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* example, if there are two cores that each perform ReleaseAcquire
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* operations on separate objects, each core may or may not observe
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* the operations made by the other core. The only way the cores can
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* be synchronized with ReleaseAcquire is if they both
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* ReleaseAcquire-access the same object. This implies that you can't
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* necessarily describe some global total ordering of ReleaseAcquire
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* operations.
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*
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* ReleaseAcquire ordering is good for (as the name implies) atomic
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* operations on values controlling ownership of things: reference
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* counts, mutexes, and the like. However, if you are thinking about
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* using these to implement your own locks or mutexes, you should take
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* a good, hard look at actual lock or mutex primitives first.
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*/
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ReleaseAcquire,
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/*
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* When an atomic value is updated with SequentiallyConsistent
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* ordering, all writes observable when the update is observed, just
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* as with ReleaseAcquire ordering. But, furthermore, a global total
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* ordering of SequentiallyConsistent operations *can* be described.
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* For example, if two cores perform SequentiallyConsistent operations
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* on separate objects, one core will observably perform its update
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* (and all previous operations will have completed), then the other
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* core will observably perform its update (and all previous
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* operations will have completed). (Although those previous
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* operations aren't themselves ordered -- they could be intermixed,
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* or ordered if they occur on atomic values with ordering
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* requirements.) SequentiallyConsistent is the *simplest and safest*
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* ordering of atomic operations -- it's always as if one operation
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* happens, then another, then another, in some order -- and every
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* core observes updates to happen in that single order. Because it
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* has the most synchronization requirements, operations ordered this
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* way also tend to be slowest.
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*
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* SequentiallyConsistent ordering can be desirable when multiple
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* threads observe objects, and they all have to agree on the
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* observable order of changes to them. People expect
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* SequentiallyConsistent ordering, even if they shouldn't, when
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* writing code, atomic or otherwise. SequentiallyConsistent is also
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* the ordering of choice when designing lockless data structures. If
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* you don't know what order to use, use this one.
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*/
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SequentiallyConsistent,
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};
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namespace detail {
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/*
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* We provide CompareExchangeFailureOrder to work around a bug in some
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* versions of GCC's <atomic> header. See bug 898491.
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*/
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template <MemoryOrdering Order>
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struct AtomicOrderConstraints;
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template <>
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struct AtomicOrderConstraints<Relaxed> {
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static const std::memory_order AtomicRMWOrder = std::memory_order_relaxed;
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static const std::memory_order LoadOrder = std::memory_order_relaxed;
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static const std::memory_order StoreOrder = std::memory_order_relaxed;
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static const std::memory_order CompareExchangeFailureOrder =
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std::memory_order_relaxed;
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};
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template <>
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struct AtomicOrderConstraints<ReleaseAcquire> {
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static const std::memory_order AtomicRMWOrder = std::memory_order_acq_rel;
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static const std::memory_order LoadOrder = std::memory_order_acquire;
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static const std::memory_order StoreOrder = std::memory_order_release;
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static const std::memory_order CompareExchangeFailureOrder =
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std::memory_order_acquire;
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};
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template <>
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struct AtomicOrderConstraints<SequentiallyConsistent> {
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static const std::memory_order AtomicRMWOrder = std::memory_order_seq_cst;
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static const std::memory_order LoadOrder = std::memory_order_seq_cst;
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static const std::memory_order StoreOrder = std::memory_order_seq_cst;
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static const std::memory_order CompareExchangeFailureOrder =
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std::memory_order_seq_cst;
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};
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template <typename T, MemoryOrdering Order>
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struct IntrinsicBase {
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typedef std::atomic<T> ValueType;
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typedef AtomicOrderConstraints<Order> OrderedOp;
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};
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template <typename T, MemoryOrdering Order>
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struct IntrinsicMemoryOps : public IntrinsicBase<T, Order> {
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typedef IntrinsicBase<T, Order> Base;
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static T load(const typename Base::ValueType& aPtr) {
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return aPtr.load(Base::OrderedOp::LoadOrder);
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}
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static void store(typename Base::ValueType& aPtr, T aVal) {
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aPtr.store(aVal, Base::OrderedOp::StoreOrder);
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}
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static T exchange(typename Base::ValueType& aPtr, T aVal) {
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return aPtr.exchange(aVal, Base::OrderedOp::AtomicRMWOrder);
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}
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static bool compareExchange(typename Base::ValueType& aPtr, T aOldVal,
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T aNewVal) {
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return aPtr.compare_exchange_strong(
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aOldVal, aNewVal, Base::OrderedOp::AtomicRMWOrder,
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Base::OrderedOp::CompareExchangeFailureOrder);
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}
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};
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template <typename T, MemoryOrdering Order>
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struct IntrinsicAddSub : public IntrinsicBase<T, Order> {
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typedef IntrinsicBase<T, Order> Base;
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static T add(typename Base::ValueType& aPtr, T aVal) {
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return aPtr.fetch_add(aVal, Base::OrderedOp::AtomicRMWOrder);
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}
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static T sub(typename Base::ValueType& aPtr, T aVal) {
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return aPtr.fetch_sub(aVal, Base::OrderedOp::AtomicRMWOrder);
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}
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};
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template <typename T, MemoryOrdering Order>
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struct IntrinsicAddSub<T*, Order> : public IntrinsicBase<T*, Order> {
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typedef IntrinsicBase<T*, Order> Base;
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static T* add(typename Base::ValueType& aPtr, ptrdiff_t aVal) {
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return aPtr.fetch_add(aVal, Base::OrderedOp::AtomicRMWOrder);
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}
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static T* sub(typename Base::ValueType& aPtr, ptrdiff_t aVal) {
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return aPtr.fetch_sub(aVal, Base::OrderedOp::AtomicRMWOrder);
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}
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};
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template <typename T, MemoryOrdering Order>
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struct IntrinsicIncDec : public IntrinsicAddSub<T, Order> {
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typedef IntrinsicBase<T, Order> Base;
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static T inc(typename Base::ValueType& aPtr) {
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return IntrinsicAddSub<T, Order>::add(aPtr, 1);
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}
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static T dec(typename Base::ValueType& aPtr) {
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return IntrinsicAddSub<T, Order>::sub(aPtr, 1);
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}
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};
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template <typename T, MemoryOrdering Order>
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struct AtomicIntrinsics : public IntrinsicMemoryOps<T, Order>,
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public IntrinsicIncDec<T, Order> {
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typedef IntrinsicBase<T, Order> Base;
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static T or_(typename Base::ValueType& aPtr, T aVal) {
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return aPtr.fetch_or(aVal, Base::OrderedOp::AtomicRMWOrder);
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}
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static T xor_(typename Base::ValueType& aPtr, T aVal) {
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return aPtr.fetch_xor(aVal, Base::OrderedOp::AtomicRMWOrder);
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}
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static T and_(typename Base::ValueType& aPtr, T aVal) {
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return aPtr.fetch_and(aVal, Base::OrderedOp::AtomicRMWOrder);
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}
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};
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template <typename T, MemoryOrdering Order>
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struct AtomicIntrinsics<T*, Order> : public IntrinsicMemoryOps<T*, Order>,
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public IntrinsicIncDec<T*, Order> {};
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template <typename T>
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struct ToStorageTypeArgument {
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static constexpr T convert(T aT) { return aT; }
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};
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template <typename T, MemoryOrdering Order>
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class AtomicBase {
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static_assert(sizeof(T) == 4 || sizeof(T) == 8,
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"mozilla/Atomics.h only supports 32-bit and 64-bit types");
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protected:
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typedef typename detail::AtomicIntrinsics<T, Order> Intrinsics;
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typedef typename Intrinsics::ValueType ValueType;
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ValueType mValue;
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public:
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constexpr AtomicBase() : mValue() {}
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explicit constexpr AtomicBase(T aInit)
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: mValue(ToStorageTypeArgument<T>::convert(aInit)) {}
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// Note: we can't provide operator T() here because Atomic<bool> inherits
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// from AtomcBase with T=uint32_t and not T=bool. If we implemented
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// operator T() here, it would cause errors when comparing Atomic<bool> with
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// a regular bool.
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T operator=(T aVal) {
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Intrinsics::store(mValue, aVal);
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return aVal;
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}
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/**
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* Performs an atomic swap operation. aVal is stored and the previous
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* value of this variable is returned.
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*/
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T exchange(T aVal) { return Intrinsics::exchange(mValue, aVal); }
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/**
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* Performs an atomic compare-and-swap operation and returns true if it
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* succeeded. This is equivalent to atomically doing
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*
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* if (mValue == aOldValue) {
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* mValue = aNewValue;
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* return true;
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* } else {
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* return false;
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* }
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*/
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bool compareExchange(T aOldValue, T aNewValue) {
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return Intrinsics::compareExchange(mValue, aOldValue, aNewValue);
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}
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private:
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AtomicBase(const AtomicBase& aCopy) = delete;
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};
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template <typename T, MemoryOrdering Order>
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class AtomicBaseIncDec : public AtomicBase<T, Order> {
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typedef typename detail::AtomicBase<T, Order> Base;
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public:
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constexpr AtomicBaseIncDec() : Base() {}
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explicit constexpr AtomicBaseIncDec(T aInit) : Base(aInit) {}
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using Base::operator=;
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operator T() const { return Base::Intrinsics::load(Base::mValue); }
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T operator++(int) { return Base::Intrinsics::inc(Base::mValue); }
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T operator--(int) { return Base::Intrinsics::dec(Base::mValue); }
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T operator++() { return Base::Intrinsics::inc(Base::mValue) + 1; }
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T operator--() { return Base::Intrinsics::dec(Base::mValue) - 1; }
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private:
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AtomicBaseIncDec(const AtomicBaseIncDec& aCopy) = delete;
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};
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} // namespace detail
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/**
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* A wrapper for a type that enforces that all memory accesses are atomic.
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*
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* In general, where a variable |T foo| exists, |Atomic<T> foo| can be used in
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* its place. Implementations for integral and pointer types are provided
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* below.
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*
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* Atomic accesses are sequentially consistent by default. You should
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* use the default unless you are tall enough to ride the
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* memory-ordering roller coaster (if you're not sure, you aren't) and
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* you have a compelling reason to do otherwise.
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*
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* There is one exception to the case of atomic memory accesses: providing an
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* initial value of the atomic value is not guaranteed to be atomic. This is a
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* deliberate design choice that enables static atomic variables to be declared
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* without introducing extra static constructors.
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*/
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template <typename T, MemoryOrdering Order = SequentiallyConsistent,
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typename Enable = void>
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class Atomic;
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/**
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* Atomic<T> implementation for integral types.
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*
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* In addition to atomic store and load operations, compound assignment and
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* increment/decrement operators are implemented which perform the
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* corresponding read-modify-write operation atomically. Finally, an atomic
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* swap method is provided.
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*/
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template <typename T, MemoryOrdering Order>
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class Atomic<
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T, Order,
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std::enable_if_t<std::is_integral_v<T> && !std::is_same_v<T, bool>>>
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: public detail::AtomicBaseIncDec<T, Order> {
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typedef typename detail::AtomicBaseIncDec<T, Order> Base;
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public:
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constexpr Atomic() : Base() {}
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explicit constexpr Atomic(T aInit) : Base(aInit) {}
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using Base::operator=;
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T operator+=(T aDelta) {
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return Base::Intrinsics::add(Base::mValue, aDelta) + aDelta;
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}
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T operator-=(T aDelta) {
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return Base::Intrinsics::sub(Base::mValue, aDelta) - aDelta;
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}
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T operator|=(T aVal) {
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return Base::Intrinsics::or_(Base::mValue, aVal) | aVal;
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}
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T operator^=(T aVal) {
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return Base::Intrinsics::xor_(Base::mValue, aVal) ^ aVal;
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}
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T operator&=(T aVal) {
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return Base::Intrinsics::and_(Base::mValue, aVal) & aVal;
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}
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private:
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Atomic(Atomic& aOther) = delete;
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};
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/**
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* Atomic<T> implementation for pointer types.
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*
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* An atomic compare-and-swap primitive for pointer variables is provided, as
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* are atomic increment and decement operators. Also provided are the compound
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* assignment operators for addition and subtraction. Atomic swap (via
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* exchange()) is included as well.
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*/
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template <typename T, MemoryOrdering Order>
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class Atomic<T*, Order> : public detail::AtomicBaseIncDec<T*, Order> {
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typedef typename detail::AtomicBaseIncDec<T*, Order> Base;
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public:
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constexpr Atomic() : Base() {}
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explicit constexpr Atomic(T* aInit) : Base(aInit) {}
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using Base::operator=;
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T* operator+=(ptrdiff_t aDelta) {
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return Base::Intrinsics::add(Base::mValue, aDelta) + aDelta;
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}
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T* operator-=(ptrdiff_t aDelta) {
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return Base::Intrinsics::sub(Base::mValue, aDelta) - aDelta;
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}
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private:
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Atomic(Atomic& aOther) = delete;
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};
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/**
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* Atomic<T> implementation for enum types.
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*
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* The atomic store and load operations and the atomic swap method is provided.
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*/
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template <typename T, MemoryOrdering Order>
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class Atomic<T, Order, std::enable_if_t<std::is_enum_v<T>>>
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: public detail::AtomicBase<T, Order> {
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typedef typename detail::AtomicBase<T, Order> Base;
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public:
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constexpr Atomic() : Base() {}
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explicit constexpr Atomic(T aInit) : Base(aInit) {}
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operator T() const { return T(Base::Intrinsics::load(Base::mValue)); }
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using Base::operator=;
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private:
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Atomic(Atomic& aOther) = delete;
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};
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/**
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* Atomic<T> implementation for boolean types.
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*
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* The atomic store and load operations and the atomic swap method is provided.
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*
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* Note:
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*
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* - sizeof(Atomic<bool>) != sizeof(bool) for some implementations of
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* bool and/or some implementations of std::atomic. This is allowed in
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* [atomic.types.generic]p9.
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*
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* - It's not obvious whether the 8-bit atomic functions on Windows are always
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* inlined or not. If they are not inlined, the corresponding functions in the
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* runtime library are not available on Windows XP. This is why we implement
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* Atomic<bool> with an underlying type of uint32_t.
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*/
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template <MemoryOrdering Order>
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class Atomic<bool, Order> : protected detail::AtomicBase<uint32_t, Order> {
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typedef typename detail::AtomicBase<uint32_t, Order> Base;
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public:
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constexpr Atomic() : Base() {}
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explicit constexpr Atomic(bool aInit) : Base(aInit) {}
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// We provide boolean wrappers for the underlying AtomicBase methods.
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MOZ_IMPLICIT operator bool() const {
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return Base::Intrinsics::load(Base::mValue);
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}
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bool operator=(bool aVal) { return Base::operator=(aVal); }
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bool exchange(bool aVal) { return Base::exchange(aVal); }
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bool compareExchange(bool aOldValue, bool aNewValue) {
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return Base::compareExchange(aOldValue, aNewValue);
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}
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private:
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Atomic(Atomic& aOther) = delete;
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};
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} // namespace mozilla
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namespace std {
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// If you want to atomically swap two atomic values, use exchange().
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template <typename T, mozilla::MemoryOrdering Order>
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void swap(mozilla::Atomic<T, Order>&, mozilla::Atomic<T, Order>&) = delete;
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} // namespace std
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#endif /* mozilla_Atomics_h */
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