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GT-2880 changes pre-certification

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This commit is contained in:
ghizard 2019-09-05 18:22:25 -04:00
parent 7f3dc05d70
commit 0ba928a33f
6 changed files with 116 additions and 62 deletions
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46
Ghidra/Processors/AARCH64/data/languages/AARCH64.cspec
View File

@ -5,7 +5,7 @@
<absolute_max_alignment value="0" />
<machine_alignment value="4" />
<default_alignment value="1" />
<default_pointer_alignment value="4" />
<default_pointer_alignment value="8" />
<pointer_size value="8" />
<wchar_size value="4" />
<short_size value="2" />
@ -129,7 +129,6 @@
</pentry>
</output>
<unaffected>
<register name="x8"/>
<register name="x19"/>
<register name="x20"/>
<register name="x21"/>
@ -143,17 +142,48 @@
<register name="x29"/>
<register name="x30"/>
<register name="sp"/>
<!-- vectors -->
<register name="d8"/>
<register name="d9"/>
<register name="d10"/>
<register name="d11"/>
<register name="d12"/>
<register name="d13"/>
<register name="d14"/>
<register name="d15"/>
</unaffected>
<killedbycall>
<register name="x1"/>
<!-- x8: indirect result location register, which is not
reflected in the pentry list -->
<register name="x8"/>
<register name="x9"/>
<register name="x10"/>
<register name="x11"/>
<register name="x12"/>
<register name="x13"/>
<register name="x14"/>
<register name="x15"/>
</killedbycall>
<register name="x12"/>
<register name="x13"/>
<register name="x14"/>
<register name="x15"/>
<register name="x16"/>
<register name="x17"/>
<register name="x18"/>
<!-- vectors -->
<register name="d16"/>
<register name="d17"/>
<register name="d18"/>
<register name="d19"/>
<register name="d20"/>
<register name="d21"/>
<register name="d22"/>
<register name="d23"/>
<register name="d24"/>
<register name="d25"/>
<register name="d26"/>
<register name="d27"/>
<register name="d28"/>
<register name="d29"/>
<register name="d30"/>
<register name="d31"/>
</killedbycall>
</prototype>
</default_proto>

1
Ghidra/Processors/AARCH64/data/languages/AARCH64.ldefs
View File

@ -11,6 +11,7 @@
id="AARCH64:LE:64:v8A">
<description>Generic ARM v8.3-A, Little endian instructions, Little endian data</description>
<compiler name="default" spec="AARCH64.cspec" id="default"/>
<compiler name="Visual Studio" spec="ARCH64_win.cspec" id="windows"/>
<external_name tool="gnu" name="aarch64"/>
<external_name tool="DWARF.register.mapping.file" name="AARCH64.dwarf"/>
</language>

81
Ghidra/Processors/AARCH64/data/languages/AARCH64_win.cspec
View File

@ -1,12 +1,14 @@
<?xml version="1.0" encoding="UTF-8"?>
<compiler_spec>
<!-- Copied from AARCH.cspec and modified... See: https://docs.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=vs-2019 -->
<!-- Copied from AARCH.cspec and modified...
See: https://docs.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=vs-2019
The AARCH64 ABI refers to Windows ABI as LLP64 data model -->
<data_organization>
<absolute_max_alignment value="0" />
<machine_alignment value="4" /> <!-- Not sure -->
<machine_alignment value="4" />
<default_alignment value="1" />
<default_pointer_alignment value="4" />
<default_pointer_alignment value="8" />
<pointer_size value="8" />
<wchar_size value="2" />
<short_size value="2" />
@ -15,18 +17,18 @@
<long_long_size value="8" />
<float_size value="4" />
<double_size value="8" />
<long_double_size value="8" />
<long_double_size value="16" />
<size_alignment_map>
<entry size="1" alignment="1" />
<entry size="2" alignment="2" />
<entry size="4" alignment="4" />
<entry size="8" alignment="8" />
<entry size="16" alignment="16" />
</size_alignment_map>
</data_organization>
<global>
<range space="ram"/>
<range space="register" first="0x3000" last="0x3fff"/>
</global>
<stackpointer register="sp" space="ram"/>
@ -123,14 +125,13 @@
</input>
<output>
<pentry minsize="1" maxsize="8" metatype="float">
<register name="v0"/>
<register name="d0"/>
</pentry>
<pentry minsize="1" maxsize="8" extension="zero">
<register name="x0"/>
</pentry>
</output>
<unaffected>
<register name="x18"/>
<register name="x19"/>
<register name="x20"/>
<register name="x21"/>
@ -144,41 +145,47 @@
<register name="x29"/>
<register name="x30"/>
<register name="sp"/>
<register name="pc"/>
<register name="v8"/>
<register name="v9"/>
<register name="v10"/>
<register name="v11"/>
<register name="v12"/>
<register name="v13"/>
<register name="v14"/>
<register name="v15"/>
<!-- vectors -->
<register name="d8"/>
<register name="d9"/>
<register name="d10"/>
<register name="d11"/>
<register name="d12"/>
<register name="d13"/>
<register name="d14"/>
<register name="d15"/>
</unaffected>
<killedbycall>
<register name="x0"/>
<register name="x1"/>
<register name="x2"/>
<register name="x3"/>
<register name="x4"/>
<register name="x5"/>
<register name="x6"/>
<register name="x7"/>
<!-- x8: indirect result location register, which is not
reflected in the pentry list -->
<register name="x8"/>
<register name="x9"/>
<register name="x10"/>
<register name="x11"/>
<register name="x12"/>
<register name="x13"/>
<register name="x14"/>
<register name="x15"/>
<register name="x16"/>
<register name="x17"/>
<register name="x18"/>
<register name="x19"/>
<register name="v20"/>
<register name="v21"/>
<register name="v22"/>
<register name="v23"/>
<register name="v24"/>
<register name="v25"/>
<register name="v26"/>
<register name="v27"/>
<register name="v28"/>
<register name="v29"/>
<register name="v30"/>
<register name="v31"/>
<!-- vectors -->
<register name="d16"/>
<register name="d17"/>
<register name="d18"/>
<register name="d19"/>
<register name="d20"/>
<register name="d21"/>
<register name="d22"/>
<register name="d23"/>
<register name="d24"/>
<register name="d25"/>
<register name="d26"/>
<register name="d27"/>
<register name="d28"/>
<register name="d29"/>
<register name="d30"/>
<register name="d31"/>
</killedbycall>
</prototype>
</default_proto>

31
Ghidra/Processors/ARM/data/languages/ARM.ldefs
View File

@ -17,21 +17,20 @@
<external_name tool="IDA-PRO" name="arm"/>
<external_name tool="DWARF.register.mapping.file" name="ARMneon.dwarf"/>
</language>
<language processor="ARM"
endian="little"
endian="big"
instructionEndian="little"
size="32"
variant="v8"
variant="v8LEInstruction"
version="1.102"
slafile="ARM8_le.sla"
processorspec="ARMt.pspec"
manualindexfile="../manuals/ARM.idx"
id="ARM:LE:32:v8">
<description>Generic ARM/Thumb v8 little endian</description>
id="ARM:LEBE:32:v8LEInstruction">
<description>Generic ARM/Thumb v8 little endian instructions and big endian data</description>
<compiler name="default" spec="ARM.cspec" id="default"/>
<compiler name="Visual Studio" spec="ARM_win.cspec" id="windows"/>
<external_name tool="gnu" name="iwmmxt"/>
<external_name tool="IDA-PRO" name="arm"/>
<compiler name="Visual Studio" spec="ARM.cspec" id="windows"/>
<external_name tool="DWARF.register.mapping.file" name="ARMneon.dwarf"/>
</language>
@ -68,6 +67,22 @@
<external_name tool="DWARF.register.mapping.file" name="ARMneon.dwarf"/>
</language>
<language processor="ARM"
endian="big"
instructionEndian="little"
size="32"
variant="v7LEInstruction"
version="1.102"
slafile="ARM7_le.sla"
processorspec="ARMt.pspec"
manualindexfile="../manuals/ARM.idx"
id="ARM:LEBE:32:v7LEInstruction">
<description>Generic ARM/Thumb v7 little endian instructions and big endian data</description>
<compiler name="default" spec="ARM.cspec" id="default"/>
<compiler name="Visual Studio" spec="ARM.cspec" id="windows"/>
<external_name tool="DWARF.register.mapping.file" name="ARMneon.dwarf"/>
</language>
<language processor="ARM"
endian="big"
size="32"

18
Ghidra/Processors/ARM/data/languages/ARM.opinion
View File

@ -1,18 +1,18 @@
<opinions>
<constraint loader="Portable Executable (PE)">
<constraint compilerSpecID="windows">
<constraint primary="448" processor="ARM" endian="little" size="32" variant="v7" />
<constraint primary="450" processor="ARM" endian="little" size="32" variant="v7" /> <!-- THUMB -->
<constraint primary="452" processor="ARM" endian="little" size="32" variant="v7" /> <!-- THUMB -->
<constraint primary="448" processor="ARM" endian="little" size="32" variant="v8" />
<constraint primary="450" processor="ARM" endian="little" size="32" variant="v8" /> <!-- THUMB -->
<constraint primary="452" processor="ARM" endian="little" size="32" variant="v8" /> <!-- THUMB -->
</constraint>
<constraint compilerSpecID="default">
<constraint primary="2560" processor="ARM" endian="big" size="32" variant="v8" />
</constraint>
</constraint>
<constraint loader="Debug Symbols (DBG)" compilerSpecID="windows">
<constraint primary="448" processor="ARM" endian="little" size="32" variant="v7" />
<constraint primary="450" processor="ARM" endian="little" size="32" variant="v7" /> <!-- THUMB -->
<constraint primary="452" processor="ARM" endian="little" size="32" variant="v7" /> <!-- THUMB -->
<constraint primary="448" processor="ARM" endian="little" size="32" variant="v8" />
<constraint primary="450" processor="ARM" endian="little" size="32" variant="v8" /> <!-- THUMB -->
<constraint primary="452" processor="ARM" endian="little" size="32" variant="v8" /> <!-- THUMB -->
</constraint>
<constraint loader="Executable and Linking Format (ELF)" compilerSpecID="default">
<constraint primary="40" processor="ARM" size="32" variant="v8" />
@ -31,8 +31,8 @@
<constraint primary="arm7" processor="ARM" endian="little" size="32" variant="v7" />
</constraint>
<constraint loader="MS Common Object File Format (COFF)" compilerSpecID="windows">
<constraint primary="448" processor="ARM" endian="little" size="32" variant="v7" />
<constraint primary="450" processor="ARM" endian="little" size="32" variant="v7" />
<constraint primary="452" processor="ARM" endian="little" size="32" variant="v7" />
<constraint primary="448" processor="ARM" endian="little" size="32" variant="v8" />
<constraint primary="450" processor="ARM" endian="little" size="32" variant="v8" />
<constraint primary="452" processor="ARM" endian="little" size="32" variant="v8" />
</constraint>
</opinions>

1
Ghidra/Processors/ARM/data/languages/ARM_win.cspec
View File

@ -34,6 +34,7 @@
<default_proto>
<prototype name="__stdcall" extrapop="0" stackshift="0">
<input>
<!-- we cannot accurately model the allocation scheme when parameters are larger than 4 bytes -->
<pentry minsize="1" maxsize="4" metatype="float">
<register name="s0"/>
</pentry>