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[RISCV] Minor refactoring of some code in copyPhysReg. NFC

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Move some of the vmv.v.i handling into the vmv.v.v if. This
reduces the scope of one variable.
This commit is contained in:
Craig Topper 2023-06-21 18:02:53 -07:00
parent d846ce7bc4
commit 017a24eb1b
1 changed files with 6 additions and 6 deletions
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12
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
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@ -417,12 +417,13 @@ void RISCVInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
if (IsScalableVector) {
bool UseVMV_V_V = false;
bool UseVMV_V_I = false;
MachineBasicBlock::const_iterator DefMBBI;
unsigned VIOpc;
if (isConvertibleToVMV_V_V(STI, MBB, MBBI, DefMBBI, LMul)) {
UseVMV_V_V = true;
// We only need to handle LMUL = 1/2/4/8 here because we only define
// vector register classes for LMUL = 1/2/4/8.
unsigned VIOpc;
switch (LMul) {
default:
llvm_unreachable("Impossible LMUL for vector register copy.");
@ -443,12 +444,11 @@ void RISCVInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
VIOpc = RISCV::PseudoVMV_V_I_M8;
break;
}
}
bool UseVMV_V_I = false;
if (UseVMV_V_V && (DefMBBI->getOpcode() == VIOpc)) {
UseVMV_V_I = true;
Opc = VIOpc;
if (DefMBBI->getOpcode() == VIOpc) {
UseVMV_V_I = true;
Opc = VIOpc;
}
}
if (NF == 1) {