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GlobalISel: Verify G_MERGE_VALUES operand sizes
llvm-svn: 364822
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@ -1176,6 +1176,16 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
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LLT SrcTy = MRI->getType(MI->getOperand(1).getReg());
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if (DstTy.isVector() || SrcTy.isVector())
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report("G_MERGE_VALUES cannot operate on vectors", MI);
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const unsigned NumOps = MI->getNumOperands();
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if (DstTy.getSizeInBits() != SrcTy.getSizeInBits() * (NumOps - 1))
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report("G_MERGE_VALUES result size is inconsistent", MI);
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for (unsigned I = 2; I != NumOps; ++I) {
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if (MRI->getType(MI->getOperand(I).getReg()) != SrcTy)
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report("G_MERGE_VALUES source types do not match", MI);
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}
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break;
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}
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case TargetOpcode::G_UNMERGE_VALUES: {
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28
llvm/test/MachineVerifier/test_g_merge_values.mir
Normal file
28
llvm/test/MachineVerifier/test_g_merge_values.mir
Normal file
@ -0,0 +1,28 @@
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# RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
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# REQUIRES: aarch64-registered-target
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---
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name: g_merge_values
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tracksRegLiveness: true
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liveins:
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body: |
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bb.0:
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%0:_(s32) = IMPLICIT_DEF
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%1:_(s32) = IMPLICIT_DEF
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%2:_(<2 x s32>) = IMPLICIT_DEF
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%3:_(<2 x s32>) = IMPLICIT_DEF
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; CHECK: Bad machine code: G_MERGE_VALUES cannot operate on vectors
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%4:_(<4 x s32>) = G_MERGE_VALUES %2, %3
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; CHECK: Bad machine code: G_MERGE_VALUES result size is inconsistent
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%5:_(s64) = G_MERGE_VALUES %0
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; CHECK: Bad machine code: G_MERGE_VALUES result size is inconsistent
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%6:_(s64) = G_MERGE_VALUES %0, %1, %1
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%7:_(s16) = IMPLICIT_DEF
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; CHECK: Bad machine code: G_MERGE_VALUES source types do not match
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%8:_(s64) = G_MERGE_VALUES %0, %7
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...
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