mirror of
https://github.com/capstone-engine/llvm-capstone.git
synced 2025-02-10 19:34:29 +00:00
Handle functions with struct arguments or return types and the regparm
attribute. It is a variation of the x86_64 ABI: * A struct returned indirectly uses the first register argument to pass the pointer. * Floats, Doubles and structs containing only one of them are not passed in registers. * Other structs are split into registers if they fit on the remaining ones. Otherwise they are passed in memory. * When a struct doesn't fit it still consumes the registers. llvm-svn: 161022
This commit is contained in:
parent
3865c6e670
commit
06b2b4a7c9
@ -74,31 +74,42 @@ namespace clang {
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unsigned UIntData;
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bool BoolData0;
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bool BoolData1;
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bool InReg;
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ABIArgInfo(Kind K, llvm::Type *TD, unsigned UI, bool B0, bool B1,
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ABIArgInfo(Kind K, llvm::Type *TD, unsigned UI, bool B0, bool B1, bool IR,
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llvm::Type* P)
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: TheKind(K), TypeData(TD), PaddingType(P), UIntData(UI), BoolData0(B0),
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BoolData1(B1) {}
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BoolData1(B1), InReg(IR) {}
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public:
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ABIArgInfo() : TheKind(Direct), TypeData(0), UIntData(0) {}
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static ABIArgInfo getDirect(llvm::Type *T = 0, unsigned Offset = 0,
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llvm::Type *Padding = 0) {
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return ABIArgInfo(Direct, T, Offset, false, false, Padding);
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return ABIArgInfo(Direct, T, Offset, false, false, false, Padding);
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}
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static ABIArgInfo getDirectInReg(llvm::Type *T) {
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return ABIArgInfo(Direct, T, 0, false, false, true, 0);
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}
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static ABIArgInfo getExtend(llvm::Type *T = 0) {
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return ABIArgInfo(Extend, T, 0, false, false, 0);
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return ABIArgInfo(Extend, T, 0, false, false, false, 0);
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}
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static ABIArgInfo getExtendInReg(llvm::Type *T = 0) {
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return ABIArgInfo(Extend, T, 0, false, false, true, 0);
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}
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static ABIArgInfo getIgnore() {
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return ABIArgInfo(Ignore, 0, 0, false, false, 0);
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return ABIArgInfo(Ignore, 0, 0, false, false, false, 0);
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}
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static ABIArgInfo getIndirect(unsigned Alignment, bool ByVal = true
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, bool Realign = false) {
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return ABIArgInfo(Indirect, 0, Alignment, ByVal, Realign, 0);
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return ABIArgInfo(Indirect, 0, Alignment, ByVal, Realign, false, 0);
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}
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static ABIArgInfo getIndirectInReg(unsigned Alignment, bool ByVal = true
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, bool Realign = false) {
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return ABIArgInfo(Indirect, 0, Alignment, ByVal, Realign, true, 0);
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}
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static ABIArgInfo getExpand() {
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return ABIArgInfo(Expand, 0, 0, false, false, 0);
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return ABIArgInfo(Expand, 0, 0, false, false, false, 0);
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}
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Kind getKind() const { return TheKind; }
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@ -132,6 +143,11 @@ namespace clang {
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TypeData = T;
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}
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bool getInReg() const {
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assert((isDirect() || isExtend() || isIndirect()) && "Invalid kind!");
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return InReg;
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}
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// Indirect accessors
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unsigned getIndirectAlign() const {
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assert(TheKind == Indirect && "Invalid kind!");
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@ -983,14 +983,18 @@ void CodeGenModule::ConstructAttributeList(const CGFunctionInfo &FI,
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case ABIArgInfo::Ignore:
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break;
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case ABIArgInfo::Indirect:
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PAL.push_back(llvm::AttributeWithIndex::get(Index,
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llvm::Attribute::StructRet));
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case ABIArgInfo::Indirect: {
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llvm::Attributes SRETAttrs = llvm::Attribute::StructRet;
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if (RetAI.getInReg())
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SRETAttrs |= llvm::Attribute::InReg;
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PAL.push_back(llvm::AttributeWithIndex::get(Index, SRETAttrs));
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++Index;
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// sret disables readnone and readonly
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FuncAttrs &= ~(llvm::Attribute::ReadOnly |
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llvm::Attribute::ReadNone);
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break;
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}
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case ABIArgInfo::Expand:
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llvm_unreachable("Invalid ABI kind for return argument");
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@ -999,14 +1003,6 @@ void CodeGenModule::ConstructAttributeList(const CGFunctionInfo &FI,
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if (RetAttrs)
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PAL.push_back(llvm::AttributeWithIndex::get(0, RetAttrs));
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// FIXME: RegParm should be reduced in case of global register variable.
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signed RegParm;
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if (FI.getHasRegParm())
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RegParm = FI.getRegParm();
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else
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RegParm = CodeGenOpts.NumRegisterParameters;
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unsigned PointerWidth = getContext().getTargetInfo().getPointerWidth(0);
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for (CGFunctionInfo::const_arg_iterator it = FI.arg_begin(),
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ie = FI.arg_end(); it != ie; ++it) {
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QualType ParamType = it->type;
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@ -1024,22 +1020,22 @@ void CodeGenModule::ConstructAttributeList(const CGFunctionInfo &FI,
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Attrs |= llvm::Attribute::ZExt;
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// FALL THROUGH
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case ABIArgInfo::Direct:
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if (RegParm > 0 &&
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(ParamType->isIntegerType() || ParamType->isPointerType() ||
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ParamType->isReferenceType())) {
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RegParm -=
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(Context.getTypeSize(ParamType) + PointerWidth - 1) / PointerWidth;
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if (RegParm >= 0)
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if (AI.getInReg())
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Attrs |= llvm::Attribute::InReg;
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}
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// FIXME: handle sseregparm someday...
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// Increment Index if there is padding.
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Index += (AI.getPaddingType() != 0);
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if (llvm::StructType *STy =
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dyn_cast<llvm::StructType>(AI.getCoerceToType()))
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Index += STy->getNumElements()-1; // 1 will be added below.
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dyn_cast<llvm::StructType>(AI.getCoerceToType())) {
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unsigned Extra = STy->getNumElements()-1; // 1 will be added below.
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if (Attrs != llvm::Attribute::None)
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for (unsigned I = 0; I < Extra; ++I)
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PAL.push_back(llvm::AttributeWithIndex::get(Index + I, Attrs));
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Index += Extra;
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}
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break;
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case ABIArgInfo::Indirect:
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@ -413,12 +413,18 @@ static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
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/// X86_32ABIInfo - The X86-32 ABI information.
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class X86_32ABIInfo : public ABIInfo {
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enum Class {
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Integer,
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Float
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};
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static const unsigned MinABIStackAlignInBytes = 4;
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bool IsDarwinVectorABI;
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bool IsSmallStructInRegABI;
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bool IsMMXDisabled;
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bool IsWin32FloatStructABI;
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unsigned DefaultNumRegisterParameters;
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static bool isRegisterSize(unsigned Size) {
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return (Size == 8 || Size == 16 || Size == 32 || Size == 64);
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@ -434,8 +440,11 @@ class X86_32ABIInfo : public ABIInfo {
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/// \brief Return the alignment to use for the given type on the stack.
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unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const;
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Class classify(QualType Ty) const;
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ABIArgInfo classifyReturnType(QualType RetTy,
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unsigned callingConvention) const;
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ABIArgInfo classifyArgumentTypeWithReg(QualType RetTy,
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unsigned &FreeRegs) const;
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ABIArgInfo classifyArgumentType(QualType RetTy) const;
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public:
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@ -444,16 +453,18 @@ public:
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virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
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CodeGenFunction &CGF) const;
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X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m, bool w)
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X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m, bool w,
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unsigned r)
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: ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p),
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IsMMXDisabled(m), IsWin32FloatStructABI(w) {}
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IsMMXDisabled(m), IsWin32FloatStructABI(w),
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DefaultNumRegisterParameters(r) {}
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};
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class X86_32TargetCodeGenInfo : public TargetCodeGenInfo {
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public:
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X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT,
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bool d, bool p, bool m, bool w)
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:TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, m, w)) {}
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bool d, bool p, bool m, bool w, unsigned r)
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:TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, m, w, r)) {}
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void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
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CodeGen::CodeGenModule &CGM) const;
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@ -690,6 +701,57 @@ ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const {
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return ABIArgInfo::getIndirect(StackAlign);
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}
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X86_32ABIInfo::Class X86_32ABIInfo::classify(QualType Ty) const {
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const Type *T = isSingleElementStruct(Ty, getContext());
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if (!T)
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T = Ty.getTypePtr();
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if (const BuiltinType *BT = T->getAs<BuiltinType>()) {
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BuiltinType::Kind K = BT->getKind();
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if (K == BuiltinType::Float || K == BuiltinType::Double)
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return Float;
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}
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return Integer;
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}
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ABIArgInfo
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X86_32ABIInfo::classifyArgumentTypeWithReg(QualType Ty,
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unsigned &FreeRegs) const {
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// Common case first.
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if (FreeRegs == 0)
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return classifyArgumentType(Ty);
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Class C = classify(Ty);
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if (C == Float)
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return classifyArgumentType(Ty);
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unsigned SizeInRegs = (getContext().getTypeSize(Ty) + 31) / 32;
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if (SizeInRegs == 0)
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return classifyArgumentType(Ty);
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if (SizeInRegs > FreeRegs) {
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FreeRegs = 0;
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return classifyArgumentType(Ty);
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}
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assert(SizeInRegs >= 1 && SizeInRegs <= 3);
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FreeRegs -= SizeInRegs;
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// If it is a simple scalar, keep the type so that we produce a cleaner IR.
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ABIArgInfo Foo = classifyArgumentType(Ty);
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if (Foo.isDirect() && !Foo.getDirectOffset() && !Foo.getPaddingType())
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return ABIArgInfo::getDirectInReg(Foo.getCoerceToType());
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if (Foo.isExtend())
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return ABIArgInfo::getExtendInReg(Foo.getCoerceToType());
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llvm::LLVMContext &LLVMContext = getVMContext();
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llvm::Type *Int32 = llvm::Type::getInt32Ty(LLVMContext);
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SmallVector<llvm::Type*, 3> Elements;
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for (unsigned I = 0; I < SizeInRegs; ++I)
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Elements.push_back(Int32);
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llvm::Type *Result = llvm::StructType::get(LLVMContext, Elements);
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return ABIArgInfo::getDirectInReg(Result);
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}
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ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const {
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// FIXME: Set alignment on indirect arguments.
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if (isAggregateTypeForABI(Ty)) {
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@ -754,9 +816,23 @@ ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const {
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void X86_32ABIInfo::computeInfo(CGFunctionInfo &FI) const {
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FI.getReturnInfo() = classifyReturnType(FI.getReturnType(),
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FI.getCallingConvention());
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unsigned FreeRegs = FI.getHasRegParm() ? FI.getRegParm() :
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DefaultNumRegisterParameters;
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// If the return value is indirect, then the hidden argument is consuming one
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// integer register.
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if (FI.getReturnInfo().isIndirect() && FreeRegs) {
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--FreeRegs;
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ABIArgInfo &Old = FI.getReturnInfo();
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Old = ABIArgInfo::getIndirectInReg(Old.getIndirectAlign(),
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Old.getIndirectByVal(),
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Old.getIndirectRealign());
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}
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for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
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it != ie; ++it)
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it->info = classifyArgumentType(it->type);
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it->info = classifyArgumentTypeWithReg(it->type, FreeRegs);
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}
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llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
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@ -3735,8 +3811,8 @@ const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() {
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if (Triple.isOSDarwin())
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return *(TheTargetCodeGenInfo =
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new X86_32TargetCodeGenInfo(
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Types, true, true, DisableMMX, false));
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new X86_32TargetCodeGenInfo(Types, true, true, DisableMMX, false,
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CodeGenOpts.NumRegisterParameters));
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switch (Triple.getOS()) {
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case llvm::Triple::Cygwin:
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@ -3746,18 +3822,20 @@ const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() {
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case llvm::Triple::FreeBSD:
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case llvm::Triple::OpenBSD:
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return *(TheTargetCodeGenInfo =
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new X86_32TargetCodeGenInfo(
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Types, false, true, DisableMMX, false));
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new X86_32TargetCodeGenInfo(Types, false, true, DisableMMX,
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false,
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CodeGenOpts.NumRegisterParameters));
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case llvm::Triple::Win32:
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return *(TheTargetCodeGenInfo =
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new X86_32TargetCodeGenInfo(
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Types, false, true, DisableMMX, true));
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new X86_32TargetCodeGenInfo(Types, false, true, DisableMMX, true,
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CodeGenOpts.NumRegisterParameters));
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default:
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return *(TheTargetCodeGenInfo =
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new X86_32TargetCodeGenInfo(
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Types, false, false, DisableMMX, false));
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new X86_32TargetCodeGenInfo(Types, false, false, DisableMMX,
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false,
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CodeGenOpts.NumRegisterParameters));
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}
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}
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177
clang/test/CodeGen/regparm-struct.c
Normal file
177
clang/test/CodeGen/regparm-struct.c
Normal file
@ -0,0 +1,177 @@
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// RUN: %clang_cc1 -triple i386-unknown-unknown %s -emit-llvm -o - | FileCheck %s
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__attribute__((regparm(3))) void f1(int a, int b, int c, int d);
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// CHECK: declare void @f1(i32 inreg, i32 inreg, i32 inreg, i32)
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void g1() {
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f1(41, 42, 43, 44);
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}
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struct s1 {
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int x1;
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};
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__attribute__((regparm(3))) void f2(int a, int b, struct s1 c, int d);
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// CHECK: declare void @f2(i32 inreg, i32 inreg, i32 inreg, i32)
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void g2() {
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struct s1 x = {43};
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f2(41, 42, x, 44);
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}
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struct s2 {
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int x1;
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int x2;
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};
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__attribute__((regparm(3))) void f3(int a, int b, struct s2 c, int d);
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// CHECK: declare void @f3(i32 inreg, i32 inreg, i32, i32, i32)
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void g3() {
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struct s2 x = {43, 44};
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f3(41, 42, x, 45);
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}
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__attribute__((regparm(3))) void f4(int a, struct s2 b, int c);
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// CHECK: declare void @f4(i32 inreg, i32 inreg, i32 inreg, i32)
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void g4() {
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struct s2 x = {42, 43};
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f4(41, x, 44);
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}
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struct s3 {
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int x1;
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int x2;
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int x3;
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};
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__attribute__((regparm(3))) void f5(int a, struct s3 b, int c);
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// CHECK: declare void @f5(i32 inreg, i32, i32, i32, i32)
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void g5() {
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struct s3 x = {42, 43, 44};
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f5(41, x, 45);
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}
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__attribute__((regparm(3))) void f6(struct s3 a, int b);
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// CHECK: declare void @f6(i32 inreg, i32 inreg, i32 inreg, i32)
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void g6() {
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struct s3 x = {41, 42, 43};
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f6(x, 44);
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}
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struct s4 {
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int x1;
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int x2;
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int x3;
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int x4;
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};
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__attribute__((regparm(3))) void f7(struct s4 a, int b);
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// CHECK: declare void @f7(i32, i32, i32, i32, i32)
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void g7() {
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struct s4 x = {41, 42, 43, 44};
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f7(x, 45);
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}
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__attribute__((regparm(3))) void f8(float a, int b);
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// CHECK: declare void @f8(float, i32 inreg)
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void g8(void) {
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f8(41, 42);
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}
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struct s5 {
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float x1;
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};
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__attribute__((regparm(3))) void f9(struct s5 a, int b);
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// CHECK: declare void @f9(float, i32 inreg)
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void g9(void) {
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struct s5 x = {41};
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f9(x, 42);
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}
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struct s6 {
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float x1;
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int x2;
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};
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__attribute__((regparm(3))) void f10(struct s6 a, int b);
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// CHECK: declare void @f10(i32 inreg, i32 inreg, i32 inreg)
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void g10(void) {
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struct s6 x = {41, 42};
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f10(x, 43);
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}
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struct s7 {
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float x1;
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int x2;
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float x3;
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};
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__attribute__((regparm(3))) void f11(struct s7 a, int b);
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// CHECK: declare void @f11(i32 inreg, i32 inreg, i32 inreg, i32)
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void g11(void) {
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struct s7 x = {41, 42, 43};
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f11(x, 44);
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}
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struct s8 {
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float x1;
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float x2;
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};
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__attribute__((regparm(3))) void f12(struct s8 a, int b);
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// CHECK: declare void @f12(i32 inreg, i32 inreg, i32 inreg)
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void g12(void) {
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struct s8 x = {41, 42};
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f12(x, 43);
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}
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struct s9 {
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float x1;
|
||||
float x2;
|
||||
float x3;
|
||||
};
|
||||
__attribute__((regparm(3))) void f13(struct s9 a, int b);
|
||||
// CHECK: declare void @f13(i32 inreg, i32 inreg, i32 inreg, i32)
|
||||
void g13(void) {
|
||||
struct s9 x = {41, 42, 43};
|
||||
f13(x, 44);
|
||||
}
|
||||
|
||||
struct s10 {
|
||||
double x1;
|
||||
};
|
||||
__attribute__((regparm(3))) void f14(struct s10 a, int b, int c);
|
||||
// CHECK: declare void @f14(double, i32 inreg, i32 inreg)
|
||||
void g14(void) {
|
||||
struct s10 x = { 41 };
|
||||
f14(x, 42, 43);
|
||||
}
|
||||
|
||||
struct s11 {
|
||||
double x1;
|
||||
double x2;
|
||||
};
|
||||
__attribute__((regparm(3))) void f15(struct s11 a, int b);
|
||||
// CHECK: declare void @f15(double, double, i32)
|
||||
void g15(void) {
|
||||
struct s11 x = { 41, 42 };
|
||||
f15(x, 43);
|
||||
}
|
||||
|
||||
struct s12 {
|
||||
double x1;
|
||||
float x2;
|
||||
};
|
||||
__attribute__((regparm(3))) void f16(struct s12 a, int b);
|
||||
// CHECK: declare void @f16(i32 inreg, i32 inreg, i32 inreg, i32)
|
||||
void g16(void) {
|
||||
struct s12 x = { 41, 42 };
|
||||
f16(x, 43);
|
||||
}
|
||||
|
||||
__attribute__((regparm(3))) struct s12 f17(int a, int b, int c);
|
||||
// CHECK: declare void @f17(%struct.s12* inreg sret, i32 inreg, i32 inreg, i32)
|
||||
void g17(void) {
|
||||
f17(41, 42, 43);
|
||||
}
|
||||
|
||||
struct s13 {
|
||||
struct inner {
|
||||
float x;
|
||||
} y;
|
||||
};
|
||||
__attribute__((regparm(3))) void f18(struct s13 a, int b, int c, int d);
|
||||
// CHECK: declare void @f18(%struct.s13* byval align 4, i32 inreg, i32 inreg, i32 inreg)
|
||||
void g18(void) {
|
||||
struct s13 x = {{41}};
|
||||
f18(x, 42, 43, 44);
|
||||
}
|
@ -1,4 +1,4 @@
|
||||
// RUN: %clang_cc1 %s -emit-llvm -o - | FileCheck %s
|
||||
// RUN: %clang_cc1 -triple i686-pc-linux-gnu %s -emit-llvm -o - | FileCheck %s
|
||||
struct foo {
|
||||
template<typename T>
|
||||
__attribute__ ((regparm (3))) foo(T x) {}
|
||||
|
Loading…
x
Reference in New Issue
Block a user