Magic-Mirror/llvm-capstone
1
0
Fork 0
mirror of https://github.com/capstone-engine/llvm-capstone.git synced 2024-11-23 05:40:09 +00:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity

Generation code cleanups & add generated headers

Browse Source 
Delete instead of commenting out
This commit is contained in:
phosphorus 2021-12-05 20:53:27 +08:00
parent d594f4f6b0
commit 06cc5e4e51
4 changed files with 15 additions and 90 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

46
llvm/utils/TableGen/Capstone/CapstoneGenInfo.h
View File

@ -1140,7 +1140,7 @@ void FilterChooser::emitBinaryParser(raw_ostream &o, unsigned &Indentation,
o << "tmp |= ";
else
o << "tmp = ";
o << "fieldFromInstruction(insn, " << EF.Base << ", " << EF.Width << ')';
o << "fieldname(insn, " << EF.Base << ", " << EF.Width << ')';
if (UseInsertBits)
o << " << " << EF.Offset;
else if (EF.Offset != 0)
@ -2212,27 +2212,6 @@ static void emitFieldFromInstruction(formatted_raw_ostream &OS) {
"}\n\n";
}
// emitInsertBits - Emit the templated helper function insertBits().
static void emitInsertBits(formatted_raw_ostream &OS) {
OS << "// Helper function for inserting bits extracted from an encoded "
"instruction into\n"
<< "// a field.\n"
<< "template <typename InsnType>\n"
<< "static std::enable_if_t<std::is_integral<InsnType>::value>\n"
<< "insertBits(InsnType &field, InsnType bits, unsigned startBit, "
"unsigned numBits) {\n"
<< " assert(startBit + numBits <= sizeof field * 8);\n"
<< " field |= (InsnType)bits << startBit;\n"
<< "}\n"
<< "\n"
<< "template <typename InsnType>\n"
<< "static std::enable_if_t<!std::is_integral<InsnType>::value>\n"
<< "insertBits(InsnType &field, uint64_t bits, unsigned startBit, "
"unsigned numBits) {\n"
<< " field.insertBits(bits, startBit, numBits);\n"
<< "}\n\n";
}
// emitDecodeInstruction - Emit the templated helper function
// decodeInstruction().
static void emitDecodeInstruction(formatted_raw_ostream &OS) {
@ -2516,7 +2495,14 @@ void CapstoneGenInfo::emitRecord(
// Emits disassembler code for instruction decoding.
void CapstoneGenInfo::run(raw_ostream &o) {
formatted_raw_ostream OS(o);
OS << "/* Capstone Disassembly Engine, http://www.capstone-engine.org */\n"
<< "/* By Phosphorus15 <phosphorus15@foxmail.com>, Year 2021 */\n"
<< "/* This generator is under https://github.com/rizinorg/llvm-capstone "
"*/\n"
<< "/* Automatically generated file, do not edit! */\n\n";
OS << "#include \"../../MCInst.h\"\n";
OS << "#include \"../../LEB128.h\"\n";
OS << "\n\n";
@ -2704,22 +2690,6 @@ void CapstoneGenInfo::run(raw_ostream &o) {
// Keep track of all of the def lists we have emitted already.
std::map<std::vector<Record *>, unsigned> EmittedLists;
unsigned ListNumber = 0;
//
// // Emit all of the instruction's implicit uses and defs.
// for (const CodeGenInstruction *II : Target.getInstructionsByEnumValue()) {
// Record *Inst = II->TheDef;
// std::vector<Record*> Uses = Inst->getValueAsListOfDefs("Uses");
// if (!Uses.empty()) {
// unsigned &IL = EmittedLists[Uses];
// if (!IL) PrintDefList(Uses, IL = ++ListNumber, OS);
// }
// std::vector<Record*> Defs = Inst->getValueAsListOfDefs("Defs");
// if (!Defs.empty()) {
// unsigned &IL = EmittedLists[Defs];
// if (!IL) PrintDefList(Defs, IL = ++ListNumber, OS);
// }
// }
OperandInfoMapTy OperandInfoIDs;

7
llvm/utils/TableGen/Capstone/CapstoneGenMCDesc.h
View File

@ -33,10 +33,6 @@ static DiffVec &diffEncode(DiffVec &V, unsigned InitVal, Iter Begin, Iter End) {
static void printDiff16(raw_ostream &OS, uint16_t Val) { OS << Val; }
static void printMask(raw_ostream &OS, LaneBitmask Val) {
OS << "LaneBitmask(0x" << PrintLaneMask(Val) << ')';
}
static void printSubRegIndex(raw_ostream &OS, const CodeGenSubRegIndex *Idx) {
OS << Idx->EnumValue;
}
@ -277,9 +273,6 @@ void CapstoneGenInfo::runMCDesc(raw_ostream &OS, CodeGenTarget &Target,
for (const auto &RC : RegisterClasses) {
assert(isInt<8>(RC.CopyCost) && "Copy cost too large.");
uint32_t RegSize = 0;
if (RC.RSI.isSimple())
RegSize = RC.RSI.getSimple().RegSize;
OS << " { " << RC.getName() << ", " << RC.getName() << "Bits, "
<< "sizeof(" << RC.getName() << "Bits)"
<< " },\n";

38
llvm/utils/TableGen/Capstone/CapstoneGenMapper.h
View File

@ -1325,38 +1325,6 @@ AsmMatcherInfo::AsmMatcherInfo(Record *asmParser, CodeGenTarget &target,
RecordKeeper &records)
: Records(records), AsmParser(asmParser), Target(target) {}
/// buildOperandMatchInfo - Build the necessary information to handle user
/// defined operand parsing methods.
void AsmMatcherInfo::buildOperandMatchInfo() {
/// Map containing a mask with all operands indices that can be found for
/// that class inside a instruction.
typedef std::map<ClassInfo *, unsigned, deref<std::less<>>> OpClassMaskTy;
OpClassMaskTy OpClassMask;
for (const auto &MI : Matchables) {
OpClassMask.clear();
// Keep track of all operands of this instructions which belong to the
// same class.
for (unsigned i = 0, e = MI->AsmOperands.size(); i != e; ++i) {
const MatchableInfo::AsmOperand &Op = MI->AsmOperands[i];
if (Op.Class->ParserMethod.empty())
continue;
unsigned &OperandMask = OpClassMask[Op.Class];
OperandMask |= (1 << i);
}
// Generate operand match info for each mnemonic/operand class pair.
for (const auto &OCM : OpClassMask) {
unsigned OpMask = OCM.second;
ClassInfo *CI = OCM.first;
OperandMatchInfo.push_back(
OperandMatchEntry::create(MI.get(), CI, OpMask));
}
}
}
void AsmMatcherInfo::buildInfo() {
// Build information about all of the AssemblerPredicates.
const std::vector<std::pair<Record *, SubtargetFeatureInfo>>
@ -1881,8 +1849,9 @@ void emitInstrMatchTable(raw_ostream &OS, CodeGenTarget &Target,
OS << "};\n\n\n\n";
}
OS << "typedef enum " << Target.getInstNamespace().lower() << "_insn {\n"
" "
OS << "typedef enum " << Target.getInstNamespace().lower()
<< "_insn {\n"
" "
<< Target.getInstNamespace().upper() << "_INS_INVALID = 0";
for (auto Mnemonic : InstructClass) {
OS << ",\n " << Mnemonic;
@ -1893,7 +1862,6 @@ void emitInstrMatchTable(raw_ostream &OS, CodeGenTarget &Target,
void CapstoneGenMapper::run(raw_ostream &O) {
CodeGenTarget Target(Records);
Record *AsmParser = Target.getAsmParser();
StringRef ClassName = AsmParser->getValueAsString("AsmParserClassName");
AsmMatcherInfo Info(AsmParser, Target, Records);
Info.buildInfo();

14
llvm/utils/TableGen/Capstone/CapstoneGenPrinter.h
View File

@ -7,8 +7,6 @@
#include "../Types.h"
#include <llvm/Support/FormatVariadic.h>
std::string extractTemplate(std::string &Printer, std::string Op = "") {
if (Printer.find('<') != std::string::npos) {
size_t End = Printer.find('>');
@ -68,8 +66,8 @@ std::string getCode(const AsmWriterOperand &Op, bool PassSubtarget) {
// quite a lot consequences!
//
// consequences
// if (Op.Str.find("printUImm") != std::string::npos)
// StrBase = "printUnsignedImm";
// if (Op.Str.find("printUImm") != std::string::npos)
// StrBase = "printUnsignedImm";
auto Comment = std::string("/* ") + StrBase + " (+ " + Op.MiModifier + ") */";
@ -333,7 +331,6 @@ void CapstoneGenInfo::EmitGetMnemonic(
std::vector<std::vector<std::string>> &TableDrivenOperandPrinters,
unsigned &BitsLeft, unsigned &AsmStrBits) {
Record *AsmWriter = Target.getAsmWriter();
StringRef ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
bool PassSubtarget = AsmWriter->getValueAsInt("PassSubtarget");
O << "typedef struct MCMnemonic {\n"
@ -503,7 +500,6 @@ void CapstoneGenInfo::EmitPrintInstruction(
unsigned &BitsLeft, unsigned &AsmStrBits) {
const unsigned OpcodeInfoBits = 64;
Record *AsmWriter = Target.getAsmWriter();
StringRef ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
bool PassSubtarget = AsmWriter->getValueAsInt("PassSubtarget");
O << "/// printInstruction - This method is automatically generated by "
@ -643,8 +639,6 @@ emitRegisterNameString(raw_ostream &O, StringRef AltName,
}
void CapstoneGenInfo::EmitGetRegisterName(raw_ostream &O) {
Record *AsmWriter = Target.getAsmWriter();
StringRef ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
const auto &Registers = Target.getRegBank().getRegisters();
const std::vector<Record *> &AltNameIndices = Target.getRegAltNameIndices();
bool hasAltNames = AltNameIndices.size() > 1;
@ -1273,8 +1267,8 @@ void CapstoneGenInfo::EmitPrintAliasInstruction(raw_ostream &O) {
std::string BaseStr = PrintMethods[i].first;
O << "// " << BaseStr << "\n";
// this turns out to be harmful - don't use !
// if (BaseStr.find("printUImm") != std::string::npos)
// BaseStr = "printUnsignedImm";
// if (BaseStr.find("printUImm") != std::string::npos)
// BaseStr = "printUnsignedImm";
std::string Template = extractTemplate(BaseStr);
O << " case " << i << ":\n"
<< " " << BaseStr << "(MI, "