From 06cc5e4e5124fe0fd2963622d4138dab4305b7f9 Mon Sep 17 00:00:00 2001 From: phosphorus Date: Sun, 5 Dec 2021 20:53:27 +0800 Subject: [PATCH] Generation code cleanups & add generated headers Delete instead of commenting out --- .../utils/TableGen/Capstone/CapstoneGenInfo.h | 46 ++++--------------- .../TableGen/Capstone/CapstoneGenMCDesc.h | 7 --- .../TableGen/Capstone/CapstoneGenMapper.h | 38 ++------------- .../TableGen/Capstone/CapstoneGenPrinter.h | 14 ++---- 4 files changed, 15 insertions(+), 90 deletions(-) diff --git a/llvm/utils/TableGen/Capstone/CapstoneGenInfo.h b/llvm/utils/TableGen/Capstone/CapstoneGenInfo.h index 65473eaed833..0815cac94668 100644 --- a/llvm/utils/TableGen/Capstone/CapstoneGenInfo.h +++ b/llvm/utils/TableGen/Capstone/CapstoneGenInfo.h @@ -1140,7 +1140,7 @@ void FilterChooser::emitBinaryParser(raw_ostream &o, unsigned &Indentation, o << "tmp |= "; else o << "tmp = "; - o << "fieldFromInstruction(insn, " << EF.Base << ", " << EF.Width << ')'; + o << "fieldname(insn, " << EF.Base << ", " << EF.Width << ')'; if (UseInsertBits) o << " << " << EF.Offset; else if (EF.Offset != 0) @@ -2212,27 +2212,6 @@ static void emitFieldFromInstruction(formatted_raw_ostream &OS) { "}\n\n"; } -// emitInsertBits - Emit the templated helper function insertBits(). -static void emitInsertBits(formatted_raw_ostream &OS) { - OS << "// Helper function for inserting bits extracted from an encoded " - "instruction into\n" - << "// a field.\n" - << "template \n" - << "static std::enable_if_t::value>\n" - << "insertBits(InsnType &field, InsnType bits, unsigned startBit, " - "unsigned numBits) {\n" - << " assert(startBit + numBits <= sizeof field * 8);\n" - << " field |= (InsnType)bits << startBit;\n" - << "}\n" - << "\n" - << "template \n" - << "static std::enable_if_t::value>\n" - << "insertBits(InsnType &field, uint64_t bits, unsigned startBit, " - "unsigned numBits) {\n" - << " field.insertBits(bits, startBit, numBits);\n" - << "}\n\n"; -} - // emitDecodeInstruction - Emit the templated helper function // decodeInstruction(). static void emitDecodeInstruction(formatted_raw_ostream &OS) { @@ -2516,7 +2495,14 @@ void CapstoneGenInfo::emitRecord( // Emits disassembler code for instruction decoding. void CapstoneGenInfo::run(raw_ostream &o) { + formatted_raw_ostream OS(o); + OS << "/* Capstone Disassembly Engine, http://www.capstone-engine.org */\n" + << "/* By Phosphorus15 , Year 2021 */\n" + << "/* This generator is under https://github.com/rizinorg/llvm-capstone " + "*/\n" + << "/* Automatically generated file, do not edit! */\n\n"; + OS << "#include \"../../MCInst.h\"\n"; OS << "#include \"../../LEB128.h\"\n"; OS << "\n\n"; @@ -2704,22 +2690,6 @@ void CapstoneGenInfo::run(raw_ostream &o) { // Keep track of all of the def lists we have emitted already. std::map, unsigned> EmittedLists; - unsigned ListNumber = 0; - // - // // Emit all of the instruction's implicit uses and defs. - // for (const CodeGenInstruction *II : Target.getInstructionsByEnumValue()) { - // Record *Inst = II->TheDef; - // std::vector Uses = Inst->getValueAsListOfDefs("Uses"); - // if (!Uses.empty()) { - // unsigned &IL = EmittedLists[Uses]; - // if (!IL) PrintDefList(Uses, IL = ++ListNumber, OS); - // } - // std::vector Defs = Inst->getValueAsListOfDefs("Defs"); - // if (!Defs.empty()) { - // unsigned &IL = EmittedLists[Defs]; - // if (!IL) PrintDefList(Defs, IL = ++ListNumber, OS); - // } - // } OperandInfoMapTy OperandInfoIDs; diff --git a/llvm/utils/TableGen/Capstone/CapstoneGenMCDesc.h b/llvm/utils/TableGen/Capstone/CapstoneGenMCDesc.h index ebd5e8c6e378..d7084420bccc 100644 --- a/llvm/utils/TableGen/Capstone/CapstoneGenMCDesc.h +++ b/llvm/utils/TableGen/Capstone/CapstoneGenMCDesc.h @@ -33,10 +33,6 @@ static DiffVec &diffEncode(DiffVec &V, unsigned InitVal, Iter Begin, Iter End) { static void printDiff16(raw_ostream &OS, uint16_t Val) { OS << Val; } -static void printMask(raw_ostream &OS, LaneBitmask Val) { - OS << "LaneBitmask(0x" << PrintLaneMask(Val) << ')'; -} - static void printSubRegIndex(raw_ostream &OS, const CodeGenSubRegIndex *Idx) { OS << Idx->EnumValue; } @@ -277,9 +273,6 @@ void CapstoneGenInfo::runMCDesc(raw_ostream &OS, CodeGenTarget &Target, for (const auto &RC : RegisterClasses) { assert(isInt<8>(RC.CopyCost) && "Copy cost too large."); - uint32_t RegSize = 0; - if (RC.RSI.isSimple()) - RegSize = RC.RSI.getSimple().RegSize; OS << " { " << RC.getName() << ", " << RC.getName() << "Bits, " << "sizeof(" << RC.getName() << "Bits)" << " },\n"; diff --git a/llvm/utils/TableGen/Capstone/CapstoneGenMapper.h b/llvm/utils/TableGen/Capstone/CapstoneGenMapper.h index 40418cef76a3..c6bfb72b5153 100644 --- a/llvm/utils/TableGen/Capstone/CapstoneGenMapper.h +++ b/llvm/utils/TableGen/Capstone/CapstoneGenMapper.h @@ -1325,38 +1325,6 @@ AsmMatcherInfo::AsmMatcherInfo(Record *asmParser, CodeGenTarget &target, RecordKeeper &records) : Records(records), AsmParser(asmParser), Target(target) {} -/// buildOperandMatchInfo - Build the necessary information to handle user -/// defined operand parsing methods. -void AsmMatcherInfo::buildOperandMatchInfo() { - - /// Map containing a mask with all operands indices that can be found for - /// that class inside a instruction. - typedef std::map>> OpClassMaskTy; - OpClassMaskTy OpClassMask; - - for (const auto &MI : Matchables) { - OpClassMask.clear(); - - // Keep track of all operands of this instructions which belong to the - // same class. - for (unsigned i = 0, e = MI->AsmOperands.size(); i != e; ++i) { - const MatchableInfo::AsmOperand &Op = MI->AsmOperands[i]; - if (Op.Class->ParserMethod.empty()) - continue; - unsigned &OperandMask = OpClassMask[Op.Class]; - OperandMask |= (1 << i); - } - - // Generate operand match info for each mnemonic/operand class pair. - for (const auto &OCM : OpClassMask) { - unsigned OpMask = OCM.second; - ClassInfo *CI = OCM.first; - OperandMatchInfo.push_back( - OperandMatchEntry::create(MI.get(), CI, OpMask)); - } - } -} - void AsmMatcherInfo::buildInfo() { // Build information about all of the AssemblerPredicates. const std::vector> @@ -1881,8 +1849,9 @@ void emitInstrMatchTable(raw_ostream &OS, CodeGenTarget &Target, OS << "};\n\n\n\n"; } - OS << "typedef enum " << Target.getInstNamespace().lower() << "_insn {\n" - " " + OS << "typedef enum " << Target.getInstNamespace().lower() + << "_insn {\n" + " " << Target.getInstNamespace().upper() << "_INS_INVALID = 0"; for (auto Mnemonic : InstructClass) { OS << ",\n " << Mnemonic; @@ -1893,7 +1862,6 @@ void emitInstrMatchTable(raw_ostream &OS, CodeGenTarget &Target, void CapstoneGenMapper::run(raw_ostream &O) { CodeGenTarget Target(Records); Record *AsmParser = Target.getAsmParser(); - StringRef ClassName = AsmParser->getValueAsString("AsmParserClassName"); AsmMatcherInfo Info(AsmParser, Target, Records); Info.buildInfo(); diff --git a/llvm/utils/TableGen/Capstone/CapstoneGenPrinter.h b/llvm/utils/TableGen/Capstone/CapstoneGenPrinter.h index f395c0c8a5ac..f32858d0029b 100644 --- a/llvm/utils/TableGen/Capstone/CapstoneGenPrinter.h +++ b/llvm/utils/TableGen/Capstone/CapstoneGenPrinter.h @@ -7,8 +7,6 @@ #include "../Types.h" #include - - std::string extractTemplate(std::string &Printer, std::string Op = "") { if (Printer.find('<') != std::string::npos) { size_t End = Printer.find('>'); @@ -68,8 +66,8 @@ std::string getCode(const AsmWriterOperand &Op, bool PassSubtarget) { // quite a lot consequences! // // consequences -// if (Op.Str.find("printUImm") != std::string::npos) -// StrBase = "printUnsignedImm"; + // if (Op.Str.find("printUImm") != std::string::npos) + // StrBase = "printUnsignedImm"; auto Comment = std::string("/* ") + StrBase + " (+ " + Op.MiModifier + ") */"; @@ -333,7 +331,6 @@ void CapstoneGenInfo::EmitGetMnemonic( std::vector> &TableDrivenOperandPrinters, unsigned &BitsLeft, unsigned &AsmStrBits) { Record *AsmWriter = Target.getAsmWriter(); - StringRef ClassName = AsmWriter->getValueAsString("AsmWriterClassName"); bool PassSubtarget = AsmWriter->getValueAsInt("PassSubtarget"); O << "typedef struct MCMnemonic {\n" @@ -503,7 +500,6 @@ void CapstoneGenInfo::EmitPrintInstruction( unsigned &BitsLeft, unsigned &AsmStrBits) { const unsigned OpcodeInfoBits = 64; Record *AsmWriter = Target.getAsmWriter(); - StringRef ClassName = AsmWriter->getValueAsString("AsmWriterClassName"); bool PassSubtarget = AsmWriter->getValueAsInt("PassSubtarget"); O << "/// printInstruction - This method is automatically generated by " @@ -643,8 +639,6 @@ emitRegisterNameString(raw_ostream &O, StringRef AltName, } void CapstoneGenInfo::EmitGetRegisterName(raw_ostream &O) { - Record *AsmWriter = Target.getAsmWriter(); - StringRef ClassName = AsmWriter->getValueAsString("AsmWriterClassName"); const auto &Registers = Target.getRegBank().getRegisters(); const std::vector &AltNameIndices = Target.getRegAltNameIndices(); bool hasAltNames = AltNameIndices.size() > 1; @@ -1273,8 +1267,8 @@ void CapstoneGenInfo::EmitPrintAliasInstruction(raw_ostream &O) { std::string BaseStr = PrintMethods[i].first; O << "// " << BaseStr << "\n"; // this turns out to be harmful - don't use ! -// if (BaseStr.find("printUImm") != std::string::npos) -// BaseStr = "printUnsignedImm"; + // if (BaseStr.find("printUImm") != std::string::npos) + // BaseStr = "printUnsignedImm"; std::string Template = extractTemplate(BaseStr); O << " case " << i << ":\n" << " " << BaseStr << "(MI, "