From 07056a06a0734694b8f437c35d3ddfeee8c1dd71 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Wed, 22 Feb 2017 10:12:46 +0000
Subject: [PATCH] [X86] Regenerate CSE test with codegen instead of just the
 instruction count

llvm-svn: 295819
---
 llvm/test/CodeGen/X86/dagcombine-cse.ll | 39 +++++++++++++++++++++++--
 1 file changed, 37 insertions(+), 2 deletions(-)

diff --git a/llvm/test/CodeGen/X86/dagcombine-cse.ll b/llvm/test/CodeGen/X86/dagcombine-cse.ll
index bff0e64910bf..1fb233fc06ff 100644
--- a/llvm/test/CodeGen/X86/dagcombine-cse.ll
+++ b/llvm/test/CodeGen/X86/dagcombine-cse.ll
@@ -1,7 +1,42 @@
-; REQUIRES: asserts
-; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -stats 2>&1 | grep asm-printer | grep 13
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=X64
 
 define i32 @t(i8* %ref_frame_ptr, i32 %ref_frame_stride, i32 %idxX, i32 %idxY) nounwind  {
+; X32-LABEL: t:
+; X32:       ## BB#0: ## %entry
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT:    imull {{[0-9]+}}(%esp), %ecx
+; X32-NEXT:    addl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT:    movzwl 4(%eax,%ecx), %edx
+; X32-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X32-NEXT:    movd %edx, %xmm1
+; X32-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; X32-NEXT:    pxor %xmm1, %xmm1
+; X32-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,1,1,2,4,5,6,7]
+; X32-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; X32-NEXT:    movd %xmm0, %eax
+; X32-NEXT:    retl
+;
+; X64-LABEL: t:
+; X64:       ## BB#0: ## %entry
+; X64-NEXT:    ## kill: %EDX<def> %EDX<kill> %RDX<def>
+; X64-NEXT:    ## kill: %ESI<def> %ESI<kill> %RSI<def>
+; X64-NEXT:    imull %ecx, %esi
+; X64-NEXT:    leal (%rsi,%rdx), %eax
+; X64-NEXT:    cltq
+; X64-NEXT:    leal 4(%rsi,%rdx), %ecx
+; X64-NEXT:    movslq %ecx, %rcx
+; X64-NEXT:    movzwl (%rdi,%rcx), %ecx
+; X64-NEXT:    shlq $32, %rcx
+; X64-NEXT:    movl (%rdi,%rax), %eax
+; X64-NEXT:    orq %rcx, %rax
+; X64-NEXT:    movd %rax, %xmm0
+; X64-NEXT:    movq {{.*#+}} xmm0 = xmm0[0],zero
+; X64-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,1,1,2,4,5,6,7]
+; X64-NEXT:    movd %xmm0, %eax
+; X64-NEXT:    retq
 entry:
 	%tmp7 = mul i32 %idxY, %ref_frame_stride		; <i32> [#uses=2]
 	%tmp9 = add i32 %tmp7, %idxX		; <i32> [#uses=1]