[NFC] fix trivial typos in comments and documents

"in in" -> "in", "on on" -> "on" etc.

llvm-svn: 323508

llvm/bindings/go/llvm/ir.go

@@ -1872,7 +1872,7 @@ func (pm PassManager) InitializeFunc() bool { return C.LLVMInitializeFunctionPas
 // See llvm::FunctionPassManager::run(Function&).
 func (pm PassManager) RunFunc(f Value) bool { return C.LLVMRunFunctionPassManager(pm.C, f.C) != 0 }
 
-// Finalizes all of the function passes scheduled in in the function pass
+// Finalizes all of the function passes scheduled in the function pass
 // manager. Returns 1 if any of the passes modified the module, 0 otherwise.
 // See llvm::FunctionPassManager::doFinalization.
 func (pm PassManager) FinalizeFunc() bool { return C.LLVMFinalizeFunctionPassManager(pm.C) != 0 }

llvm/bindings/ocaml/llvm/llvm.mli

@@ -2619,7 +2619,7 @@ module PassManager : sig
       See the [llvm::FunctionPassManager::run] method. *)
   val run_function : llvalue -> [ `Function ] t -> bool
 
-  (** [finalize fpm] finalizes all of the function passes scheduled in in the
+  (** [finalize fpm] finalizes all of the function passes scheduled in the
       function pass manager [fpm]. Returns [true] if any of the passes
       modified the module, [false] otherwise.
       See the [llvm::FunctionPassManager::doFinalization] method. *)

llvm/docs/GettingStarted.rst

@@ -912,7 +912,7 @@ where they are built (a Canadian Cross build). To generate build files for
 cross-compiling CMake provides a variable ``CMAKE_TOOLCHAIN_FILE`` which can
 define compiler flags and variables used during the CMake test operations.
 
-The result of such a build is executables that are not runnable on on the build
+The result of such a build is executables that are not runnable on the build
 host but can be executed on the target. As an example the following CMake
 invocation can generate build files targeting iOS. This will work on Mac OS X
 with the latest Xcode:

llvm/docs/MemorySSA.rst

@@ -79,7 +79,7 @@ viewing this example, it may be helpful to view it in terms of clobbers. The
 operands of a given ``MemoryAccess`` are all (potential) clobbers of said
 MemoryAccess, and the value produced by a ``MemoryAccess`` can act as a clobber
 for other ``MemoryAccess``\ es. Another useful way of looking at it is in
-terms of heap versions.  In that view, operands of of a given
+terms of heap versions.  In that view, operands of a given
 ``MemoryAccess`` are the version of the heap before the operation, and
 if the access produces a value, the value is the new version of the heap
 after the operation.

llvm/docs/doxygen.cfg.in

@@ -285,7 +285,7 @@ MARKDOWN_SUPPORT       = YES
 
 # When enabled doxygen tries to link words that correspond to documented
 # classes, or namespaces to their corresponding documentation. Such a link can
-# be prevented in individual cases by by putting a % sign in front of the word
+# be prevented in individual cases by putting a % sign in front of the word
 # or globally by setting AUTOLINK_SUPPORT to NO.
 # The default value is: YES.
 

llvm/docs/tutorial/OCamlLangImpl1.rst

@@ -193,7 +193,7 @@ as:
 
 ``Lexer.lex`` works by recursing over a ``char Stream.t`` to read
 characters one at a time from the standard input. It eats them as it
-recognizes them and stores them in in a ``Token.token`` variant. The
+recognizes them and stores them in a ``Token.token`` variant. The
 first thing that it has to do is ignore whitespace between tokens. This
 is accomplished with the recursive call above.
 

llvm/include/llvm-c/Core.h

@@ -3186,7 +3186,7 @@ LLVMBool LLVMInitializeFunctionPassManager(LLVMPassManagerRef FPM);
     @see llvm::FunctionPassManager::run(Function&) */
 LLVMBool LLVMRunFunctionPassManager(LLVMPassManagerRef FPM, LLVMValueRef F);
 
-/** Finalizes all of the function passes scheduled in in the function pass
+/** Finalizes all of the function passes scheduled in the function pass
     manager. Returns 1 if any of the passes modified the module, 0 otherwise.
     @see llvm::FunctionPassManager::doFinalization */
 LLVMBool LLVMFinalizeFunctionPassManager(LLVMPassManagerRef FPM);

llvm/include/llvm/Analysis/TargetTransformInfo.h

@@ -308,7 +308,7 @@ public:
   /// compared to the same memory location accessed through a pointer with a
   /// different address space.
   //
-  /// This is for for targets with different pointer representations which can
+  /// This is for targets with different pointer representations which can
   /// be converted with the addrspacecast instruction. If a pointer is converted
   /// to this address space, optimizations should attempt to replace the access
   /// with the source address space.

llvm/include/llvm/Object/MachO.h

@@ -463,7 +463,7 @@ public:
 
   // In a MachO file, sections have a segment name. This is used in the .o
   // files. They have a single segment, but this field specifies which segment
-  // a section should be put in in the final object.
+  // a section should be put in the final object.
   StringRef getSectionFinalSegmentName(DataRefImpl Sec) const;
 
   // Names are stored as 16 bytes. These returns the raw 16 bytes without

llvm/lib/CodeGen/AsmPrinter/EHStreamer.h

@@ -112,7 +112,7 @@ protected:
 
   virtual void emitTypeInfos(unsigned TTypeEncoding);
 
-  // Helpers for for identifying what kind of clause an EH typeid or selector
+  // Helpers for identifying what kind of clause an EH typeid or selector
   // corresponds to. Negative selectors are for filter clauses, the zero
   // selector is for cleanups, and positive selectors are for catch clauses.
   static bool isFilterEHSelector(int Selector) { return Selector < 0; }

llvm/lib/CodeGen/ImplicitNullChecks.cpp

@@ -134,7 +134,7 @@ class ImplicitNullChecks : public MachineFunctionPass {
     // The block branched to if the pointer is null.
     MachineBasicBlock *NullSucc;
 
-    // If this is non-null, then MemOperation has a dependency on on this
+    // If this is non-null, then MemOperation has a dependency on this
     // instruction; and it needs to be hoisted to execute before MemOperation.
     MachineInstr *OnlyDependency;
 

llvm/lib/CodeGen/MachineOutliner.cpp

@@ -1152,7 +1152,7 @@ void MachineOutliner::pruneOverlaps(
     if (C1.getStartIdx() > MaxCandidateLen)
       FarthestPossibleIdx = C1.getStartIdx() - MaxCandidateLen;
 
-    // Compare against the candidates in the list that start at at most
+    // Compare against the candidates in the list that start at most
     // FarthestPossibleIdx indices away from C1. There are at most
     // MaxCandidateLen of these.
     for (auto Sit = It + 1; Sit != Et; Sit++) {

llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

@@ -3433,7 +3433,7 @@ SDValue DAGTypeLegalizer::WidenVecOp_EXTEND(SDNode *N) {
   // low lanes.
   switch (N->getOpcode()) {
   default:
-    llvm_unreachable("Extend legalization on on extend operation!");
+    llvm_unreachable("Extend legalization on extend operation!");
   case ISD::ANY_EXTEND:
     return DAG.getAnyExtendVectorInReg(InOp, DL, VT);
   case ISD::SIGN_EXTEND:

llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp

@@ -622,7 +622,7 @@ bool HexagonBitSimplify::getUsedBitsInStore(unsigned Opc, BitVector &Bits,
 // operand may be a subregister of a larger register, while Bits would
 // correspond to the larger register in its entirety. Because of that,
 // the parameter Begin can be used to indicate which bit of Bits should be
-// considered the LSB of of the operand.
+// considered the LSB of the operand.
 bool HexagonBitSimplify::getUsedBits(unsigned Opc, unsigned OpN,
       BitVector &Bits, uint16_t Begin, const HexagonInstrInfo &HII) {
   using namespace Hexagon;

llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp

@@ -1170,7 +1170,7 @@ bool HexagonDAGToDAGISel::SelectAnyImmediate(SDValue &N, SDValue &R,
   }
   case HexagonISD::JT:
   case HexagonISD::CP:
-    // These are assumed to always be aligned at at least 8-byte boundary.
+    // These are assumed to always be aligned at least 8-byte boundary.
     if (LogAlign > 3)
       return false;
     R = N.getOperand(0);
@@ -1182,7 +1182,7 @@ bool HexagonDAGToDAGISel::SelectAnyImmediate(SDValue &N, SDValue &R,
     R = N;
     return true;
   case ISD::BlockAddress:
-    // Block address is always aligned at at least 4-byte boundary.
+    // Block address is always aligned at least 4-byte boundary.
     if (LogAlign > 2 || !IsAligned(cast<BlockAddressSDNode>(N)->getOffset()))
       return false;
     R = N;

llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp

@@ -230,7 +230,7 @@ HexagonTargetLowering::createHvxPrefixPred(SDValue PredV, const SDLoc &dl,
     // Move the vector predicate SubV to a vector register, and scale it
     // down to match the representation (bytes per type element) that VecV
     // uses. The scaling down will pick every 2nd or 4th (every Scale-th
-    // in general) element and put them at at the front of the resulting
+    // in general) element and put them at the front of the resulting
     // vector. This subvector will then be inserted into the Q2V of VecV.
     // To avoid having an operation that generates an illegal type (short
     // vector), generate a full size vector.

llvm/lib/Target/Mips/Mips16InstrInfo.td

@@ -1424,7 +1424,7 @@ def : Mips16Pat<(addc  CPU16Regs:$src, immSExt16:$imm),
 // setcc instead and earlier I had implemented setcc first so may have masked
 // the problem. The setcc variants are suboptimal for mips16 so I may wantto
 // figure out how to enable the brcond patterns or else possibly new
-// combinations of of brcond and setcc.
+// combinations of brcond and setcc.
 //
 //
 // bcond-seteq

llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp

@@ -136,7 +136,7 @@ bool WebAssemblyFixIrreducibleControlFlow::VisitLoop(MachineFunction &MF,
   MachineBasicBlock *Header = Loop ? Loop->getHeader() : &*MF.begin();
   SetVector<MachineBasicBlock *> RewriteSuccs;
 
-  // DFS through Loop's body, looking for for irreducible control flow. Loop is
+  // DFS through Loop's body, looking for irreducible control flow. Loop is
   // natural, and we stay in its body, and we treat any nested loops
   // monolithically, so any cycles we encounter indicate irreducibility.
   SmallPtrSet<MachineBasicBlock *, 8> OnStack;

llvm/lib/Target/X86/X86InstrInfo.td

@@ -3066,7 +3066,7 @@ def : InstAlias<"idiv{q}\t{$src, %rax|rax, $src}", (IDIV64m i64mem:$src)>;
 
 
 
-// Various unary fpstack operations default to operating on on ST1.
+// Various unary fpstack operations default to operating on ST1.
 // For example, "fxch" -> "fxch %st(1)"
 def : InstAlias<"faddp",        (ADD_FPrST0  ST1), 0>;
 def:  InstAlias<"fadd",         (ADD_FPrST0  ST1), 0>;

llvm/lib/Transforms/Scalar/LoopPredication.cpp

@@ -558,7 +558,7 @@ bool LoopPredication::widenGuardConditions(IntrinsicInst *Guard,
 
   // The guard condition is expected to be in form of:
   //   cond1 && cond2 && cond3 ...
-  // Iterate over subconditions looking for for icmp conditions which can be
+  // Iterate over subconditions looking for icmp conditions which can be
   // widened across loop iterations. Widening these conditions remember the
   // resulting list of subconditions in Checks vector.
   SmallVector<Value *, 4> Worklist(1, Guard->getOperand(0));

llvm/lib/Transforms/Scalar/SROA.cpp

@@ -797,7 +797,7 @@ private:
     uint64_t Size = DL.getTypeStoreSize(ValOp->getType());
 
     // If this memory access can be shown to *statically* extend outside the
-    // bounds of of the allocation, it's behavior is undefined, so simply
+    // bounds of the allocation, it's behavior is undefined, so simply
     // ignore it. Note that this is more strict than the generic clamping
     // behavior of insertUse. We also try to handle cases which might run the
     // risk of overflow.

llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

@@ -370,7 +370,7 @@ static bool hasIrregularType(Type *Ty, const DataLayout &DL, unsigned VF) {
 
 /// A helper function that returns the reciprocal of the block probability of
 /// predicated blocks. If we return X, we are assuming the predicated block
-/// will execute once for for every X iterations of the loop header.
+/// will execute once for every X iterations of the loop header.
 ///
 /// TODO: We should use actual block probability here, if available. Currently,
 ///       we always assume predicated blocks have a 50% chance of executing.

llvm/test/CodeGen/PowerPC/ppc64-align-long-double.ll

@@ -3,7 +3,7 @@
 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -O2 -fast-isel=false -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-P9 %s
 
 ; Verify internal alignment of long double in a struct.  The double
-; argument comes in in GPR3; GPR4 is skipped; GPRs 5 and 6 contain
+; argument comes in GPR3; GPR4 is skipped; GPRs 5 and 6 contain
 ; the long double.  Check that these are stored to proper locations
 ; in the parameter save area and loaded from there for return in FPR1/2.