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[lldb] Remove usages of case-insensitive c-string functions

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They are not portable (which meant we had a hand-rolled implementation
for windows), and llvm::StringRef provides equivalent functionality.
This commit is contained in:
Pavel Labath 2022-03-21 14:52:22 +01:00
parent f10cee91ae
commit 13a3b0bb4b
11 changed files with 203 additions and 218 deletions
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8
lldb/include/lldb/Host/windows/PosixApi.h
View File

@ -89,14 +89,6 @@ typedef uint32_t pid_t;
// Various useful posix functions that are not present in Windows. We provide
// custom implementations.
int vasprintf(char **ret, const char *fmt, va_list ap);
char *strcasestr(const char *s, const char *find);
#ifdef _MSC_VER
int strcasecmp(const char *s1, const char *s2);
int strncasecmp(const char *s1, const char *s2, size_t n);
#endif // _MSC_VER
// empty functions
inline int posix_openpt(int flag) { LLVM_BUILTIN_UNREACHABLE; }

6
lldb/source/API/SBFrame.cpp
View File

@ -637,9 +637,9 @@ SBValue SBFrame::FindValue(const char *name, ValueType value_type,
for (uint32_t set_idx = 0; set_idx < num_sets; ++set_idx) {
const RegisterSet *reg_set = reg_ctx->GetRegisterSet(set_idx);
if (reg_set &&
((reg_set->name && strcasecmp(reg_set->name, name) == 0) ||
(reg_set->short_name &&
strcasecmp(reg_set->short_name, name) == 0))) {
(llvm::StringRef(reg_set->name).equals_insensitive(name) ||
llvm::StringRef(reg_set->short_name)
.equals_insensitive(name))) {
value_sp =
ValueObjectRegisterSet::Create(frame, reg_ctx, set_idx);
sb_value.SetSP(value_sp);

8
lldb/source/DataFormatters/FormatManager.cpp
View File

@ -89,11 +89,11 @@ static bool GetFormatFromFormatChar(char format_char, Format &format) {
return false;
}
static bool GetFormatFromFormatName(const char *format_name,
static bool GetFormatFromFormatName(llvm::StringRef format_name,
bool partial_match_ok, Format &format) {
uint32_t i;
for (i = 0; i < g_num_format_infos; ++i) {
if (strcasecmp(g_format_infos[i].format_name, format_name) == 0) {
if (format_name.equals_insensitive(g_format_infos[i].format_name)) {
format = g_format_infos[i].format;
return true;
}
@ -101,8 +101,8 @@ static bool GetFormatFromFormatName(const char *format_name,
if (partial_match_ok) {
for (i = 0; i < g_num_format_infos; ++i) {
if (strcasestr(g_format_infos[i].format_name, format_name) ==
g_format_infos[i].format_name) {
if (llvm::StringRef(g_format_infos[i].format_name)
.startswith_insensitive(format_name)) {
format = g_format_infos[i].format;
return true;
}

24
lldb/source/Host/windows/Windows.cpp
View File

@ -44,32 +44,8 @@ int vasprintf(char **ret, const char *fmt, va_list ap) {
return len;
}
char *strcasestr(const char *s, const char *find) {
char c, sc;
size_t len;
if ((c = *find++) != 0) {
c = tolower((unsigned char)c);
len = strlen(find);
do {
do {
if ((sc = *s++) == 0)
return 0;
} while ((char)tolower((unsigned char)sc) != c);
} while (strncasecmp(s, find, len) != 0);
s--;
}
return const_cast<char *>(s);
}
#ifdef _MSC_VER
int strcasecmp(const char *s1, const char *s2) { return stricmp(s1, s2); }
int strncasecmp(const char *s1, const char *s2, size_t n) {
return strnicmp(s1, s2, n);
}
#if _MSC_VER < 1900
namespace lldb_private {
int vsnprintf(char *buffer, size_t count, const char *format, va_list argptr) {

56
lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
View File

@ -13761,35 +13761,33 @@ EmulateInstructionARM::GetThumbOpcodeForInstruction(const uint32_t opcode,
bool EmulateInstructionARM::SetArchitecture(const ArchSpec &arch) {
m_arch = arch;
m_arm_isa = 0;
const char *arch_cstr = arch.GetArchitectureName();
if (arch_cstr) {
if (0 == ::strcasecmp(arch_cstr, "armv4t"))
m_arm_isa = ARMv4T;
else if (0 == ::strcasecmp(arch_cstr, "armv5tej"))
m_arm_isa = ARMv5TEJ;
else if (0 == ::strcasecmp(arch_cstr, "armv5te"))
m_arm_isa = ARMv5TE;
else if (0 == ::strcasecmp(arch_cstr, "armv5t"))
m_arm_isa = ARMv5T;
else if (0 == ::strcasecmp(arch_cstr, "armv6k"))
m_arm_isa = ARMv6K;
else if (0 == ::strcasecmp(arch_cstr, "armv6t2"))
m_arm_isa = ARMv6T2;
else if (0 == ::strcasecmp(arch_cstr, "armv7s"))
m_arm_isa = ARMv7S;
else if (0 == ::strcasecmp(arch_cstr, "arm"))
m_arm_isa = ARMvAll;
else if (0 == ::strcasecmp(arch_cstr, "thumb"))
m_arm_isa = ARMvAll;
else if (0 == ::strncasecmp(arch_cstr, "armv4", 5))
m_arm_isa = ARMv4;
else if (0 == ::strncasecmp(arch_cstr, "armv6", 5))
m_arm_isa = ARMv6;
else if (0 == ::strncasecmp(arch_cstr, "armv7", 5))
m_arm_isa = ARMv7;
else if (0 == ::strncasecmp(arch_cstr, "armv8", 5))
m_arm_isa = ARMv8;
}
llvm::StringRef arch_cstr = arch.GetArchitectureName();
if (arch_cstr.equals_insensitive("armv4t"))
m_arm_isa = ARMv4T;
else if (arch_cstr.equals_insensitive("armv5tej"))
m_arm_isa = ARMv5TEJ;
else if (arch_cstr.equals_insensitive("armv5te"))
m_arm_isa = ARMv5TE;
else if (arch_cstr.equals_insensitive("armv5t"))
m_arm_isa = ARMv5T;
else if (arch_cstr.equals_insensitive("armv6k"))
m_arm_isa = ARMv6K;
else if (arch_cstr.equals_insensitive("armv6t2"))
m_arm_isa = ARMv6T2;
else if (arch_cstr.equals_insensitive("armv7s"))
m_arm_isa = ARMv7S;
else if (arch_cstr.equals_insensitive("arm"))
m_arm_isa = ARMvAll;
else if (arch_cstr.equals_insensitive("thumb"))
m_arm_isa = ARMvAll;
else if (arch_cstr.startswith_insensitive("armv4"))
m_arm_isa = ARMv4;
else if (arch_cstr.startswith_insensitive("armv6"))
m_arm_isa = ARMv6;
else if (arch_cstr.startswith_insensitive("armv7"))
m_arm_isa = ARMv7;
else if (arch_cstr.startswith_insensitive("armv8"))
m_arm_isa = ARMv8;
return m_arm_isa != 0;
}

137
lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
View File

@ -668,7 +668,7 @@ bool EmulateInstructionMIPS::GetRegisterInfo(RegisterKind reg_kind,
}
EmulateInstructionMIPS::MipsOpcode *
EmulateInstructionMIPS::GetOpcodeForInstruction(const char *op_name) {
EmulateInstructionMIPS::GetOpcodeForInstruction(llvm::StringRef name) {
static EmulateInstructionMIPS::MipsOpcode g_opcodes[] = {
// Prologue/Epilogue instructions
{"ADDiu", &EmulateInstructionMIPS::Emulate_ADDiu,
@ -954,13 +954,10 @@ EmulateInstructionMIPS::GetOpcodeForInstruction(const char *op_name) {
{"JALRS_MM", &EmulateInstructionMIPS::Emulate_JALRS, "JALRS rt, rs"},
};
static const size_t k_num_mips_opcodes = llvm::array_lengthof(g_opcodes);
for (size_t i = 0; i < k_num_mips_opcodes; ++i) {
if (!strcasecmp(g_opcodes[i].op_name, op_name))
return &g_opcodes[i];
for (MipsOpcode &opcode : g_opcodes) {
if (name.equals_insensitive(opcode.op_name))
return &opcode;
}
return nullptr;
}
@ -1342,7 +1339,7 @@ bool EmulateInstructionMIPS::Emulate_SUBU_ADDU(llvm::MCInst &insn) {
bool success = false;
uint64_t result;
uint8_t src, dst, rt;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
@ -1363,7 +1360,7 @@ bool EmulateInstructionMIPS::Emulate_SUBU_ADDU(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "SUBU"))
if (op_name.equals_insensitive("SUBU"))
result = src_opd_val - rt_opd_val;
else
result = src_opd_val + rt_opd_val;
@ -1396,7 +1393,7 @@ bool EmulateInstructionMIPS::Emulate_SUBU_ADDU(llvm::MCInst &insn) {
Context context;
if (!strcasecmp(op_name, "SUBU"))
if (op_name.equals_insensitive("SUBU"))
result = src_opd_val - rt_opd_val;
else
result = src_opd_val + rt_opd_val;
@ -1794,7 +1791,7 @@ bool EmulateInstructionMIPS::Emulate_BXX_3ops(llvm::MCInst &insn) {
bool success = false;
uint32_t rs, rt;
int32_t offset, pc, target = 0, rs_val, rt_val;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
@ -1814,12 +1811,13 @@ bool EmulateInstructionMIPS::Emulate_BXX_3ops(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "BEQ") || !strcasecmp(op_name, "BEQL")) {
if (op_name.equals_insensitive("BEQ") || op_name.equals_insensitive("BEQL")) {
if (rs_val == rt_val)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BNE") || !strcasecmp(op_name, "BNEL")) {
} else if (op_name.equals_insensitive("BNE") ||
op_name.equals_insensitive("BNEL")) {
if (rs_val != rt_val)
target = pc + offset;
else
@ -1843,7 +1841,7 @@ bool EmulateInstructionMIPS::Emulate_BXX_3ops_C(llvm::MCInst &insn) {
bool success = false;
uint32_t rs, rt;
int32_t offset, pc, target = 0, rs_val, rt_val;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize();
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
@ -1864,42 +1862,42 @@ bool EmulateInstructionMIPS::Emulate_BXX_3ops_C(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "BEQC")) {
if (op_name.equals_insensitive("BEQC")) {
if (rs_val == rt_val)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BNEC")) {
} else if (op_name.equals_insensitive("BNEC")) {
if (rs_val != rt_val)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BLTC")) {
} else if (op_name.equals_insensitive("BLTC")) {
if (rs_val < rt_val)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BGEC")) {
} else if (op_name.equals_insensitive("BGEC")) {
if (rs_val >= rt_val)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BLTUC")) {
} else if (op_name.equals_insensitive("BLTUC")) {
if (rs_val < rt_val)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BGEUC")) {
} else if (op_name.equals_insensitive("BGEUC")) {
if ((uint32_t)rs_val >= (uint32_t)rt_val)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BOVC")) {
} else if (op_name.equals_insensitive("BOVC")) {
if (IsAdd64bitOverflow(rs_val, rt_val))
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BNVC")) {
} else if (op_name.equals_insensitive("BNVC")) {
if (!IsAdd64bitOverflow(rs_val, rt_val))
target = pc + offset;
else
@ -1923,7 +1921,7 @@ bool EmulateInstructionMIPS::Emulate_Bcond_Link_C(llvm::MCInst &insn) {
uint32_t rs;
int32_t offset, pc, target = 0;
int32_t rs_val;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
@ -1937,32 +1935,32 @@ bool EmulateInstructionMIPS::Emulate_Bcond_Link_C(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "BLEZALC")) {
if (op_name.equals_insensitive("BLEZALC")) {
if (rs_val <= 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BGEZALC")) {
} else if (op_name.equals_insensitive("BGEZALC")) {
if (rs_val >= 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BLTZALC")) {
} else if (op_name.equals_insensitive("BLTZALC")) {
if (rs_val < 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BGTZALC")) {
} else if (op_name.equals_insensitive("BGTZALC")) {
if (rs_val > 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BEQZALC")) {
} else if (op_name.equals_insensitive("BEQZALC")) {
if (rs_val == 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BNEZALC")) {
} else if (op_name.equals_insensitive("BNEZALC")) {
if (rs_val != 0)
target = pc + offset;
else
@ -1992,7 +1990,7 @@ bool EmulateInstructionMIPS::Emulate_Bcond_Link(llvm::MCInst &insn) {
uint32_t rs;
int32_t offset, pc, target = 0;
int32_t rs_val;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
@ -2006,13 +2004,14 @@ bool EmulateInstructionMIPS::Emulate_Bcond_Link(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "BLTZAL") || !strcasecmp(op_name, "BLTZALL")) {
if (op_name.equals_insensitive("BLTZAL") ||
op_name.equals_insensitive("BLTZALL")) {
if ((int32_t)rs_val < 0)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BGEZAL") ||
!strcasecmp(op_name, "BGEZALL")) {
} else if (op_name.equals_insensitive("BGEZAL") ||
op_name.equals_insensitive("BGEZALL")) {
if ((int32_t)rs_val >= 0)
target = pc + offset;
else
@ -2042,7 +2041,7 @@ bool EmulateInstructionMIPS::Emulate_BXX_2ops(llvm::MCInst &insn) {
uint32_t rs;
int32_t offset, pc, target = 0;
int32_t rs_val;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
@ -2056,22 +2055,26 @@ bool EmulateInstructionMIPS::Emulate_BXX_2ops(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "BLTZL") || !strcasecmp(op_name, "BLTZ")) {
if (op_name.equals_insensitive("BLTZL") ||
op_name.equals_insensitive("BLTZ")) {
if (rs_val < 0)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BGEZL") || !strcasecmp(op_name, "BGEZ")) {
} else if (op_name.equals_insensitive("BGEZL") ||
op_name.equals_insensitive("BGEZ")) {
if (rs_val >= 0)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BGTZL") || !strcasecmp(op_name, "BGTZ")) {
} else if (op_name.equals_insensitive("BGTZL") ||
op_name.equals_insensitive("BGTZ")) {
if (rs_val > 0)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BLEZL") || !strcasecmp(op_name, "BLEZ")) {
} else if (op_name.equals_insensitive("BLEZL") ||
op_name.equals_insensitive("BLEZ")) {
if (rs_val <= 0)
target = pc + offset;
else
@ -2095,7 +2098,7 @@ bool EmulateInstructionMIPS::Emulate_BXX_2ops_C(llvm::MCInst &insn) {
uint32_t rs;
int32_t offset, pc, target = 0;
int32_t rs_val;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize();
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
@ -2110,32 +2113,32 @@ bool EmulateInstructionMIPS::Emulate_BXX_2ops_C(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "BLTZC")) {
if (op_name.equals_insensitive("BLTZC")) {
if (rs_val < 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BLEZC")) {
} else if (op_name.equals_insensitive("BLEZC")) {
if (rs_val <= 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BGEZC")) {
} else if (op_name.equals_insensitive("BGEZC")) {
if (rs_val >= 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BGTZC")) {
} else if (op_name.equals_insensitive("BGTZC")) {
if (rs_val > 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BEQZC")) {
} else if (op_name.equals_insensitive("BEQZC")) {
if (rs_val == 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BNEZC")) {
} else if (op_name.equals_insensitive("BNEZC")) {
if (rs_val != 0)
target = pc + offset;
else
@ -2181,7 +2184,7 @@ bool EmulateInstructionMIPS::Emulate_Branch_MM(llvm::MCInst &insn) {
bool success = false;
int32_t target = 0;
uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
bool update_ra = false;
uint32_t ra_offset = 0;
@ -2215,33 +2218,33 @@ bool EmulateInstructionMIPS::Emulate_Branch_MM(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "BEQZ16_MM")) {
if (op_name.equals_insensitive("BEQZ16_MM")) {
if (rs_val == 0)
target = pc + offset;
else
target = pc + current_inst_size +
m_next_inst_size; // Skip delay slot instruction.
} else if (!strcasecmp(op_name, "BNEZ16_MM")) {
} else if (op_name.equals_insensitive("BNEZ16_MM")) {
if (rs_val != 0)
target = pc + offset;
else
target = pc + current_inst_size +
m_next_inst_size; // Skip delay slot instruction.
} else if (!strcasecmp(op_name, "BEQZC_MM")) {
} else if (op_name.equals_insensitive("BEQZC_MM")) {
if (rs_val == 0)
target = pc + 4 + offset;
else
target =
pc +
4; // 32 bit instruction and does not have delay slot instruction.
} else if (!strcasecmp(op_name, "BNEZC_MM")) {
} else if (op_name.equals_insensitive("BNEZC_MM")) {
if (rs_val != 0)
target = pc + 4 + offset;
else
target =
pc +
4; // 32 bit instruction and does not have delay slot instruction.
} else if (!strcasecmp(op_name, "BGEZALS_MM")) {
} else if (op_name.equals_insensitive("BGEZALS_MM")) {
if (rs_val >= 0)
target = pc + offset;
else
@ -2249,7 +2252,7 @@ bool EmulateInstructionMIPS::Emulate_Branch_MM(llvm::MCInst &insn) {
update_ra = true;
ra_offset = 6;
} else if (!strcasecmp(op_name, "BLTZALS_MM")) {
} else if (op_name.equals_insensitive("BLTZALS_MM")) {
if (rs_val >= 0)
target = pc + offset;
else
@ -2281,7 +2284,7 @@ bool EmulateInstructionMIPS::Emulate_Branch_MM(llvm::MCInst &insn) {
bool EmulateInstructionMIPS::Emulate_JALRx16_MM(llvm::MCInst &insn) {
bool success = false;
uint32_t ra_offset = 0;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
uint32_t rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
@ -2295,9 +2298,9 @@ bool EmulateInstructionMIPS::Emulate_JALRx16_MM(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "JALR16_MM"))
if (op_name.equals_insensitive("JALR16_MM"))
ra_offset = 6; // 2-byte instruction with 4-byte delay slot.
else if (!strcasecmp(op_name, "JALRS16_MM"))
else if (op_name.equals_insensitive("JALRS16_MM"))
ra_offset = 4; // 2-byte instruction with 2-byte delay slot.
Context context;
@ -2320,7 +2323,7 @@ bool EmulateInstructionMIPS::Emulate_JALRx16_MM(llvm::MCInst &insn) {
bool EmulateInstructionMIPS::Emulate_JALx(llvm::MCInst &insn) {
bool success = false;
uint32_t offset = 0, target = 0, pc = 0, ra_offset = 0;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
/*
* JALS target
@ -2339,11 +2342,11 @@ bool EmulateInstructionMIPS::Emulate_JALx(llvm::MCInst &insn) {
return false;
// These are PC-region branches and not PC-relative.
if (!strcasecmp(op_name, "JALS_MM")) {
if (op_name.equals_insensitive("JALS_MM")) {
// target address is in the “current” 128 MB-aligned region
target = (pc & 0xF8000000UL) | offset;
ra_offset = 6;
} else if (!strcasecmp(op_name, "JALX_MM")) {
} else if (op_name.equals_insensitive("JALX_MM")) {
// target address is in the “current” 256 MB-aligned region
target = (pc & 0xF0000000UL) | offset;
ra_offset = 8;
@ -2668,7 +2671,7 @@ bool EmulateInstructionMIPS::Emulate_FP_branch(llvm::MCInst &insn) {
bool success = false;
uint32_t cc, fcsr;
int32_t pc, offset, target = 0;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
cc = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
@ -2684,12 +2687,14 @@ bool EmulateInstructionMIPS::Emulate_FP_branch(llvm::MCInst &insn) {
/* fcsr[23], fcsr[25-31] are vaild condition bits */
fcsr = ((fcsr >> 24) & 0xfe) | ((fcsr >> 23) & 0x01);
if (!strcasecmp(op_name, "BC1F") || !strcasecmp(op_name, "BC1FL")) {
if (op_name.equals_insensitive("BC1F") ||
op_name.equals_insensitive("BC1FL")) {
if ((fcsr & (1 << cc)) == 0)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BC1T") || !strcasecmp(op_name, "BC1TL")) {
} else if (op_name.equals_insensitive("BC1T") ||
op_name.equals_insensitive("BC1TL")) {
if ((fcsr & (1 << cc)) != 0)
target = pc + offset;
else
@ -2784,7 +2789,7 @@ bool EmulateInstructionMIPS::Emulate_3D_branch(llvm::MCInst &insn) {
bool success = false;
uint32_t cc, fcsr;
int32_t pc, offset, target = 0;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
cc = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
@ -2801,25 +2806,25 @@ bool EmulateInstructionMIPS::Emulate_3D_branch(llvm::MCInst &insn) {
/* fcsr[23], fcsr[25-31] are vaild condition bits */
fcsr = ((fcsr >> 24) & 0xfe) | ((fcsr >> 23) & 0x01);
if (!strcasecmp(op_name, "BC1ANY2F")) {
if (op_name.equals_insensitive("BC1ANY2F")) {
/* if any one bit is 0 */
if (((fcsr >> cc) & 3) != 3)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BC1ANY2T")) {
} else if (op_name.equals_insensitive("BC1ANY2T")) {
/* if any one bit is 1 */
if (((fcsr >> cc) & 3) != 0)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BC1ANY4F")) {
} else if (op_name.equals_insensitive("BC1ANY4F")) {
/* if any one bit is 0 */
if (((fcsr >> cc) & 0xf) != 0xf)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BC1ANY4T")) {
} else if (op_name.equals_insensitive("BC1ANY4T")) {
/* if any one bit is 1 */
if (((fcsr >> cc) & 0xf) != 0)
target = pc + offset;

2
lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.h
View File

@ -93,7 +93,7 @@ protected:
const char *insn_name;
} MipsOpcode;
static MipsOpcode *GetOpcodeForInstruction(const char *op_name);
static MipsOpcode *GetOpcodeForInstruction(llvm::StringRef name);
uint32_t GetSizeOfInstruction(lldb_private::DataExtractor &data,
uint64_t inst_addr);

142
lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
View File

@ -655,7 +655,7 @@ bool EmulateInstructionMIPS64::GetRegisterInfo(RegisterKind reg_kind,
}
EmulateInstructionMIPS64::MipsOpcode *
EmulateInstructionMIPS64::GetOpcodeForInstruction(const char *op_name) {
EmulateInstructionMIPS64::GetOpcodeForInstruction(llvm::StringRef op_name) {
static EmulateInstructionMIPS64::MipsOpcode g_opcodes[] = {
// Prologue/Epilogue instructions
{"DADDiu", &EmulateInstructionMIPS64::Emulate_DADDiu,
@ -919,13 +919,10 @@ EmulateInstructionMIPS64::GetOpcodeForInstruction(const char *op_name) {
{"BZ_V", &EmulateInstructionMIPS64::Emulate_BZV, "BZ.V wt,s16"},
};
static const size_t k_num_mips_opcodes = llvm::array_lengthof(g_opcodes);
for (size_t i = 0; i < k_num_mips_opcodes; ++i) {
if (!strcasecmp(g_opcodes[i].op_name, op_name))
return &g_opcodes[i];
for (MipsOpcode &opcode : g_opcodes) {
if (op_name.equals_insensitive(opcode.op_name))
return &opcode;
}
return nullptr;
}
@ -967,10 +964,7 @@ bool EmulateInstructionMIPS64::EvaluateInstruction(uint32_t evaluate_options) {
* mc_insn.getOpcode() returns decoded opcode. However to make use
* of llvm::Mips::<insn> we would need "MipsGenInstrInfo.inc".
*/
const char *op_name = m_insn_info->getName(mc_insn.getOpcode()).data();
if (op_name == nullptr)
return false;
llvm::StringRef op_name = m_insn_info->getName(mc_insn.getOpcode());
/*
* Decoding has been done already. Just get the call-back function
@ -1256,7 +1250,7 @@ bool EmulateInstructionMIPS64::Emulate_DSUBU_DADDU(llvm::MCInst &insn) {
bool success = false;
uint64_t result;
uint8_t src, dst, rt;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
@ -1277,7 +1271,8 @@ bool EmulateInstructionMIPS64::Emulate_DSUBU_DADDU(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "DSUBU") || !strcasecmp(op_name, "SUBU"))
if (op_name.equals_insensitive("DSUBU") ||
op_name.equals_insensitive("SUBU"))
result = src_opd_val - rt_opd_val;
else
result = src_opd_val + rt_opd_val;
@ -1310,7 +1305,8 @@ bool EmulateInstructionMIPS64::Emulate_DSUBU_DADDU(llvm::MCInst &insn) {
Context context;
if (!strcasecmp(op_name, "DSUBU") || !strcasecmp(op_name, "SUBU"))
if (op_name.equals_insensitive("DSUBU") ||
op_name.equals_insensitive("SUBU"))
result = src_opd_val - rt_opd_val;
else
result = src_opd_val + rt_opd_val;
@ -1335,7 +1331,7 @@ bool EmulateInstructionMIPS64::Emulate_BXX_3ops(llvm::MCInst &insn) {
bool success = false;
uint32_t rs, rt;
int64_t offset, pc, rs_val, rt_val, target = 0;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
@ -1355,14 +1351,15 @@ bool EmulateInstructionMIPS64::Emulate_BXX_3ops(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "BEQ") || !strcasecmp(op_name, "BEQL")
|| !strcasecmp(op_name, "BEQ64") ) {
if (op_name.equals_insensitive("BEQ") || op_name.equals_insensitive("BEQL") ||
op_name.equals_insensitive("BEQ64")) {
if (rs_val == rt_val)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BNE") || !strcasecmp(op_name, "BNEL")
|| !strcasecmp(op_name, "BNE64")) {
} else if (op_name.equals_insensitive("BNE") ||
op_name.equals_insensitive("BNEL") ||
op_name.equals_insensitive("BNE64")) {
if (rs_val != rt_val)
target = pc + offset;
else
@ -1387,7 +1384,7 @@ bool EmulateInstructionMIPS64::Emulate_Bcond_Link(llvm::MCInst &insn) {
uint32_t rs;
int64_t offset, pc, target = 0;
int64_t rs_val;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
@ -1401,13 +1398,14 @@ bool EmulateInstructionMIPS64::Emulate_Bcond_Link(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "BLTZAL") || !strcasecmp(op_name, "BLTZALL")) {
if (op_name.equals_insensitive("BLTZAL") ||
op_name.equals_insensitive("BLTZALL")) {
if (rs_val < 0)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BGEZAL") ||
!strcasecmp(op_name, "BGEZALL")) {
} else if (op_name.equals_insensitive("BGEZAL") ||
op_name.equals_insensitive("BGEZALL")) {
if (rs_val >= 0)
target = pc + offset;
else
@ -1497,7 +1495,7 @@ bool EmulateInstructionMIPS64::Emulate_Bcond_Link_C(llvm::MCInst &insn) {
bool success = false;
uint32_t rs;
int64_t offset, pc, rs_val, target = 0;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
@ -1511,32 +1509,32 @@ bool EmulateInstructionMIPS64::Emulate_Bcond_Link_C(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "BLEZALC")) {
if (op_name.equals_insensitive("BLEZALC")) {
if (rs_val <= 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BGEZALC")) {
} else if (op_name.equals_insensitive("BGEZALC")) {
if (rs_val >= 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BLTZALC")) {
} else if (op_name.equals_insensitive("BLTZALC")) {
if (rs_val < 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BGTZALC")) {
} else if (op_name.equals_insensitive("BGTZALC")) {
if (rs_val > 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BEQZALC")) {
} else if (op_name.equals_insensitive("BEQZALC")) {
if (rs_val == 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BNEZALC")) {
} else if (op_name.equals_insensitive("BNEZALC")) {
if (rs_val != 0)
target = pc + offset;
else
@ -1565,7 +1563,7 @@ bool EmulateInstructionMIPS64::Emulate_BXX_2ops(llvm::MCInst &insn) {
bool success = false;
uint32_t rs;
int64_t offset, pc, rs_val, target = 0;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
@ -1579,26 +1577,30 @@ bool EmulateInstructionMIPS64::Emulate_BXX_2ops(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "BLTZL") || !strcasecmp(op_name, "BLTZ")
|| !strcasecmp(op_name, "BLTZ64")) {
if (op_name.equals_insensitive("BLTZL") ||
op_name.equals_insensitive("BLTZ") ||
op_name.equals_insensitive("BLTZ64")) {
if (rs_val < 0)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BGEZL") || !strcasecmp(op_name, "BGEZ")
|| !strcasecmp(op_name, "BGEZ64")) {
} else if (op_name.equals_insensitive("BGEZL") ||
op_name.equals_insensitive("BGEZ") ||
op_name.equals_insensitive("BGEZ64")) {
if (rs_val >= 0)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BGTZL") || !strcasecmp(op_name, "BGTZ")
|| !strcasecmp(op_name, "BGTZ64")) {
} else if (op_name.equals_insensitive("BGTZL") ||
op_name.equals_insensitive("BGTZ") ||
op_name.equals_insensitive("BGTZ64")) {
if (rs_val > 0)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BLEZL") || !strcasecmp(op_name, "BLEZ")
|| !strcasecmp(op_name, "BLEZ64")) {
} else if (op_name.equals_insensitive("BLEZL") ||
op_name.equals_insensitive("BLEZ") ||
op_name.equals_insensitive("BLEZ64")) {
if (rs_val <= 0)
target = pc + offset;
else
@ -1650,7 +1652,7 @@ bool EmulateInstructionMIPS64::Emulate_BXX_3ops_C(llvm::MCInst &insn) {
bool success = false;
uint32_t rs, rt;
int64_t offset, pc, rs_val, rt_val, target = 0;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize();
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
@ -1671,42 +1673,48 @@ bool EmulateInstructionMIPS64::Emulate_BXX_3ops_C(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "BEQC") || !strcasecmp(op_name, "BEQC64")) {
if (op_name.equals_insensitive("BEQC") ||
op_name.equals_insensitive("BEQC64")) {
if (rs_val == rt_val)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BNEC") || !strcasecmp(op_name, "BNEC64")) {
} else if (op_name.equals_insensitive("BNEC") ||
op_name.equals_insensitive("BNEC64")) {
if (rs_val != rt_val)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BLTC") || !strcasecmp(op_name, "BLTC64")) {
} else if (op_name.equals_insensitive("BLTC") ||
op_name.equals_insensitive("BLTC64")) {
if (rs_val < rt_val)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BGEC64") || !strcasecmp(op_name, "BGEC")) {
} else if (op_name.equals_insensitive("BGEC64") ||
op_name.equals_insensitive("BGEC")) {
if (rs_val >= rt_val)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BLTUC") || !strcasecmp(op_name, "BLTUC64")) {
} else if (op_name.equals_insensitive("BLTUC") ||
op_name.equals_insensitive("BLTUC64")) {
if (rs_val < rt_val)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BGEUC") || !strcasecmp(op_name, "BGEUC64")) {
} else if (op_name.equals_insensitive("BGEUC") ||
op_name.equals_insensitive("BGEUC64")) {
if ((uint32_t)rs_val >= (uint32_t)rt_val)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BOVC")) {
} else if (op_name.equals_insensitive("BOVC")) {
if (IsAdd64bitOverflow(rs_val, rt_val))
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BNVC")) {
} else if (op_name.equals_insensitive("BNVC")) {
if (!IsAdd64bitOverflow(rs_val, rt_val))
target = pc + offset;
else
@ -1730,7 +1738,7 @@ bool EmulateInstructionMIPS64::Emulate_BXX_2ops_C(llvm::MCInst &insn) {
uint32_t rs;
int64_t offset, pc, target = 0;
int64_t rs_val;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize();
rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
@ -1745,32 +1753,38 @@ bool EmulateInstructionMIPS64::Emulate_BXX_2ops_C(llvm::MCInst &insn) {
if (!success)
return false;
if (!strcasecmp(op_name, "BLTZC") || !strcasecmp(op_name, "BLTZC64")) {
if (op_name.equals_insensitive("BLTZC") ||
op_name.equals_insensitive("BLTZC64")) {
if (rs_val < 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BLEZC") || !strcasecmp(op_name, "BLEZC64")) {
} else if (op_name.equals_insensitive("BLEZC") ||
op_name.equals_insensitive("BLEZC64")) {
if (rs_val <= 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BGEZC") || !strcasecmp(op_name, "BGEZC64")) {
} else if (op_name.equals_insensitive("BGEZC") ||
op_name.equals_insensitive("BGEZC64")) {
if (rs_val >= 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BGTZC") || !strcasecmp(op_name, "BGTZC64")) {
} else if (op_name.equals_insensitive("BGTZC") ||
op_name.equals_insensitive("BGTZC64")) {
if (rs_val > 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BEQZC") || !strcasecmp(op_name, "BEQZC64")) {
} else if (op_name.equals_insensitive("BEQZC") ||
op_name.equals_insensitive("BEQZC64")) {
if (rs_val == 0)
target = pc + offset;
else
target = pc + 4;
} else if (!strcasecmp(op_name, "BNEZC") || !strcasecmp(op_name, "BNEZC64")) {
} else if (op_name.equals_insensitive("BNEZC") ||
op_name.equals_insensitive("BNEZC64")) {
if (rs_val != 0)
target = pc + offset;
else
@ -1970,7 +1984,7 @@ bool EmulateInstructionMIPS64::Emulate_FP_branch(llvm::MCInst &insn) {
bool success = false;
uint32_t cc, fcsr;
int64_t pc, offset, target = 0;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
/*
* BC1F cc, offset
@ -1994,12 +2008,14 @@ bool EmulateInstructionMIPS64::Emulate_FP_branch(llvm::MCInst &insn) {
/* fcsr[23], fcsr[25-31] are vaild condition bits */
fcsr = ((fcsr >> 24) & 0xfe) | ((fcsr >> 23) & 0x01);
if (!strcasecmp(op_name, "BC1F") || !strcasecmp(op_name, "BC1FL")) {
if (op_name.equals_insensitive("BC1F") ||
op_name.equals_insensitive("BC1FL")) {
if ((fcsr & (1 << cc)) == 0)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BC1T") || !strcasecmp(op_name, "BC1TL")) {
} else if (op_name.equals_insensitive("BC1T") ||
op_name.equals_insensitive("BC1TL")) {
if ((fcsr & (1 << cc)) != 0)
target = pc + offset;
else
@ -2095,7 +2111,7 @@ bool EmulateInstructionMIPS64::Emulate_3D_branch(llvm::MCInst &insn) {
bool success = false;
uint32_t cc, fcsr;
int64_t pc, offset, target = 0;
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
llvm::StringRef op_name = m_insn_info->getName(insn.getOpcode());
cc = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
@ -2112,25 +2128,25 @@ bool EmulateInstructionMIPS64::Emulate_3D_branch(llvm::MCInst &insn) {
/* fcsr[23], fcsr[25-31] are vaild condition bits */
fcsr = ((fcsr >> 24) & 0xfe) | ((fcsr >> 23) & 0x01);
if (!strcasecmp(op_name, "BC1ANY2F")) {
if (op_name.equals_insensitive("BC1ANY2F")) {
/* if any one bit is 0 */
if (((fcsr >> cc) & 3) != 3)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BC1ANY2T")) {
} else if (op_name.equals_insensitive("BC1ANY2T")) {
/* if any one bit is 1 */
if (((fcsr >> cc) & 3) != 0)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BC1ANY4F")) {
} else if (op_name.equals_insensitive("BC1ANY4F")) {
/* if any one bit is 0 */
if (((fcsr >> cc) & 0xf) != 0xf)
target = pc + offset;
else
target = pc + 8;
} else if (!strcasecmp(op_name, "BC1ANY4T")) {
} else if (op_name.equals_insensitive("BC1ANY4T")) {
/* if any one bit is 1 */
if (((fcsr >> cc) & 0xf) != 0)
target = pc + offset;

2
lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h
View File

@ -85,7 +85,7 @@ protected:
const char *insn_name;
} MipsOpcode;
static MipsOpcode *GetOpcodeForInstruction(const char *op_name);
static MipsOpcode *GetOpcodeForInstruction(llvm::StringRef op_name);
bool Emulate_DADDiu(llvm::MCInst &insn);

4
lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
View File

@ -85,8 +85,8 @@ FileSpecList PlatformDarwin::LocateExecutableScriptingResources(
if (objfile) {
FileSpec symfile_spec(objfile->GetFileSpec());
if (symfile_spec &&
strcasestr(symfile_spec.GetPath().c_str(),
".dSYM/Contents/Resources/DWARF") != nullptr &&
llvm::StringRef(symfile_spec.GetPath())
.contains_insensitive(".dSYM/Contents/Resources/DWARF") &&
FileSystem::Instance().Exists(symfile_spec)) {
while (module_spec.GetFilename()) {
std::string module_basename(

32
lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
View File

@ -566,23 +566,21 @@ uint32_t SymbolFileDWARF::CalculateAbilities() {
if (section)
debug_line_file_size = section->GetFileSize();
} else {
const char *symfile_dir_cstr =
m_objfile_sp->GetFileSpec().GetDirectory().GetCString();
if (symfile_dir_cstr) {
if (strcasestr(symfile_dir_cstr, ".dsym")) {
if (m_objfile_sp->GetType() == ObjectFile::eTypeDebugInfo) {
// We have a dSYM file that didn't have a any debug info. If the
// string table has a size of 1, then it was made from an
// executable with no debug info, or from an executable that was
// stripped.
section =
section_list->FindSectionByType(eSectionTypeDWARFDebugStr, true)
.get();
if (section && section->GetFileSize() == 1) {
m_objfile_sp->GetModule()->ReportWarning(
"empty dSYM file detected, dSYM was created with an "
"executable with no debug info.");
}
llvm::StringRef symfile_dir =
m_objfile_sp->GetFileSpec().GetDirectory().GetStringRef();
if (symfile_dir.contains_insensitive(".dsym")) {
if (m_objfile_sp->GetType() == ObjectFile::eTypeDebugInfo) {
// We have a dSYM file that didn't have a any debug info. If the
// string table has a size of 1, then it was made from an
// executable with no debug info, or from an executable that was
// stripped.
section =
section_list->FindSectionByType(eSectionTypeDWARFDebugStr, true)
.get();
if (section && section->GetFileSize() == 1) {
m_objfile_sp->GetModule()->ReportWarning(
"empty dSYM file detected, dSYM was created with an "
"executable with no debug info.");
}
}
}