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integer/add_sat: Use clang builtin instead of llvm asm
reviewer: Tom Stellard Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> llvm-svn: 314702
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@ -64,8 +64,6 @@ geometric/normalize.cl
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integer/abs.cl
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integer/abs_diff.cl
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integer/add_sat.cl
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integer/add_sat_if.ll
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integer/add_sat_impl.ll
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integer/clz.cl
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integer/hadd.cl
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integer/mad24.cl
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@ -12,35 +12,55 @@ _CLC_DECL long __clc_add_sat_s64(long, long);
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_CLC_DECL ulong __clc_add_sat_u64(ulong, ulong);
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_CLC_OVERLOAD _CLC_DEF char add_sat(char x, char y) {
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return __clc_add_sat_s8(x, y);
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short r = x + y;
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return convert_char_sat(r);
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}
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_CLC_OVERLOAD _CLC_DEF uchar add_sat(uchar x, uchar y) {
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return __clc_add_sat_u8(x, y);
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ushort r = x + y;
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return convert_uchar_sat(r);
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}
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_CLC_OVERLOAD _CLC_DEF short add_sat(short x, short y) {
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return __clc_add_sat_s16(x, y);
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int r = x + y;
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return convert_short_sat(r);
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}
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_CLC_OVERLOAD _CLC_DEF ushort add_sat(ushort x, ushort y) {
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return __clc_add_sat_u16(x, y);
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uint r = x + y;
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return convert_ushort_sat(r);
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}
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_CLC_OVERLOAD _CLC_DEF int add_sat(int x, int y) {
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return __clc_add_sat_s32(x, y);
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int r;
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if (__builtin_sadd_overflow(x, y, &r))
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// The oveflow can only occur if both are pos or both are neg,
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// thus we only need to check one operand
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return x > 0 ? INT_MAX : INT_MIN;
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return r;
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}
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_CLC_OVERLOAD _CLC_DEF uint add_sat(uint x, uint y) {
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return __clc_add_sat_u32(x, y);
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uint r;
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if (__builtin_uadd_overflow(x, y, &r))
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return UINT_MAX;
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return r;
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}
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_CLC_OVERLOAD _CLC_DEF long add_sat(long x, long y) {
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return __clc_add_sat_s64(x, y);
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long r;
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if (__builtin_saddl_overflow(x, y, &r))
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// The oveflow can only occur if both are pos or both are neg,
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// thus we only need to check one operand
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return x > 0 ? LONG_MAX : LONG_MIN;
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return r;
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}
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_CLC_OVERLOAD _CLC_DEF ulong add_sat(ulong x, ulong y) {
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return __clc_add_sat_u64(x, y);
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ulong r;
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if (__builtin_uaddl_overflow(x, y, &r))
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return ULONG_MAX;
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return r;
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}
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_CLC_BINARY_VECTORIZE(_CLC_OVERLOAD _CLC_DEF, char, add_sat, char, char)
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@ -1,55 +0,0 @@
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declare i8 @__clc_add_sat_impl_s8(i8 %x, i8 %y)
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define i8 @__clc_add_sat_s8(i8 %x, i8 %y) nounwind readnone alwaysinline {
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%call = call i8 @__clc_add_sat_impl_s8(i8 %x, i8 %y)
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ret i8 %call
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}
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declare i8 @__clc_add_sat_impl_u8(i8 %x, i8 %y)
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define i8 @__clc_add_sat_u8(i8 %x, i8 %y) nounwind readnone alwaysinline {
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%call = call i8 @__clc_add_sat_impl_u8(i8 %x, i8 %y)
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ret i8 %call
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}
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declare i16 @__clc_add_sat_impl_s16(i16 %x, i16 %y)
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define i16 @__clc_add_sat_s16(i16 %x, i16 %y) nounwind readnone alwaysinline {
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%call = call i16 @__clc_add_sat_impl_s16(i16 %x, i16 %y)
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ret i16 %call
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}
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declare i16 @__clc_add_sat_impl_u16(i16 %x, i16 %y)
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define i16 @__clc_add_sat_u16(i16 %x, i16 %y) nounwind readnone alwaysinline {
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%call = call i16 @__clc_add_sat_impl_u16(i16 %x, i16 %y)
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ret i16 %call
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}
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declare i32 @__clc_add_sat_impl_s32(i32 %x, i32 %y)
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define i32 @__clc_add_sat_s32(i32 %x, i32 %y) nounwind readnone alwaysinline {
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%call = call i32 @__clc_add_sat_impl_s32(i32 %x, i32 %y)
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ret i32 %call
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}
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declare i32 @__clc_add_sat_impl_u32(i32 %x, i32 %y)
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define i32 @__clc_add_sat_u32(i32 %x, i32 %y) nounwind readnone alwaysinline {
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%call = call i32 @__clc_add_sat_impl_u32(i32 %x, i32 %y)
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ret i32 %call
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}
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declare i64 @__clc_add_sat_impl_s64(i64 %x, i64 %y)
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define i64 @__clc_add_sat_s64(i64 %x, i64 %y) nounwind readnone alwaysinline {
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%call = call i64 @__clc_add_sat_impl_s64(i64 %x, i64 %y)
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ret i64 %call
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}
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declare i64 @__clc_add_sat_impl_u64(i64 %x, i64 %y)
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define i64 @__clc_add_sat_u64(i64 %x, i64 %y) nounwind readnone alwaysinline {
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%call = call i64 @__clc_add_sat_impl_u64(i64 %x, i64 %y)
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ret i64 %call
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}
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@ -1,83 +0,0 @@
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declare {i8, i1} @llvm.sadd.with.overflow.i8(i8, i8)
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declare {i8, i1} @llvm.uadd.with.overflow.i8(i8, i8)
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define i8 @__clc_add_sat_impl_s8(i8 %x, i8 %y) nounwind readnone alwaysinline {
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%call = call {i8, i1} @llvm.sadd.with.overflow.i8(i8 %x, i8 %y)
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%res = extractvalue {i8, i1} %call, 0
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%over = extractvalue {i8, i1} %call, 1
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%x.msb = ashr i8 %x, 7
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%x.limit = xor i8 %x.msb, 127
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%sat = select i1 %over, i8 %x.limit, i8 %res
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ret i8 %sat
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}
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define i8 @__clc_add_sat_impl_u8(i8 %x, i8 %y) nounwind readnone alwaysinline {
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%call = call {i8, i1} @llvm.uadd.with.overflow.i8(i8 %x, i8 %y)
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%res = extractvalue {i8, i1} %call, 0
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%over = extractvalue {i8, i1} %call, 1
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%sat = select i1 %over, i8 -1, i8 %res
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ret i8 %sat
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}
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declare {i16, i1} @llvm.sadd.with.overflow.i16(i16, i16)
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declare {i16, i1} @llvm.uadd.with.overflow.i16(i16, i16)
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define i16 @__clc_add_sat_impl_s16(i16 %x, i16 %y) nounwind readnone alwaysinline {
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%call = call {i16, i1} @llvm.sadd.with.overflow.i16(i16 %x, i16 %y)
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%res = extractvalue {i16, i1} %call, 0
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%over = extractvalue {i16, i1} %call, 1
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%x.msb = ashr i16 %x, 15
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%x.limit = xor i16 %x.msb, 32767
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%sat = select i1 %over, i16 %x.limit, i16 %res
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ret i16 %sat
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}
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define i16 @__clc_add_sat_impl_u16(i16 %x, i16 %y) nounwind readnone alwaysinline {
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%call = call {i16, i1} @llvm.uadd.with.overflow.i16(i16 %x, i16 %y)
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%res = extractvalue {i16, i1} %call, 0
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%over = extractvalue {i16, i1} %call, 1
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%sat = select i1 %over, i16 -1, i16 %res
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ret i16 %sat
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}
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declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32)
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declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32)
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define i32 @__clc_add_sat_impl_s32(i32 %x, i32 %y) nounwind readnone alwaysinline {
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%call = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %x, i32 %y)
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%res = extractvalue {i32, i1} %call, 0
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%over = extractvalue {i32, i1} %call, 1
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%x.msb = ashr i32 %x, 31
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%x.limit = xor i32 %x.msb, 2147483647
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%sat = select i1 %over, i32 %x.limit, i32 %res
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ret i32 %sat
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}
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define i32 @__clc_add_sat_impl_u32(i32 %x, i32 %y) nounwind readnone alwaysinline {
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%call = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %x, i32 %y)
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%res = extractvalue {i32, i1} %call, 0
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%over = extractvalue {i32, i1} %call, 1
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%sat = select i1 %over, i32 -1, i32 %res
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ret i32 %sat
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}
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declare {i64, i1} @llvm.sadd.with.overflow.i64(i64, i64)
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declare {i64, i1} @llvm.uadd.with.overflow.i64(i64, i64)
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define i64 @__clc_add_sat_impl_s64(i64 %x, i64 %y) nounwind readnone alwaysinline {
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%call = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %x, i64 %y)
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%res = extractvalue {i64, i1} %call, 0
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%over = extractvalue {i64, i1} %call, 1
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%x.msb = ashr i64 %x, 63
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%x.limit = xor i64 %x.msb, 9223372036854775807
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%sat = select i1 %over, i64 %x.limit, i64 %res
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ret i64 %sat
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}
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define i64 @__clc_add_sat_impl_u64(i64 %x, i64 %y) nounwind readnone alwaysinline {
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%call = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %x, i64 %y)
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%res = extractvalue {i64, i1} %call, 0
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%over = extractvalue {i64, i1} %call, 1
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%sat = select i1 %over, i64 -1, i64 %res
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ret i64 %sat
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}
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@ -1,2 +1 @@
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integer/add_sat_if.ll
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integer/sub_sat_if.ll
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@ -1,2 +1 @@
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integer/add_sat.ll
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integer/sub_sat.ll
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integer/sub_sat.ll
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@ -1,55 +0,0 @@
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declare i8 @__clc_add_sat_impl_s8(i8 %x, i8 %y)
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define ptx_device i8 @__clc_add_sat_s8(i8 %x, i8 %y) nounwind readnone alwaysinline {
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%call = call i8 @__clc_add_sat_impl_s8(i8 %x, i8 %y)
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ret i8 %call
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}
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declare i8 @__clc_add_sat_impl_u8(i8 %x, i8 %y)
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define ptx_device i8 @__clc_add_sat_u8(i8 %x, i8 %y) nounwind readnone alwaysinline {
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%call = call i8 @__clc_add_sat_impl_u8(i8 %x, i8 %y)
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ret i8 %call
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}
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declare i16 @__clc_add_sat_impl_s16(i16 %x, i16 %y)
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define ptx_device i16 @__clc_add_sat_s16(i16 %x, i16 %y) nounwind readnone alwaysinline {
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%call = call i16 @__clc_add_sat_impl_s16(i16 %x, i16 %y)
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ret i16 %call
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}
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declare i16 @__clc_add_sat_impl_u16(i16 %x, i16 %y)
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define ptx_device i16 @__clc_add_sat_u16(i16 %x, i16 %y) nounwind readnone alwaysinline {
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%call = call i16 @__clc_add_sat_impl_u16(i16 %x, i16 %y)
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ret i16 %call
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}
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declare i32 @__clc_add_sat_impl_s32(i32 %x, i32 %y)
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define ptx_device i32 @__clc_add_sat_s32(i32 %x, i32 %y) nounwind readnone alwaysinline {
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%call = call i32 @__clc_add_sat_impl_s32(i32 %x, i32 %y)
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ret i32 %call
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}
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declare i32 @__clc_add_sat_impl_u32(i32 %x, i32 %y)
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define ptx_device i32 @__clc_add_sat_u32(i32 %x, i32 %y) nounwind readnone alwaysinline {
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%call = call i32 @__clc_add_sat_impl_u32(i32 %x, i32 %y)
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ret i32 %call
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}
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declare i64 @__clc_add_sat_impl_s64(i64 %x, i64 %y)
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define ptx_device i64 @__clc_add_sat_s64(i64 %x, i64 %y) nounwind readnone alwaysinline {
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%call = call i64 @__clc_add_sat_impl_s64(i64 %x, i64 %y)
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ret i64 %call
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}
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declare i64 @__clc_add_sat_impl_u64(i64 %x, i64 %y)
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define ptx_device i64 @__clc_add_sat_u64(i64 %x, i64 %y) nounwind readnone alwaysinline {
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%call = call i64 @__clc_add_sat_impl_u64(i64 %x, i64 %y)
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ret i64 %call
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}
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