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Revert "[x86][inline-asm][clang] accept 'v' constraint"
This reverts commit r283716. Breaks buildbot: http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_check/9155/testReport/junit/Clang/CodeGen/x86_inline_asm_v_constraint_c/ llvm-svn: 283743
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@ -4005,7 +4005,6 @@ X86TargetInfo::validateAsmConstraint(const char *&Name,
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case 'u': // Second from top of floating point stack.
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case 'q': // Any register accessible as [r]l: a, b, c, and d.
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case 'y': // Any MMX register.
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case 'v': // Any {X,Y,Z}MM register (Arch & context dependent)
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case 'x': // Any SSE register.
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case 'Q': // Any register accessible as [r]h: a, b, c, and d.
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case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
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@ -4046,7 +4045,6 @@ bool X86TargetInfo::validateOperandSize(StringRef Constraint,
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case 't':
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case 'u':
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return Size <= 128;
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case 'v':
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case 'x':
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if (SSELevel >= AVX512F)
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// 512-bit zmm registers can be used if target supports AVX512F.
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@ -1,30 +0,0 @@
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// RUN: %clang_cc1 %s -triple x86_64-unknown-linux-gnu -emit-llvm -target-cpu x86-64 -o - | FileCheck %s --check-prefix SSE
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// RUN: %clang_cc1 %s -triple x86_64-unknown-linux-gnu -emit-llvm -target-cpu skylake -D AVX -o - | FileCheck %s --check-prefixes AVX,SSE
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// RUN: %clang_cc1 %s -triple x86_64-unknown-linux-gnu -emit-llvm -target-cpu skylake-avx512 -D AVX512 -D AVX -o - | FileCheck %s --check-prefixes AVX512,AVX,SSE
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// RUN: %clang_cc1 %s -triple x86_64-unknown-linux-gnu -emit-llvm -target-cpu knl -D AVX -D AVX512 -o - | FileCheck %s --check-prefixes AVX512,AVX,SSE
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typedef float __m128 __attribute__ ((vector_size (16)));
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typedef float __m256 __attribute__ ((vector_size (32)));
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typedef float __m512 __attribute__ ((vector_size (64)));
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// SSE: call <4 x float> asm "vmovhlps $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(i64 %0, <4 x float> %1)
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__m128 testXMM(__m128 _xmm0, long _l) {
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__asm__("vmovhlps %1, %2, %0" :"=v"(_xmm0) : "v"(_l), "v"(_xmm0));
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return _xmm0;
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}
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// AVX: call <8 x float> asm "vmovsldup $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %0)
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__m256 testYMM(__m256 _ymm0) {
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#ifdef AVX
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__asm__("vmovsldup %1, %0" :"=v"(_ymm0) : "v"(_ymm0));
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#endif
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return _ymm0;
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}
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// AVX512: call <16 x float> asm "vpternlogd $$0, $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %0, <16 x float> %1)
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__m512 testZMM(__m512 _zmm0, __m512 _zmm1) {
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#ifdef AVX512
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__asm__("vpternlogd $0, %1, %2, %0" :"=v"(_zmm0) : "v"(_zmm1), "v"(_zmm0));
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#endif
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return _zmm0;
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}
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