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Update atomic Design A spec
llvm-svn: 116707
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@ -36,21 +36,34 @@
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<!--*********************************************************************-->
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<p>
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This is more of a synopsis than a true description. The compiler supplies all
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of the intrinsics as described below. This list of intrinsics roughly parallels
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the requirements of the C and C++ atomics proposals. The C and C++ library
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imlpementations simply drop through to these intrinsics. Anything the platform
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does not support in hardware, the compiler arranges for a (compiler-rt) library
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call to be made which will do the job with a mutex, and in this case ignoring
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the memory ordering parameter.
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The compiler supplies all of the intrinsics as described below. This list of
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intrinsics roughly parallels the requirements of the C and C++ atomics
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proposals. The C and C++ library imlpementations simply drop through to these
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intrinsics. Anything the platform does not support in hardware, the compiler
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arranges for a (compiler-rt) library call to be made which will do the job with
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a mutex, and in this case ignoring the memory ordering parameter (effectively
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implementing <tt>memory_order_seq_cst</tt>).
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</p>
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<p>
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Ultimate efficiency is preferred over run time error checking. Undefined
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behavior is acceptable when the inputs do not conform as defined below.
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</p>
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<blockquote><pre>
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<font color="#C80000">// In every intrinsic signature below, type* atomic_obj may be a pointer to a</font>
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<font color="#C80000">// volatile-qualifed type.</font>
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<font color="#C80000">// Memory ordering values map to the following meanings:</font>
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<font color="#C80000">// memory_order_relaxed == 0</font>
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<font color="#C80000">// memory_order_consume == 1</font>
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<font color="#C80000">// memory_order_acquire == 2</font>
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<font color="#C80000">// memory_order_release == 3</font>
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<font color="#C80000">// memory_order_acq_rel == 4</font>
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<font color="#C80000">// memory_order_seq_cst == 5</font>
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<font color="#C80000">// type must be trivially copyable</font>
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bool __atomic_is_lock_free(const type* atomic_obj);
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<font color="#C80000">// type represents a "type argument"</font>
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bool __atomic_is_lock_free(type);
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<font color="#C80000">// type must be trivially copyable</font>
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<font color="#C80000">// Behavior is defined for mem_ord = 0, 1, 2, 5</font>
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@ -67,6 +80,8 @@ type __atomic_exchange(type* atomic_obj, type desired, int mem_ord);
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<font color="#C80000">// type must be trivially copyable</font>
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<font color="#C80000">// Behavior is defined for mem_success = [0 ... 5],</font>
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<font color="#C80000">// mem_falure <= mem_success</font>
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<font color="#C80000">// mem_falure != 3</font>
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<font color="#C80000">// mem_falure != 4</font>
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bool __atomic_compare_exchange_strong(type* atomic_obj,
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type* expected, type desired,
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int mem_success, int mem_failure);
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@ -74,6 +89,8 @@ bool __atomic_compare_exchange_strong(type* atomic_obj,
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<font color="#C80000">// type must be trivially copyable</font>
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<font color="#C80000">// Behavior is defined for mem_success = [0 ... 5],</font>
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<font color="#C80000">// mem_falure <= mem_success</font>
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<font color="#C80000">// mem_falure != 3</font>
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<font color="#C80000">// mem_falure != 4</font>
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bool __atomic_compare_exchange_weak(type* atomic_obj,
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type* expected, type desired,
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int mem_success, int mem_failure);
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@ -124,9 +141,25 @@ this argument to 5.
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<p>
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If desired the intrinsics taking two ordering parameters can default
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<tt>mem_success</tt> to 5, and <tt>mem_failure</tt> to <tt>mem_success</tt>.
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<tt>mem_success</tt> to 5, and <tt>mem_failure</tt> to
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<tt>translate_memory_order(mem_success)</tt> where
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<tt>translate_memory_order(mem_success)</tt> is defined as:
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</p>
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<blockquote><pre>
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int
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translate_memory_order(int o)
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{
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switch (o)
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{
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case 4:
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return 2;
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case 3:
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return 0;
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}
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return o;
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}
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</pre></blockquote>
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</div>
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</body>
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</html>
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