Magic-Mirror/llvm-capstone
1
0
Fork 0
mirror of https://github.com/capstone-engine/llvm-capstone.git synced 2024-11-28 16:11:29 +00:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity

[lld][ELF] Support relocations R_AVR_LO8_LDI_GS/R_AVR_HI8_LDI_GS

Browse Source 
Relocations R_AVR_LO8_LDI_GS/R_AVR_HI8_LDI_GS (indirect calls
via function pointers) only cover range 128KiB. They are
equivalent to R_AVR_LO8_LDI_PM/R_AVR_HI8_LDI_PM within this
range.

But for function addresses beyond this range, GNU-ld emits
trampolines. And this patch implements corresponding thunks
for them in lld.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D147364
This commit is contained in:
Ben Shi 2023-03-29 11:55:54 +08:00
parent 81d06268f4
commit 229fcad7fc
4 changed files with 101 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
lld/ELF/Arch/AVR.cpp
View File

@ -28,6 +28,7 @@
#include "InputFiles.h"
#include "Symbols.h"
#include "Target.h"
#include "Thunks.h"
#include "lld/Common/ErrorHandler.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/Support/Endian.h"
@ -42,9 +43,13 @@ using namespace lld::elf;
namespace {
class AVR final : public TargetInfo {
public:
AVR() { needsThunks = true; }
uint32_t calcEFlags() const override;
RelExpr getRelExpr(RelType type, const Symbol &s,
const uint8_t *loc) const override;
bool needsThunk(RelExpr expr, RelType type, const InputFile *file,
uint64_t branchAddr, const Symbol &s,
int64_t a) const override;
void relocate(uint8_t *loc, const Relocation &rel,
uint64_t val) const override;
};
@ -71,8 +76,10 @@ RelExpr AVR::getRelExpr(RelType type, const Symbol &s,
case R_AVR_HH8_LDI:
case R_AVR_MS8_LDI_NEG:
case R_AVR_MS8_LDI:
case R_AVR_LO8_LDI_GS:
case R_AVR_LO8_LDI_PM:
case R_AVR_LO8_LDI_PM_NEG:
case R_AVR_HI8_LDI_GS:
case R_AVR_HI8_LDI_PM:
case R_AVR_HI8_LDI_PM_NEG:
case R_AVR_HH8_LDI_PM:
@ -96,6 +103,19 @@ static void writeLDI(uint8_t *loc, uint64_t val) {
write16le(loc, (read16le(loc) & 0xf0f0) | (val & 0xf0) << 4 | (val & 0x0f));
}
bool AVR::needsThunk(RelExpr expr, RelType type, const InputFile *file,
uint64_t branchAddr, const Symbol &s, int64_t a) const {
switch (type) {
case R_AVR_LO8_LDI_GS:
case R_AVR_HI8_LDI_GS:
// A thunk is needed if the symbol's virtual address is out of range
// [0, 0x1ffff].
return s.getVA() >= 0x20000;
default:
return false;
}
}
void AVR::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
switch (rel.type) {
case R_AVR_8:
@ -160,10 +180,16 @@ void AVR::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
writeLDI(loc, (val >> 24) & 0xff);
break;
case R_AVR_LO8_LDI_GS:
checkUInt(loc, val, 17, rel);
[[fallthrough]];
case R_AVR_LO8_LDI_PM:
checkAlignment(loc, val, 2, rel);
writeLDI(loc, (val >> 1) & 0xff);
break;
case R_AVR_HI8_LDI_GS:
checkUInt(loc, val, 17, rel);
[[fallthrough]];
case R_AVR_HI8_LDI_PM:
checkAlignment(loc, val, 2, rel);
writeLDI(loc, (val >> 9) & 0xff);

35
lld/ELF/Thunks.cpp
View File

@ -292,6 +292,16 @@ public:
void addSymbols(ThunkSection &isec) override;
};
// The AVR devices need thunks for R_AVR_LO8_LDI_GS/R_AVR_HI8_LDI_GS
// when their destination is out of range [0, 0x1ffff].
class AVRThunk : public Thunk {
public:
AVRThunk(Symbol &dest, int64_t addend) : Thunk(dest, addend) {}
uint32_t size() override { return 4; }
void writeTo(uint8_t *buf) override;
void addSymbols(ThunkSection &isec) override;
};
// MIPS LA25 thunk
class MipsThunk final : public Thunk {
public:
@ -892,6 +902,17 @@ void ThumbV4PILongThunk::addSymbols(ThunkSection &isec) {
addSymbol("$d", STT_NOTYPE, 16, isec);
}
// Use the long jump which covers a range up to 8MiB.
void AVRThunk::writeTo(uint8_t *buf) {
write32(buf, 0x940c); // jmp func
target->relocateNoSym(buf, R_AVR_CALL, destination.getVA());
}
void AVRThunk::addSymbols(ThunkSection &isec) {
addSymbol(saver().save("__AVRThunk_" + destination.getName()), STT_FUNC, 0,
isec);
}
// Write MIPS LA25 thunk code to call PIC function from the non-PIC one.
void MipsThunk::writeTo(uint8_t *buf) {
uint64_t s = destination.getVA();
@ -1314,6 +1335,16 @@ static Thunk *addThunkArm(RelType reloc, Symbol &s, int64_t a) {
fatal("unrecognized relocation type");
}
static Thunk *addThunkAVR(RelType type, Symbol &s, int64_t a) {
switch (type) {
case R_AVR_LO8_LDI_GS:
case R_AVR_HI8_LDI_GS:
return make<AVRThunk>(s, a);
default:
fatal("unrecognized relocation type " + toString(type));
}
}
static Thunk *addThunkMips(RelType type, Symbol &s) {
if ((s.stOther & STO_MIPS_MICROMIPS) && isMipsR6())
return make<MicroMipsR6Thunk>(s);
@ -1365,6 +1396,8 @@ Thunk *elf::addThunk(const InputSection &isec, Relocation &rel) {
return addThunkAArch64(rel.type, s, a);
case EM_ARM:
return addThunkArm(rel.type, s, a);
case EM_AVR:
return addThunkAVR(rel.type, s, a);
case EM_MIPS:
return addThunkMips(rel.type, s);
case EM_PPC:
@ -1372,6 +1405,6 @@ Thunk *elf::addThunk(const InputSection &isec, Relocation &rel) {
case EM_PPC64:
return addThunkPPC64(rel.type, s, a);
default:
llvm_unreachable("add Thunk only supported for ARM, Mips and PowerPC");
llvm_unreachable("add Thunk only supported for ARM, AVR, Mips and PowerPC");
}
}

10
lld/test/ELF/avr-reloc.s
View File

@ -1,12 +1,12 @@
; REQUIRES: avr
; RUN: llvm-mc -filetype=obj -triple=avr -mcpu=atmega328p %s -o %t0.o
; RUN: ld.lld %t0.o --defsym=a=0x12345678 --defsym=b=30 -o %t0
; RUN: ld.lld %t0.o --defsym=a=0x12345678 --defsym=b=30 --defsym=c=0x15554 -o %t0
; RUN: llvm-objdump -d --print-imm-hex --mcpu=atmega328p %t0 | \
; RUN: FileCheck --check-prefixes=CHECK,AVR %s
; RUN: llvm-objdump -s --mcpu=atmega328p %t0 | \
; RUN: FileCheck --check-prefixes=HEX,AVRHEX %s
; RUN: llvm-mc -filetype=obj -triple=avr -mcpu=attiny10 %s --defsym=TINY=1 -o %t1.o
; RUN: ld.lld %t1.o --defsym=a=0x12345678 --defsym=b=30 -o %t1
; RUN: ld.lld %t1.o --defsym=a=0x12345678 --defsym=b=30 --defsym=c=0x15554 -o %t1
; RUN: llvm-objdump -d --print-imm-hex --mcpu=attiny10 %t1 | FileCheck %s
; RUN: llvm-objdump -s --mcpu=attiny10 %t1 | \
; RUN: FileCheck --check-prefixes=HEX,TINYHEX %s
@ -20,7 +20,10 @@
; CHECK-NEXT: ldi r20, 0x3c
; CHECK-NEXT: ldi r20, 0x2b
; CHECK-NEXT: ldi r20, 0x1a
; CHECK-NEXT: ldi r20, 0xaa
; CHECK-NEXT: ldi r20, 0xaa
; CHECK-NEXT: ldi r20, 0xff
ldi r20, lo8(a) ; R_AVR_LO8_LDI
ldi r20, hi8(a) ; R_AVR_HI8_LDI
ldi r20, hh8(a) ; R_AVR_HH8_LDI
@ -30,6 +33,9 @@ ldi r20, pm_lo8(a) ; R_AVR_LO8_LDI_PM
ldi r20, pm_hi8(a) ; R_AVR_HI8_LDI_PM
ldi r20, pm_hh8(a) ; R_AVR_HH8_LDI_PM
ldi r20, lo8_gs(c) ; R_AVR_LO8_LDI_GS
ldi r20, hi8_gs(c) ; R_AVR_HI8_LDI_GS
ldi r20, b+225
.section .LDI_NEG,"ax",@progbits

33
lld/test/ELF/avr-thunk-ldi-gs.s Normal file
View File

@ -0,0 +1,33 @@
; REQUIRES: avr
; RUN: llvm-mc -filetype=obj -triple=avr -mcpu=atmega2560 %s -o %t.o
; RUN: ld.lld %t.o --defsym=a=0x1fffe --defsym=b=0x20000 -o %t
; RUN: llvm-objdump -d --print-imm-hex --no-show-raw-insn --mcpu=atmega2560 %t \
; RUN: | FileCheck %s
.section .LDI,"ax",@progbits
;; CHECK-LABEL: <__AVRThunk_b>:
;; CHECK-NEXT: 110b4: jmp 0x20000
;; CHECK-LABEL: <__init>:
;; CHECK-NEXT: 110b8: ldi r30, 0xff
;; CHECK-NEXT: 110ba: ldi r31, 0xff
;; CHECK-NEXT: 110bc: eicall
;; The destination of the following two LDI instructions is
;; __AVRThunk_b == 0x110b4, so they actually are
;; ldi r30, ((0x110b4) >> 1) & 0xff
;; ldi r31, ((0x110b4) >> 9)
;; CHECK-NEXT: 110be: ldi r30, 0x5a
;; CHECK-NEXT: 110c0: ldi r31, 0x88
;; CHECK-NEXT: 110c2: eicall
;; CHECK-NOT: __AVRThunk_a
.globl __init
__init:
;; No thunk is needed, since the destination is in range [0, 0x1ffff].
ldi r30, lo8_gs(a) ; R_AVR_LO8_LDI_GS
ldi r31, hi8_gs(a) ; R_AVR_HI8_LDI_GS
eicall
;; A thunk is needed, since the destination is out of range.
ldi r30, lo8_gs(b) ; R_AVR_LO8_LDI_GS
ldi r31, hi8_gs(b) ; R_AVR_HI8_LDI_GS
eicall