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[BDCE] Add a bit-tracking DCE pass
BDCE is a bit-tracking dead code elimination pass. It is based on ADCE (the "aggressive DCE" pass), with the added capability to track dead bits of integer valued instructions and remove those instructions when all of the bits are dead. Currently, it does not actually do this all-bits-dead removal, but rather replaces the instruction's uses with a constant zero, and lets instcombine (and the later run of ADCE) do the rest. Because we essentially get a run of ADCE "for free" while tracking the dead bits, we also do what ADCE does and removes actually-dead instructions as well (this includes instructions newly trivially dead because all bits were dead, but not all such instructions can be removed). The motivation for this is a case like: int __attribute__((const)) foo(int i); int bar(int x) { x |= (4 & foo(5)); x |= (8 & foo(3)); x |= (16 & foo(2)); x |= (32 & foo(1)); x |= (64 & foo(0)); x |= (128& foo(4)); return x >> 4; } As it turns out, if you order the bit-field insertions so that all of the dead ones come last, then instcombine will remove them. However, if you pick some other order (such as the one above), the fact that some of the calls to foo() are useless is not locally obvious, and we don't remove them (without this pass). I did a quick compile-time overhead check using sqlite from the test suite (Release+Asserts). BDCE took ~0.4% of the compilation time (making it about twice as expensive as ADCE). I've not looked at why yet, but we eliminate instructions due to having all-dead bits in: External/SPEC/CFP2006/447.dealII/447.dealII External/SPEC/CINT2006/400.perlbench/400.perlbench External/SPEC/CINT2006/403.gcc/403.gcc MultiSource/Applications/ClamAV/clamscan MultiSource/Benchmarks/7zip/7zip-benchmark llvm-svn: 229462
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@ -35,6 +35,9 @@ extern "C" {
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/** See llvm::createAggressiveDCEPass function. */
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void LLVMAddAggressiveDCEPass(LLVMPassManagerRef PM);
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/** See llvm::createBitTrackingDCEPass function. */
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void LLVMAddBitTrackingDCEPass(LLVMPassManagerRef PM);
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/** See llvm::createAlignmentFromAssumptionsPass function. */
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void LLVMAddAlignmentFromAssumptionsPass(LLVMPassManagerRef PM);
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@ -65,6 +65,7 @@ void initializeTarget(PassRegistry&);
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void initializeAAEvalPass(PassRegistry&);
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void initializeAddDiscriminatorsPass(PassRegistry&);
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void initializeADCEPass(PassRegistry&);
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void initializeBDCEPass(PassRegistry&);
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void initializeAliasAnalysisAnalysisGroup(PassRegistry&);
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void initializeAliasAnalysisCounterPass(PassRegistry&);
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void initializeAliasDebuggerPass(PassRegistry&);
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@ -49,6 +49,7 @@ namespace {
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(void) llvm::createAAEvalPass();
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(void) llvm::createAggressiveDCEPass();
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(void) llvm::createBitTrackingDCEPass();
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(void) llvm::createAliasAnalysisCounterPass();
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(void) llvm::createAliasDebugger();
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(void) llvm::createArgumentPromotionPass();
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@ -80,6 +80,13 @@ FunctionPass *createDeadStoreEliminationPass();
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//
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FunctionPass *createAggressiveDCEPass();
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//===----------------------------------------------------------------------===//
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//
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// BitTrackingDCE - This pass uses a bit-tracking DCE algorithm in order to
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// remove computations of dead bits.
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//
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FunctionPass *createBitTrackingDCEPass();
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//===----------------------------------------------------------------------===//
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//
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// SROA - Replace aggregates or pieces of aggregates with scalar SSA values.
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@ -252,6 +252,11 @@ void PassManagerBuilder::populateModulePassManager(
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MPM.add(createMemCpyOptPass()); // Remove memcpy / form memset
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MPM.add(createSCCPPass()); // Constant prop with SCCP
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// Delete dead bit computations (instcombine runs after to fold away the dead
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// computations, and then ADCE will run later to exploit any new DCE
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// opportunities that creates).
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MPM.add(createBitTrackingDCEPass()); // Delete dead bit computations
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// Run instcombine after redundancy elimination to exploit opportunities
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// opened up by them.
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MPM.add(createInstructionCombiningPass());
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408
llvm/lib/Transforms/Scalar/BDCE.cpp
Normal file
408
llvm/lib/Transforms/Scalar/BDCE.cpp
Normal file
@ -0,0 +1,408 @@
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//===---- BDCE.cpp - Bit-tracking dead code elimination -------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the Bit-Tracking Dead Code Elimination pass. Some
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// instructions (shifts, some ands, ors, etc.) kill some of their input bits.
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// We track these dead bits and remove instructions that compute only these
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// dead bits.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Transforms/Scalar.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/DepthFirstIterator.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Analysis/AssumptionCache.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/IR/BasicBlock.h"
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#include "llvm/IR/CFG.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/InstIterator.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/Operator.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "bdce"
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STATISTIC(NumRemoved, "Number of instructions removed (unused)");
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STATISTIC(NumSimplified, "Number of instructions trivialized (dead bits)");
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namespace {
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struct BDCE : public FunctionPass {
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static char ID; // Pass identification, replacement for typeid
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BDCE() : FunctionPass(ID) {
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initializeBDCEPass(*PassRegistry::getPassRegistry());
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}
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bool runOnFunction(Function& F) override;
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void getAnalysisUsage(AnalysisUsage& AU) const override {
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AU.setPreservesCFG();
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AU.addRequired<AssumptionCacheTracker>();
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AU.addRequired<DominatorTreeWrapperPass>();
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}
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void determineLiveOperandBits(const Instruction *UserI,
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const Instruction *I, unsigned OperandNo,
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const APInt &AOut, APInt &AB,
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APInt &KnownZero, APInt &KnownOne,
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APInt &KnownZero2, APInt &KnownOne2);
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AssumptionCache *AC;
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const DataLayout *DL;
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DominatorTree *DT;
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};
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}
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char BDCE::ID = 0;
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INITIALIZE_PASS_BEGIN(BDCE, "bdce", "Bit-Tracking Dead Code Elimination",
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false, false)
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INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker)
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INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
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INITIALIZE_PASS_END(BDCE, "bdce", "Bit-Tracking Dead Code Elimination",
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false, false)
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static bool isAlwaysLive(Instruction *I) {
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return isa<TerminatorInst>(I) || isa<DbgInfoIntrinsic>(I) ||
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isa<LandingPadInst>(I) || I->mayHaveSideEffects();
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}
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void BDCE::determineLiveOperandBits(const Instruction *UserI,
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const Instruction *I, unsigned OperandNo,
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const APInt &AOut, APInt &AB,
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APInt &KnownZero, APInt &KnownOne,
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APInt &KnownZero2, APInt &KnownOne2) {
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unsigned BitWidth = AB.getBitWidth();
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// We're called once per operand, but for some instructions, we need to
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// compute known bits of both operands in order to determine the live bits of
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// either (when both operands are instructions themselves). We don't,
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// however, want to do this twice, so we cache the result in APInts that live
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// in the caller. For the two-relevant-operands case, both operand values are
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// provided here.
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auto ComputeKnownBits = [&](unsigned BitWidth, const Value *V1,
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const Value *V2) {
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KnownZero = APInt(BitWidth, 0);
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KnownOne = APInt(BitWidth, 0);
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computeKnownBits(const_cast<Value*>(V1), KnownZero, KnownOne, DL, 0, AC,
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UserI, DT);
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if (V2) {
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KnownZero2 = APInt(BitWidth, 0);
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KnownOne2 = APInt(BitWidth, 0);
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computeKnownBits(const_cast<Value*>(V2), KnownZero2, KnownOne2, DL, 0, AC,
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UserI, DT);
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}
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};
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switch (UserI->getOpcode()) {
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default: break;
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case Instruction::Call:
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case Instruction::Invoke:
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if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(UserI))
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switch (II->getIntrinsicID()) {
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default: break;
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case Intrinsic::bswap:
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// The alive bits of the input are the swapped alive bits of
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// the output.
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AB = AOut.byteSwap();
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break;
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case Intrinsic::ctlz:
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if (OperandNo == 0) {
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// We need some output bits, so we need all bits of the
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// input to the left of, and including, the leftmost bit
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// known to be one.
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ComputeKnownBits(BitWidth, I, nullptr);
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AB = APInt::getHighBitsSet(BitWidth,
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std::min(BitWidth, KnownOne.countLeadingZeros()+1));
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}
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break;
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case Intrinsic::cttz:
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if (OperandNo == 0) {
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// We need some output bits, so we need all bits of the
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// input to the right of, and including, the rightmost bit
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// known to be one.
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ComputeKnownBits(BitWidth, I, nullptr);
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AB = APInt::getLowBitsSet(BitWidth,
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std::min(BitWidth, KnownOne.countTrailingZeros()+1));
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}
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break;
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}
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break;
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case Instruction::Add:
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case Instruction::Sub:
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// Find the highest live output bit. We don't need any more input
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// bits than that (adds, and thus subtracts, ripple only to the
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// left).
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AB = APInt::getLowBitsSet(BitWidth, AOut.getActiveBits());
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break;
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case Instruction::Shl:
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if (OperandNo == 0)
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if (ConstantInt *CI =
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dyn_cast<ConstantInt>(UserI->getOperand(1))) {
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uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1);
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AB = AOut.lshr(ShiftAmt);
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// If the shift is nuw/nsw, then the high bits are not dead
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// (because we've promised that they *must* be zero).
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const ShlOperator *S = cast<ShlOperator>(UserI);
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if (S->hasNoSignedWrap())
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AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1);
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else if (S->hasNoUnsignedWrap())
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AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt);
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}
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break;
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case Instruction::LShr:
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if (OperandNo == 0)
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if (ConstantInt *CI =
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dyn_cast<ConstantInt>(UserI->getOperand(1))) {
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uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1);
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AB = AOut.shl(ShiftAmt);
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// If the shift is exact, then the low bits are not dead
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// (they must be zero).
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if (cast<LShrOperator>(UserI)->isExact())
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AB |= APInt::getLowBitsSet(BitWidth, ShiftAmt);
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}
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break;
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case Instruction::AShr:
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if (OperandNo == 0)
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if (ConstantInt *CI =
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dyn_cast<ConstantInt>(UserI->getOperand(1))) {
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uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1);
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AB = AOut.shl(ShiftAmt);
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// Because the high input bit is replicated into the
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// high-order bits of the result, if we need any of those
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// bits, then we must keep the highest input bit.
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if ((AOut & APInt::getHighBitsSet(BitWidth, ShiftAmt))
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.getBoolValue())
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AB.setBit(BitWidth-1);
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// If the shift is exact, then the low bits are not dead
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// (they must be zero).
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if (cast<AShrOperator>(UserI)->isExact())
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AB |= APInt::getLowBitsSet(BitWidth, ShiftAmt);
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}
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break;
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case Instruction::And:
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AB = AOut;
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// For bits that are known zero, the corresponding bits in the
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// other operand are dead (unless they're both zero, in which
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// case they can't both be dead, so just mark the LHS bits as
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// dead).
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if (OperandNo == 0) {
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ComputeKnownBits(BitWidth, I, UserI->getOperand(1));
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AB &= ~KnownZero2;
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} else {
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if (!isa<Instruction>(UserI->getOperand(0)))
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ComputeKnownBits(BitWidth, UserI->getOperand(0), I);
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AB &= ~(KnownZero & ~KnownZero2);
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}
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break;
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case Instruction::Or:
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AB = AOut;
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// For bits that are known one, the corresponding bits in the
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// other operand are dead (unless they're both one, in which
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// case they can't both be dead, so just mark the LHS bits as
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// dead).
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if (OperandNo == 0) {
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ComputeKnownBits(BitWidth, I, UserI->getOperand(1));
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AB &= ~KnownOne2;
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} else {
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if (!isa<Instruction>(UserI->getOperand(0)))
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ComputeKnownBits(BitWidth, UserI->getOperand(0), I);
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AB &= ~(KnownOne & ~KnownOne2);
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}
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break;
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case Instruction::Xor:
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case Instruction::PHI:
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AB = AOut;
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break;
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case Instruction::Trunc:
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AB = AOut.zext(BitWidth);
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break;
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case Instruction::ZExt:
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AB = AOut.trunc(BitWidth);
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break;
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case Instruction::SExt:
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AB = AOut.trunc(BitWidth);
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// Because the high input bit is replicated into the
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// high-order bits of the result, if we need any of those
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// bits, then we must keep the highest input bit.
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if ((AOut & APInt::getHighBitsSet(AOut.getBitWidth(),
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AOut.getBitWidth() - BitWidth))
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.getBoolValue())
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AB.setBit(BitWidth-1);
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break;
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case Instruction::Select:
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if (OperandNo != 0)
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AB = AOut;
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break;
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}
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}
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bool BDCE::runOnFunction(Function& F) {
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if (skipOptnoneFunction(F))
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return false;
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AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
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DL = F.getParent()->getDataLayout();
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DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
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DenseMap<Instruction *, APInt> AliveBits;
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SmallVector<Instruction*, 128> Worklist;
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// The set of visited instructions (non-integer-typed only).
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SmallPtrSet<Instruction*, 128> Visited;
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// Collect the set of "root" instructions that are known live.
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for (Instruction &I : inst_range(F)) {
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if (!isAlwaysLive(&I))
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continue;
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// For integer-valued instructions, set up an initial empty set of alive
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// bits and add the instruction to the work list. For other instructions
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// add their operands to the work list (for integer values operands, mark
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// all bits as live).
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if (IntegerType *IT = dyn_cast<IntegerType>(I.getType())) {
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AliveBits[&I] = APInt(IT->getBitWidth(), 0);
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Worklist.push_back(&I);
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continue;
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}
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// Non-integer-typed instructions...
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for (Use &OI : I.operands()) {
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if (Instruction *J = dyn_cast<Instruction>(OI)) {
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if (IntegerType *IT = dyn_cast<IntegerType>(J->getType()))
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AliveBits[J] = APInt::getAllOnesValue(IT->getBitWidth());
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Worklist.push_back(J);
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}
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}
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// To save memory, we don't add I to the Visited set here. Instead, we
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// check isAlwaysLive on every instruction when searching for dead
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// instructions later (we need to check isAlwaysLive for the
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// integer-typed instructions anyway).
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}
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// Propagate liveness backwards to operands.
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while (!Worklist.empty()) {
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Instruction *UserI = Worklist.pop_back_val();
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DEBUG(dbgs() << "BDCE: Visiting: " << *UserI);
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APInt AOut;
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if (UserI->getType()->isIntegerTy()) {
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AOut = AliveBits[UserI];
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DEBUG(dbgs() << " Alive Out: " << AOut);
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}
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DEBUG(dbgs() << "\n");
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if (!UserI->getType()->isIntegerTy())
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Visited.insert(UserI);
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APInt KnownZero, KnownOne, KnownZero2, KnownOne2;
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// Compute the set of alive bits for each operand. These are anded into the
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// existing set, if any, and if that changes the set of alive bits, the
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// operand is added to the work-list.
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for (Use &OI : UserI->operands()) {
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if (Instruction *I = dyn_cast<Instruction>(OI)) {
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if (IntegerType *IT = dyn_cast<IntegerType>(I->getType())) {
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unsigned BitWidth = IT->getBitWidth();
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APInt AB = APInt::getAllOnesValue(BitWidth);
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if (UserI->getType()->isIntegerTy() && !AOut &&
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!isAlwaysLive(UserI)) {
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AB = APInt(BitWidth, 0);
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} else {
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// If all bits of the output are dead, then all bits of the input
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// Bits of each operand that are used to compute alive bits of the
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// output are alive, all others are dead.
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determineLiveOperandBits(UserI, I, OI.getOperandNo(), AOut, AB,
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KnownZero, KnownOne,
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KnownZero2, KnownOne2);
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}
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// If we've added to the set of alive bits (or the operand has not
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// been previously visited), then re-queue the operand to be visited
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// again.
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APInt ABPrev(BitWidth, 0);
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auto ABI = AliveBits.find(I);
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if (ABI != AliveBits.end())
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ABPrev = ABI->second;
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APInt ABNew = AB | ABPrev;
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if (ABNew != ABPrev || ABI == AliveBits.end()) {
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AliveBits[I] = std::move(ABNew);
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Worklist.push_back(I);
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}
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} else if (!Visited.count(I)) {
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Worklist.push_back(I);
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}
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}
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}
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}
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bool Changed = false;
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// The inverse of the live set is the dead set. These are those instructions
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||||
// which have no side effects and do not influence the control flow or return
|
||||
// value of the function, and may therefore be deleted safely.
|
||||
// NOTE: We reuse the Worklist vector here for memory efficiency.
|
||||
for (Instruction &I : inst_range(F)) {
|
||||
// For live instructions that have all dead bits, first make them dead by
|
||||
// replacing all uses with something else. Then, if they don't need to
|
||||
// remain live (because they have side effects, etc.) we can remove them.
|
||||
if (I.getType()->isIntegerTy()) {
|
||||
auto ABI = AliveBits.find(&I);
|
||||
if (ABI != AliveBits.end()) {
|
||||
if (ABI->second.getBoolValue())
|
||||
continue;
|
||||
|
||||
DEBUG(dbgs() << "BDCE: Trivializing: " << I << " (all bits dead)\n");
|
||||
// FIXME: In theory we could substitute undef here instead of zero.
|
||||
// This should be reconsidered once we settle on the semantics of
|
||||
// undef, poison, etc.
|
||||
Value *Zero = ConstantInt::get(I.getType(), 0);
|
||||
++NumSimplified;
|
||||
I.replaceAllUsesWith(Zero);
|
||||
Changed = true;
|
||||
}
|
||||
} else if (Visited.count(&I)) {
|
||||
continue;
|
||||
}
|
||||
|
||||
if (isAlwaysLive(&I))
|
||||
continue;
|
||||
|
||||
DEBUG(dbgs() << "BDCE: Removing: " << I << " (unused)\n");
|
||||
Worklist.push_back(&I);
|
||||
I.dropAllReferences();
|
||||
Changed = true;
|
||||
}
|
||||
|
||||
for (Instruction *&I : Worklist) {
|
||||
++NumRemoved;
|
||||
I->eraseFromParent();
|
||||
}
|
||||
|
||||
return Changed;
|
||||
}
|
||||
|
||||
FunctionPass *llvm::createBitTrackingDCEPass() {
|
||||
return new BDCE();
|
||||
}
|
||||
|
@ -1,6 +1,7 @@
|
||||
add_llvm_library(LLVMScalarOpts
|
||||
ADCE.cpp
|
||||
AlignmentFromAssumptions.cpp
|
||||
BDCE.cpp
|
||||
ConstantHoisting.cpp
|
||||
ConstantProp.cpp
|
||||
CorrelatedValuePropagation.cpp
|
||||
|
@ -28,6 +28,7 @@ using namespace llvm;
|
||||
/// ScalarOpts library.
|
||||
void llvm::initializeScalarOpts(PassRegistry &Registry) {
|
||||
initializeADCEPass(Registry);
|
||||
initializeBDCEPass(Registry);
|
||||
initializeAlignmentFromAssumptionsPass(Registry);
|
||||
initializeSampleProfileLoaderPass(Registry);
|
||||
initializeConstantHoistingPass(Registry);
|
||||
@ -83,6 +84,10 @@ void LLVMAddAggressiveDCEPass(LLVMPassManagerRef PM) {
|
||||
unwrap(PM)->add(createAggressiveDCEPass());
|
||||
}
|
||||
|
||||
void LLVMAddBitTrackingDCEPass(LLVMPassManagerRef PM) {
|
||||
unwrap(PM)->add(createBitTrackingDCEPass());
|
||||
}
|
||||
|
||||
void LLVMAddAlignmentFromAssumptionsPass(LLVMPassManagerRef PM) {
|
||||
unwrap(PM)->add(createAlignmentFromAssumptionsPass());
|
||||
}
|
||||
|
348
llvm/test/Transforms/BDCE/basic.ll
Normal file
348
llvm/test/Transforms/BDCE/basic.ll
Normal file
@ -0,0 +1,348 @@
|
||||
; RUN: opt -S -bdce -instsimplify < %s | FileCheck %s
|
||||
; RUN: opt -S -instsimplify < %s | FileCheck %s -check-prefix=CHECK-IO
|
||||
target datalayout = "E-m:e-i64:64-n32:64"
|
||||
target triple = "powerpc64-unknown-linux-gnu"
|
||||
|
||||
; Function Attrs: nounwind readnone
|
||||
define signext i32 @bar(i32 signext %x) #0 {
|
||||
entry:
|
||||
%call = tail call signext i32 @foo(i32 signext 5) #0
|
||||
%and = and i32 %call, 4
|
||||
%or = or i32 %and, %x
|
||||
%call1 = tail call signext i32 @foo(i32 signext 3) #0
|
||||
%and2 = and i32 %call1, 8
|
||||
%or3 = or i32 %or, %and2
|
||||
%call4 = tail call signext i32 @foo(i32 signext 2) #0
|
||||
%and5 = and i32 %call4, 16
|
||||
%or6 = or i32 %or3, %and5
|
||||
%call7 = tail call signext i32 @foo(i32 signext 1) #0
|
||||
%and8 = and i32 %call7, 32
|
||||
%or9 = or i32 %or6, %and8
|
||||
%call10 = tail call signext i32 @foo(i32 signext 0) #0
|
||||
%and11 = and i32 %call10, 64
|
||||
%or12 = or i32 %or9, %and11
|
||||
%call13 = tail call signext i32 @foo(i32 signext 4) #0
|
||||
%and14 = and i32 %call13, 128
|
||||
%or15 = or i32 %or12, %and14
|
||||
%shr = ashr i32 %or15, 4
|
||||
ret i32 %shr
|
||||
|
||||
; CHECK-LABEL: @bar
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 5)
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 3)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 2)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 1)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 0)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 4)
|
||||
; CHECK: ret i32
|
||||
|
||||
; Check that instsimplify is not doing this all on its own.
|
||||
; CHECK-IO-LABEL: @bar
|
||||
; CHECK-IO: tail call signext i32 @foo(i32 signext 5)
|
||||
; CHECK-IO: tail call signext i32 @foo(i32 signext 3)
|
||||
; CHECK-IO: tail call signext i32 @foo(i32 signext 2)
|
||||
; CHECK-IO: tail call signext i32 @foo(i32 signext 1)
|
||||
; CHECK-IO: tail call signext i32 @foo(i32 signext 0)
|
||||
; CHECK-IO: tail call signext i32 @foo(i32 signext 4)
|
||||
; CHECK-IO: ret i32
|
||||
}
|
||||
|
||||
; Function Attrs: nounwind readnone
|
||||
declare signext i32 @foo(i32 signext) #0
|
||||
|
||||
; Function Attrs: nounwind readnone
|
||||
define signext i32 @far(i32 signext %x) #1 {
|
||||
entry:
|
||||
%call = tail call signext i32 @goo(i32 signext 5) #1
|
||||
%and = and i32 %call, 4
|
||||
%or = or i32 %and, %x
|
||||
%call1 = tail call signext i32 @goo(i32 signext 3) #1
|
||||
%and2 = and i32 %call1, 8
|
||||
%or3 = or i32 %or, %and2
|
||||
%call4 = tail call signext i32 @goo(i32 signext 2) #1
|
||||
%and5 = and i32 %call4, 16
|
||||
%or6 = or i32 %or3, %and5
|
||||
%call7 = tail call signext i32 @goo(i32 signext 1) #1
|
||||
%and8 = and i32 %call7, 32
|
||||
%or9 = or i32 %or6, %and8
|
||||
%call10 = tail call signext i32 @goo(i32 signext 0) #1
|
||||
%and11 = and i32 %call10, 64
|
||||
%or12 = or i32 %or9, %and11
|
||||
%call13 = tail call signext i32 @goo(i32 signext 4) #1
|
||||
%and14 = and i32 %call13, 128
|
||||
%or15 = or i32 %or12, %and14
|
||||
%shr = ashr i32 %or15, 4
|
||||
ret i32 %shr
|
||||
|
||||
; CHECK-LABEL: @far
|
||||
; Calls to foo(5) and foo(3) are still there, but their results are not used.
|
||||
; CHECK: tail call signext i32 @goo(i32 signext 5)
|
||||
; CHECK-NEXT: tail call signext i32 @goo(i32 signext 3)
|
||||
; CHECK-NEXT: tail call signext i32 @goo(i32 signext 2)
|
||||
; CHECK: tail call signext i32 @goo(i32 signext 1)
|
||||
; CHECK: tail call signext i32 @goo(i32 signext 0)
|
||||
; CHECK: tail call signext i32 @goo(i32 signext 4)
|
||||
; CHECK: ret i32
|
||||
|
||||
; Check that instsimplify is not doing this all on its own.
|
||||
; CHECK-IO-LABEL: @far
|
||||
; CHECK-IO: tail call signext i32 @goo(i32 signext 5)
|
||||
; CHECK-IO: tail call signext i32 @goo(i32 signext 3)
|
||||
; CHECK-IO: tail call signext i32 @goo(i32 signext 2)
|
||||
; CHECK-IO: tail call signext i32 @goo(i32 signext 1)
|
||||
; CHECK-IO: tail call signext i32 @goo(i32 signext 0)
|
||||
; CHECK-IO: tail call signext i32 @goo(i32 signext 4)
|
||||
; CHECK-IO: ret i32
|
||||
}
|
||||
|
||||
declare signext i32 @goo(i32 signext) #1
|
||||
|
||||
; Function Attrs: nounwind readnone
|
||||
define signext i32 @tar1(i32 signext %x) #0 {
|
||||
entry:
|
||||
%call = tail call signext i32 @foo(i32 signext 5) #0
|
||||
%and = and i32 %call, 33554432
|
||||
%or = or i32 %and, %x
|
||||
%call1 = tail call signext i32 @foo(i32 signext 3) #0
|
||||
%and2 = and i32 %call1, 67108864
|
||||
%or3 = or i32 %or, %and2
|
||||
%call4 = tail call signext i32 @foo(i32 signext 2) #0
|
||||
%and5 = and i32 %call4, 16
|
||||
%or6 = or i32 %or3, %and5
|
||||
%call7 = tail call signext i32 @foo(i32 signext 1) #0
|
||||
%and8 = and i32 %call7, 32
|
||||
%or9 = or i32 %or6, %and8
|
||||
%call10 = tail call signext i32 @foo(i32 signext 0) #0
|
||||
%and11 = and i32 %call10, 64
|
||||
%or12 = or i32 %or9, %and11
|
||||
%call13 = tail call signext i32 @foo(i32 signext 4) #0
|
||||
%and14 = and i32 %call13, 128
|
||||
%or15 = or i32 %or12, %and14
|
||||
%bs = tail call i32 @llvm.bswap.i32(i32 %or15) #0
|
||||
%shr = ashr i32 %bs, 4
|
||||
ret i32 %shr
|
||||
|
||||
; CHECK-LABEL: @tar1
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 5)
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 3)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 2)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 1)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 0)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 4)
|
||||
; CHECK: ret i32
|
||||
}
|
||||
|
||||
; Function Attrs: nounwind readnone
|
||||
declare i32 @llvm.bswap.i32(i32) #0
|
||||
|
||||
; Function Attrs: nounwind readnone
|
||||
define signext i32 @tar2(i32 signext %x) #0 {
|
||||
entry:
|
||||
%call = tail call signext i32 @foo(i32 signext 5) #0
|
||||
%and = and i32 %call, 33554432
|
||||
%or = or i32 %and, %x
|
||||
%call1 = tail call signext i32 @foo(i32 signext 3) #0
|
||||
%and2 = and i32 %call1, 67108864
|
||||
%or3 = or i32 %or, %and2
|
||||
%call4 = tail call signext i32 @foo(i32 signext 2) #0
|
||||
%and5 = and i32 %call4, 16
|
||||
%or6 = or i32 %or3, %and5
|
||||
%call7 = tail call signext i32 @foo(i32 signext 1) #0
|
||||
%and8 = and i32 %call7, 32
|
||||
%or9 = or i32 %or6, %and8
|
||||
%call10 = tail call signext i32 @foo(i32 signext 0) #0
|
||||
%and11 = and i32 %call10, 64
|
||||
%or12 = or i32 %or9, %and11
|
||||
%call13 = tail call signext i32 @foo(i32 signext 4) #0
|
||||
%and14 = and i32 %call13, 128
|
||||
%or15 = or i32 %or12, %and14
|
||||
%shl = shl i32 %or15, 10
|
||||
ret i32 %shl
|
||||
|
||||
; CHECK-LABEL: @tar2
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 5)
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 3)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 2)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 1)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 0)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 4)
|
||||
; CHECK: ret i32
|
||||
}
|
||||
|
||||
; Function Attrs: nounwind readnone
|
||||
define signext i32 @tar3(i32 signext %x) #0 {
|
||||
entry:
|
||||
%call = tail call signext i32 @foo(i32 signext 5) #0
|
||||
%and = and i32 %call, 33554432
|
||||
%or = or i32 %and, %x
|
||||
%call1 = tail call signext i32 @foo(i32 signext 3) #0
|
||||
%and2 = and i32 %call1, 67108864
|
||||
%or3 = or i32 %or, %and2
|
||||
%call4 = tail call signext i32 @foo(i32 signext 2) #0
|
||||
%and5 = and i32 %call4, 16
|
||||
%or6 = or i32 %or3, %and5
|
||||
%call7 = tail call signext i32 @foo(i32 signext 1) #0
|
||||
%and8 = and i32 %call7, 32
|
||||
%or9 = or i32 %or6, %and8
|
||||
%call10 = tail call signext i32 @foo(i32 signext 0) #0
|
||||
%and11 = and i32 %call10, 64
|
||||
%or12 = or i32 %or9, %and11
|
||||
%call13 = tail call signext i32 @foo(i32 signext 4) #0
|
||||
%and14 = and i32 %call13, 128
|
||||
%or15 = or i32 %or12, %and14
|
||||
%add = add i32 %or15, 5
|
||||
%shl = shl i32 %add, 10
|
||||
ret i32 %shl
|
||||
|
||||
; CHECK-LABEL: @tar3
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 5)
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 3)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 2)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 1)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 0)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 4)
|
||||
; CHECK: ret i32
|
||||
}
|
||||
|
||||
; Function Attrs: nounwind readnone
|
||||
define signext i32 @tar4(i32 signext %x) #0 {
|
||||
entry:
|
||||
%call = tail call signext i32 @foo(i32 signext 5) #0
|
||||
%and = and i32 %call, 33554432
|
||||
%or = or i32 %and, %x
|
||||
%call1 = tail call signext i32 @foo(i32 signext 3) #0
|
||||
%and2 = and i32 %call1, 67108864
|
||||
%or3 = or i32 %or, %and2
|
||||
%call4 = tail call signext i32 @foo(i32 signext 2) #0
|
||||
%and5 = and i32 %call4, 16
|
||||
%or6 = or i32 %or3, %and5
|
||||
%call7 = tail call signext i32 @foo(i32 signext 1) #0
|
||||
%and8 = and i32 %call7, 32
|
||||
%or9 = or i32 %or6, %and8
|
||||
%call10 = tail call signext i32 @foo(i32 signext 0) #0
|
||||
%and11 = and i32 %call10, 64
|
||||
%or12 = or i32 %or9, %and11
|
||||
%call13 = tail call signext i32 @foo(i32 signext 4) #0
|
||||
%and14 = and i32 %call13, 128
|
||||
%or15 = or i32 %or12, %and14
|
||||
%sub = sub i32 %or15, 5
|
||||
%shl = shl i32 %sub, 10
|
||||
ret i32 %shl
|
||||
|
||||
; CHECK-LABEL: @tar4
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 5)
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 3)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 2)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 1)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 0)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 4)
|
||||
; CHECK: ret i32
|
||||
}
|
||||
|
||||
; Function Attrs: nounwind readnone
|
||||
define signext i32 @tar5(i32 signext %x) #0 {
|
||||
entry:
|
||||
%call = tail call signext i32 @foo(i32 signext 5) #0
|
||||
%and = and i32 %call, 33554432
|
||||
%or = or i32 %and, %x
|
||||
%call1 = tail call signext i32 @foo(i32 signext 3) #0
|
||||
%and2 = and i32 %call1, 67108864
|
||||
%or3 = or i32 %or, %and2
|
||||
%call4 = tail call signext i32 @foo(i32 signext 2) #0
|
||||
%and5 = and i32 %call4, 16
|
||||
%or6 = or i32 %or3, %and5
|
||||
%call7 = tail call signext i32 @foo(i32 signext 1) #0
|
||||
%and8 = and i32 %call7, 32
|
||||
%or9 = or i32 %or6, %and8
|
||||
%call10 = tail call signext i32 @foo(i32 signext 0) #0
|
||||
%and11 = and i32 %call10, 64
|
||||
%or12 = or i32 %or9, %and11
|
||||
%call13 = tail call signext i32 @foo(i32 signext 4) #0
|
||||
%and14 = and i32 %call13, 128
|
||||
%or15 = or i32 %or12, %and14
|
||||
%xor = xor i32 %or15, 5
|
||||
%shl = shl i32 %xor, 10
|
||||
ret i32 %shl
|
||||
|
||||
; CHECK-LABEL: @tar5
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 5)
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 3)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 2)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 1)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 0)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 4)
|
||||
; CHECK: ret i32
|
||||
}
|
||||
|
||||
; Function Attrs: nounwind readnone
|
||||
define signext i32 @tar7(i32 signext %x, i1 %b) #0 {
|
||||
entry:
|
||||
%call = tail call signext i32 @foo(i32 signext 5) #0
|
||||
%and = and i32 %call, 33554432
|
||||
%or = or i32 %and, %x
|
||||
%call1 = tail call signext i32 @foo(i32 signext 3) #0
|
||||
%and2 = and i32 %call1, 67108864
|
||||
%or3 = or i32 %or, %and2
|
||||
%call4 = tail call signext i32 @foo(i32 signext 2) #0
|
||||
%and5 = and i32 %call4, 16
|
||||
%or6 = or i32 %or3, %and5
|
||||
%call7 = tail call signext i32 @foo(i32 signext 1) #0
|
||||
%and8 = and i32 %call7, 32
|
||||
%or9 = or i32 %or6, %and8
|
||||
%call10 = tail call signext i32 @foo(i32 signext 0) #0
|
||||
%and11 = and i32 %call10, 64
|
||||
%or12 = or i32 %or9, %and11
|
||||
%call13 = tail call signext i32 @foo(i32 signext 4) #0
|
||||
%and14 = and i32 %call13, 128
|
||||
%or15 = or i32 %or12, %and14
|
||||
%v = select i1 %b, i32 %or15, i32 5
|
||||
%shl = shl i32 %v, 10
|
||||
ret i32 %shl
|
||||
|
||||
; CHECK-LABEL: @tar7
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 5)
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 3)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 2)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 1)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 0)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 4)
|
||||
; CHECK: ret i32
|
||||
}
|
||||
|
||||
; Function Attrs: nounwind readnone
|
||||
define signext i16 @tar8(i32 signext %x) #0 {
|
||||
entry:
|
||||
%call = tail call signext i32 @foo(i32 signext 5) #0
|
||||
%and = and i32 %call, 33554432
|
||||
%or = or i32 %and, %x
|
||||
%call1 = tail call signext i32 @foo(i32 signext 3) #0
|
||||
%and2 = and i32 %call1, 67108864
|
||||
%or3 = or i32 %or, %and2
|
||||
%call4 = tail call signext i32 @foo(i32 signext 2) #0
|
||||
%and5 = and i32 %call4, 16
|
||||
%or6 = or i32 %or3, %and5
|
||||
%call7 = tail call signext i32 @foo(i32 signext 1) #0
|
||||
%and8 = and i32 %call7, 32
|
||||
%or9 = or i32 %or6, %and8
|
||||
%call10 = tail call signext i32 @foo(i32 signext 0) #0
|
||||
%and11 = and i32 %call10, 64
|
||||
%or12 = or i32 %or9, %and11
|
||||
%call13 = tail call signext i32 @foo(i32 signext 4) #0
|
||||
%and14 = and i32 %call13, 128
|
||||
%or15 = or i32 %or12, %and14
|
||||
%tr = trunc i32 %or15 to i16
|
||||
ret i16 %tr
|
||||
|
||||
; CHECK-LABEL: @tar8
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 5)
|
||||
; CHECK-NOT: tail call signext i32 @foo(i32 signext 3)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 2)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 1)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 0)
|
||||
; CHECK: tail call signext i32 @foo(i32 signext 4)
|
||||
; CHECK: ret i16
|
||||
}
|
||||
|
||||
attributes #0 = { nounwind readnone }
|
||||
attributes #1 = { nounwind }
|
||||
|
33
llvm/test/Transforms/BDCE/dce-pure.ll
Normal file
33
llvm/test/Transforms/BDCE/dce-pure.ll
Normal file
@ -0,0 +1,33 @@
|
||||
; RUN: opt -bdce -S < %s | FileCheck %s
|
||||
|
||||
declare i32 @strlen(i8*) readonly nounwind
|
||||
|
||||
define void @test1() {
|
||||
call i32 @strlen( i8* null )
|
||||
ret void
|
||||
|
||||
; CHECK-LABEL: @test1
|
||||
; CHECK-NOT: call
|
||||
; CHECK: ret void
|
||||
}
|
||||
|
||||
define i32 @test2() {
|
||||
; invoke of pure function should not be deleted!
|
||||
invoke i32 @strlen( i8* null ) readnone
|
||||
to label %Cont unwind label %Other
|
||||
|
||||
Cont: ; preds = %0
|
||||
ret i32 0
|
||||
|
||||
Other: ; preds = %0
|
||||
%exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0
|
||||
cleanup
|
||||
ret i32 1
|
||||
|
||||
; CHECK-LABEL: @test2
|
||||
; CHECK: invoke
|
||||
; CHECK: ret i32 1
|
||||
}
|
||||
|
||||
declare i32 @__gxx_personality_v0(...)
|
||||
|
Loading…
Reference in New Issue
Block a user