mirror of
https://github.com/capstone-engine/llvm-capstone.git
synced 2025-02-04 08:16:49 +00:00
Refactor duplicate functions
getARMCPU and getLLVMArchSuffixForARM existed as very similar functions in both ToolChain.cpp and Tools.cpp. Create a single implementation of each in Tools.cpp, eliminate the duplicate and share via Tools.h. Creates an 'arm' namespace in Tools.h to be used by any ARM-targetting tools. llvm-svn: 197153
This commit is contained in:
Bernard Ogden
parent
8af41b5a21
commit
3156176c8c
@ -159,118 +159,6 @@ ObjCRuntime ToolChain::getDefaultObjCRuntime(bool isNonFragile) const {
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VersionTuple());
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}
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/// getARMTargetCPU - Get the (LLVM) name of the ARM cpu we are targeting.
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//
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// FIXME: tblgen this.
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static const char *getARMTargetCPU(const ArgList &Args,
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const llvm::Triple &Triple) {
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// For Darwin targets, the -arch option (which is translated to a
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// corresponding -march option) should determine the architecture
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// (and the Mach-O slice) regardless of any -mcpu options.
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if (!Triple.isOSDarwin()) {
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// FIXME: Warn on inconsistent use of -mcpu and -march.
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// If we have -mcpu=, use that.
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if (Arg *A = Args.getLastArg(options::OPT_mcpu_EQ))
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return A->getValue();
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}
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StringRef MArch;
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if (Arg *A = Args.getLastArg(options::OPT_march_EQ)) {
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// Otherwise, if we have -march= choose the base CPU for that arch.
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MArch = A->getValue();
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} else {
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// Otherwise, use the Arch from the triple.
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MArch = Triple.getArchName();
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}
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if (Triple.getOS() == llvm::Triple::NetBSD) {
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if (MArch == "armv6")
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return "arm1176jzf-s";
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}
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const char *result = llvm::StringSwitch<const char *>(MArch)
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.Cases("armv2", "armv2a","arm2")
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.Case("armv3", "arm6")
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.Case("armv3m", "arm7m")
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.Case("armv4", "strongarm")
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.Case("armv4t", "arm7tdmi")
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.Case("thumbv4t", "arm7tdmi")
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.Cases("armv5", "armv5t", "arm10tdmi")
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.Cases("thumbv5", "thumbv5t", "arm10tdmi")
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.Cases("armv5e", "armv5te", "arm1022e")
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.Cases("thumbv5e", "thumbv5te", "arm1022e")
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.Case("armv5tej", "arm926ej-s")
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.Case("thumbv5tej", "arm926ej-s")
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.Cases("armv6", "armv6k", "arm1136jf-s")
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.Cases("thumbv6", "thumbv6k", "arm1136jf-s")
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.Case("armv6j", "arm1136j-s")
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.Case("thumbv6j", "arm1136j-s")
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.Cases("armv6z", "armv6zk", "arm1176jzf-s")
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.Cases("thumbv6z", "thumbv6zk", "arm1176jzf-s")
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.Case("armv6t2", "arm1156t2-s")
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.Case("thumbv6t2", "arm1156t2-s")
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.Cases("armv6m", "armv6-m", "cortex-m0")
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.Case("thumbv6m", "cortex-m0")
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.Cases("armv7", "armv7a", "armv7-a", "cortex-a8")
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.Cases("thumbv7", "thumbv7a", "cortex-a8")
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.Cases("armv7l", "armv7-l", "cortex-a8")
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.Cases("armv7f", "armv7-f", "cortex-a9-mp")
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.Cases("armv7s", "armv7-s", "swift")
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.Cases("armv7r", "armv7-r", "cortex-r4")
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.Case("thumbv7r", "cortex-r4")
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.Cases("armv7m", "armv7-m", "cortex-m3")
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.Case("thumbv7m", "cortex-m3")
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.Cases("armv7em", "armv7e-m", "cortex-m4")
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.Case("thumbv7em", "cortex-m4")
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.Cases("armv8", "armv8a", "armv8-a", "cortex-a53")
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.Cases("thumbv8", "thumbv8a", "cortex-a53")
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.Case("ep9312", "ep9312")
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.Case("iwmmxt", "iwmmxt")
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.Case("xscale", "xscale")
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// If all else failed, return the most base CPU with thumb interworking
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// supported by LLVM.
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.Default(0);
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if (result)
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return result;
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return
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Triple.getEnvironment() == llvm::Triple::GNUEABIHF
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? "arm1176jzf-s"
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: "arm7tdmi";
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}
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/// getLLVMArchSuffixForARM - Get the LLVM arch name to use for a particular
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/// CPU.
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//
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// FIXME: This is redundant with -mcpu, why does LLVM use this.
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// FIXME: tblgen this, or kill it!
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static const char *getLLVMArchSuffixForARM(StringRef CPU) {
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return llvm::StringSwitch<const char *>(CPU)
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.Case("strongarm", "v4")
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.Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "v4t")
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.Cases("arm720t", "arm9", "arm9tdmi", "v4t")
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.Cases("arm920", "arm920t", "arm922t", "v4t")
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.Cases("arm940t", "ep9312","v4t")
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.Cases("arm10tdmi", "arm1020t", "v5")
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.Cases("arm9e", "arm926ej-s", "arm946e-s", "v5e")
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.Cases("arm966e-s", "arm968e-s", "arm10e", "v5e")
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.Cases("arm1020e", "arm1022e", "xscale", "iwmmxt", "v5e")
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.Cases("arm1136j-s", "arm1136jf-s", "arm1176jz-s", "v6")
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.Cases("arm1176jzf-s", "mpcorenovfp", "mpcore", "v6")
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.Cases("arm1156t2-s", "arm1156t2f-s", "v6t2")
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.Cases("cortex-a5", "cortex-a7", "cortex-a8", "v7")
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.Cases("cortex-a9", "cortex-a12", "cortex-a15", "krait", "v7")
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.Cases("cortex-r4", "cortex-r5", "v7r")
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.Case("cortex-m0", "v6m")
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.Case("cortex-m3", "v7m")
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.Case("cortex-m4", "v7em")
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.Case("cortex-a9-mp", "v7f")
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.Case("swift", "v7s")
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.Cases("cortex-a53", "cortex-a57", "v8")
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.Default("");
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}
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std::string ToolChain::ComputeLLVMTriple(const ArgList &Args,
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types::ID InputType) const {
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switch (getTriple().getArch()) {
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@ -299,8 +187,9 @@ std::string ToolChain::ComputeLLVMTriple(const ArgList &Args,
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// Thumb2 is the default for V7 on Darwin.
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//
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// FIXME: Thumb should just be another -target-feaure, not in the triple.
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StringRef Suffix =
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getLLVMArchSuffixForARM(getARMTargetCPU(Args, Triple));
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StringRef Suffix = Triple.isOSDarwin()
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? tools::arm::getLLVMArchSuffixForARM(tools::arm::getARMCPUForMArch(Args, Triple))
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: tools::arm::getLLVMArchSuffixForARM(tools::arm::getARMTargetCPU(Args, Triple));
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bool ThumbDefault = Suffix.startswith("v6m") || Suffix.startswith("v7m") ||
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Suffix.startswith("v7em") ||
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(Suffix.startswith("v7") && getTriple().isOSDarwin());
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@ -442,123 +442,6 @@ void Clang::AddPreprocessingOptions(Compilation &C,
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getToolChain().AddClangSystemIncludeArgs(Args, CmdArgs);
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}
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/// getLLVMArchSuffixForARM - Get the LLVM arch name to use for a particular
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/// CPU.
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//
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// FIXME: This is redundant with -mcpu, why does LLVM use this.
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// FIXME: tblgen this, or kill it!
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static const char *getLLVMArchSuffixForARM(StringRef CPU) {
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return llvm::StringSwitch<const char *>(CPU)
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.Case("strongarm", "v4")
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.Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "v4t")
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.Cases("arm720t", "arm9", "arm9tdmi", "v4t")
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.Cases("arm920", "arm920t", "arm922t", "v4t")
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.Cases("arm940t", "ep9312","v4t")
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.Cases("arm10tdmi", "arm1020t", "v5")
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.Cases("arm9e", "arm926ej-s", "arm946e-s", "v5e")
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.Cases("arm966e-s", "arm968e-s", "arm10e", "v5e")
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.Cases("arm1020e", "arm1022e", "xscale", "iwmmxt", "v5e")
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.Cases("arm1136j-s", "arm1136jf-s", "arm1176jz-s", "v6")
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.Cases("arm1176jzf-s", "mpcorenovfp", "mpcore", "v6")
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.Cases("arm1156t2-s", "arm1156t2f-s", "v6t2")
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.Cases("cortex-a5", "cortex-a7", "cortex-a8", "v7")
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.Cases("cortex-a9", "cortex-a12", "cortex-a15", "krait", "v7")
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.Cases("cortex-r4", "cortex-r5", "v7r")
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.Case("cortex-m0", "v6m")
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.Case("cortex-m3", "v7m")
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.Case("cortex-m4", "v7em")
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.Case("cortex-a9-mp", "v7f")
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.Case("swift", "v7s")
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.Cases("cortex-a53", "cortex-a57", "v8")
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.Default("");
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}
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/// getARMTargetCPU - Get the (LLVM) name of the ARM cpu we are targeting.
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//
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// FIXME: tblgen this.
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static std::string getARMTargetCPU(const ArgList &Args,
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const llvm::Triple &Triple) {
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// FIXME: Warn on inconsistent use of -mcpu and -march.
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// If we have -mcpu=, use that.
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if (Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) {
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StringRef MCPU = A->getValue();
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// Handle -mcpu=native.
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if (MCPU == "native")
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return llvm::sys::getHostCPUName();
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else
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return MCPU;
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}
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StringRef MArch;
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if (Arg *A = Args.getLastArg(options::OPT_march_EQ)) {
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// Otherwise, if we have -march= choose the base CPU for that arch.
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MArch = A->getValue();
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} else {
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// Otherwise, use the Arch from the triple.
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MArch = Triple.getArchName();
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}
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if (Triple.getOS() == llvm::Triple::NetBSD) {
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if (MArch == "armv6")
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return "arm1176jzf-s";
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}
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// Handle -march=native.
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std::string NativeMArch;
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if (MArch == "native") {
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std::string CPU = llvm::sys::getHostCPUName();
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if (CPU != "generic") {
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// Translate the native cpu into the architecture. The switch below will
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// then chose the minimum cpu for that arch.
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NativeMArch = std::string("arm") + getLLVMArchSuffixForARM(CPU);
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MArch = NativeMArch;
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}
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}
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return llvm::StringSwitch<const char *>(MArch)
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.Cases("armv2", "armv2a","arm2")
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.Case("armv3", "arm6")
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.Case("armv3m", "arm7m")
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.Case("armv4", "strongarm")
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.Case("armv4t", "arm7tdmi")
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.Case("thumbv4t", "arm7tdmi")
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.Cases("armv5", "armv5t", "arm10tdmi")
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.Cases("thumbv5", "thumbv5t", "arm10tdmi")
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.Cases("armv5e", "armv5te", "arm1022e")
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.Cases("thumbv5e", "thumbv5te", "arm1022e")
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.Case("armv5tej", "arm926ej-s")
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.Case("thumbv5tej", "arm926ej-s")
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.Cases("armv6", "armv6k", "arm1136jf-s")
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.Cases("thumbv6", "thumbv6k", "arm1136jf-s")
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.Case("armv6j", "arm1136j-s")
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.Case("thumbv6j", "arm1136j-s")
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.Cases("armv6z", "armv6zk", "arm1176jzf-s")
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.Cases("thumbv6z", "thumbv6zk", "arm1176jzf-s")
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.Case("armv6t2", "arm1156t2-s")
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.Case("thumbv6t2", "arm1156t2-s")
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.Cases("armv6m", "armv6-m", "cortex-m0")
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.Case("thumbv6m", "cortex-m0")
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.Cases("armv7", "armv7a", "armv7-a", "cortex-a8")
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.Cases("thumbv7", "thumbv7a", "cortex-a8")
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.Cases("armv7em", "armv7e-m", "cortex-m4")
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.Case("thumbv7em", "cortex-m4")
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.Cases("armv7f", "armv7-f", "cortex-a9-mp")
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.Cases("armv7s", "armv7-s", "swift")
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.Cases("armv7r", "armv7-r", "cortex-r4")
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.Case("thumbv7r", "cortex-r4")
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.Cases("armv7m", "armv7-m", "cortex-m3")
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.Case("thumbv7m", "cortex-m3")
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.Cases("armv8", "armv8a", "armv8-a", "cortex-a53")
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.Cases("thumbv8", "thumbv8a", "cortex-a53")
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.Case("ep9312", "ep9312")
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.Case("iwmmxt", "iwmmxt")
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.Case("xscale", "xscale")
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// If all else failed, return the most base CPU with thumb interworking
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// supported by LLVM.
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.Default("arm7tdmi");
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}
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/// getAArch64TargetCPU - Get the (LLVM) name of the AArch64 cpu we are targeting.
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//
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// FIXME: tblgen this.
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@ -747,7 +630,7 @@ StringRef tools::arm::getARMFloatABI(const Driver &D, const ArgList &Args,
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//
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// FIXME: Factor out an ARM class so we can cache the arch somewhere.
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std::string ArchName =
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getLLVMArchSuffixForARM(getARMTargetCPU(Args, Triple));
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arm::getLLVMArchSuffixForARM(arm::getARMTargetCPU(Args, Triple));
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if (StringRef(ArchName).startswith("v6") ||
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StringRef(ArchName).startswith("v7"))
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FloatABI = "softfp";
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@ -775,7 +658,7 @@ StringRef tools::arm::getARMFloatABI(const Driver &D, const ArgList &Args,
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break;
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case llvm::Triple::Android: {
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std::string ArchName =
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getLLVMArchSuffixForARM(getARMTargetCPU(Args, Triple));
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arm::getLLVMArchSuffixForARM(arm::getARMTargetCPU(Args, Triple));
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if (StringRef(ArchName).startswith("v7"))
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FloatABI = "softfp";
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else
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@ -849,7 +732,7 @@ void Clang::AddARMTargetArgs(const ArgList &Args,
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// Get the effective triple, which takes into account the deployment target.
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std::string TripleStr = getToolChain().ComputeEffectiveClangTriple(Args);
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llvm::Triple Triple(TripleStr);
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std::string CPUName = getARMTargetCPU(Args, Triple);
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std::string CPUName = arm::getARMTargetCPU(Args, Triple);
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// Select the ABI to use.
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//
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@ -1366,7 +1249,7 @@ static std::string getCPUName(const ArgList &Args, const llvm::Triple &T) {
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case llvm::Triple::arm:
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case llvm::Triple::thumb:
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return getARMTargetCPU(Args, T);
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return arm::getARMTargetCPU(Args, T);
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case llvm::Triple::mips:
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case llvm::Triple::mipsel:
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@ -4568,6 +4451,137 @@ void hexagon::Link::ConstructJob(Compilation &C, const JobAction &JA,
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}
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// Hexagon tools end.
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/// getARMCPUForMArch - Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting
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//
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// FIXME: tblgen this.
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const char *arm::getARMCPUForMArch(const ArgList &Args,
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const llvm::Triple &Triple) {
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StringRef MArch;
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if (Arg *A = Args.getLastArg(options::OPT_march_EQ)) {
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// Otherwise, if we have -march= choose the base CPU for that arch.
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MArch = A->getValue();
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} else {
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// Otherwise, use the Arch from the triple.
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MArch = Triple.getArchName();
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}
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// Handle -march=native.
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std::string NativeMArch;
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if (MArch == "native") {
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std::string CPU = llvm::sys::getHostCPUName();
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if (CPU != "generic") {
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// Translate the native cpu into the architecture. The switch below will
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// then chose the minimum cpu for that arch.
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NativeMArch = std::string("arm") + arm::getLLVMArchSuffixForARM(CPU);
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MArch = NativeMArch;
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}
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}
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if (Triple.getOS() == llvm::Triple::NetBSD) {
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if (MArch == "armv6")
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return "arm1176jzf-s";
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}
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const char *result = llvm::StringSwitch<const char *>(MArch)
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.Cases("armv2", "armv2a","arm2")
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.Case("armv3", "arm6")
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.Case("armv3m", "arm7m")
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.Case("armv4", "strongarm")
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.Case("armv4t", "arm7tdmi")
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.Case("thumbv4t", "arm7tdmi")
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.Cases("armv5", "armv5t", "arm10tdmi")
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.Cases("thumbv5", "thumbv5t", "arm10tdmi")
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.Cases("armv5e", "armv5te", "arm1022e")
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.Cases("thumbv5e", "thumbv5te", "arm1022e")
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.Case("armv5tej", "arm926ej-s")
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.Case("thumbv5tej", "arm926ej-s")
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.Cases("armv6", "armv6k", "arm1136jf-s")
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.Cases("thumbv6", "thumbv6k", "arm1136jf-s")
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.Case("armv6j", "arm1136j-s")
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.Case("thumbv6j", "arm1136j-s")
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.Cases("armv6z", "armv6zk", "arm1176jzf-s")
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.Cases("thumbv6z", "thumbv6zk", "arm1176jzf-s")
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.Case("armv6t2", "arm1156t2-s")
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.Case("thumbv6t2", "arm1156t2-s")
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.Cases("armv6m", "armv6-m", "cortex-m0")
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.Case("thumbv6m", "cortex-m0")
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.Cases("armv7", "armv7a", "armv7-a", "cortex-a8")
|
||||
.Cases("thumbv7", "thumbv7a", "cortex-a8")
|
||||
.Cases("armv7l", "armv7-l", "cortex-a8")
|
||||
.Cases("armv7f", "armv7-f", "cortex-a9-mp")
|
||||
.Cases("armv7s", "armv7-s", "swift")
|
||||
.Cases("armv7r", "armv7-r", "cortex-r4")
|
||||
.Case("thumbv7r", "cortex-r4")
|
||||
.Cases("armv7m", "armv7-m", "cortex-m3")
|
||||
.Case("thumbv7m", "cortex-m3")
|
||||
.Cases("armv7em", "armv7e-m", "cortex-m4")
|
||||
.Cases("thumbv7em", "thumbv7e-m", "cortex-m4")
|
||||
.Cases("armv8", "armv8a", "armv8-a", "cortex-a53")
|
||||
.Cases("thumbv8", "thumbv8a", "cortex-a53")
|
||||
.Case("ep9312", "ep9312")
|
||||
.Case("iwmmxt", "iwmmxt")
|
||||
.Case("xscale", "xscale")
|
||||
// If all else failed, return the most base CPU with thumb interworking
|
||||
// supported by LLVM.
|
||||
.Default(0);
|
||||
|
||||
if (result)
|
||||
return result;
|
||||
|
||||
return
|
||||
Triple.getEnvironment() == llvm::Triple::GNUEABIHF
|
||||
? "arm1176jzf-s"
|
||||
: "arm7tdmi";
|
||||
}
|
||||
|
||||
/// getARMTargetCPU - Get the (LLVM) name of the ARM cpu we are targeting.
|
||||
const char *arm::getARMTargetCPU(const ArgList &Args,
|
||||
const llvm::Triple &Triple) {
|
||||
// FIXME: Warn on inconsistent use of -mcpu and -march.
|
||||
// If we have -mcpu=, use that.
|
||||
if (Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) {
|
||||
StringRef MCPU = A->getValue();
|
||||
// Handle -mcpu=native.
|
||||
if (MCPU == "native")
|
||||
return llvm::sys::getHostCPUName().c_str();
|
||||
else
|
||||
return MCPU.str().c_str();
|
||||
}
|
||||
|
||||
return getARMCPUForMArch(Args, Triple);
|
||||
}
|
||||
|
||||
/// getLLVMArchSuffixForARM - Get the LLVM arch name to use for a particular
|
||||
/// CPU.
|
||||
//
|
||||
// FIXME: This is redundant with -mcpu, why does LLVM use this.
|
||||
// FIXME: tblgen this, or kill it!
|
||||
const char *arm::getLLVMArchSuffixForARM(StringRef CPU) {
|
||||
return llvm::StringSwitch<const char *>(CPU)
|
||||
.Case("strongarm", "v4")
|
||||
.Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "v4t")
|
||||
.Cases("arm720t", "arm9", "arm9tdmi", "v4t")
|
||||
.Cases("arm920", "arm920t", "arm922t", "v4t")
|
||||
.Cases("arm940t", "ep9312","v4t")
|
||||
.Cases("arm10tdmi", "arm1020t", "v5")
|
||||
.Cases("arm9e", "arm926ej-s", "arm946e-s", "v5e")
|
||||
.Cases("arm966e-s", "arm968e-s", "arm10e", "v5e")
|
||||
.Cases("arm1020e", "arm1022e", "xscale", "iwmmxt", "v5e")
|
||||
.Cases("arm1136j-s", "arm1136jf-s", "arm1176jz-s", "v6")
|
||||
.Cases("arm1176jzf-s", "mpcorenovfp", "mpcore", "v6")
|
||||
.Cases("arm1156t2-s", "arm1156t2f-s", "v6t2")
|
||||
.Cases("cortex-a5", "cortex-a7", "cortex-a8", "v7")
|
||||
.Cases("cortex-a9", "cortex-a12", "cortex-a15", "krait", "v7")
|
||||
.Cases("cortex-r4", "cortex-r5", "v7r")
|
||||
.Case("cortex-m0", "v6m")
|
||||
.Case("cortex-m3", "v7m")
|
||||
.Case("cortex-m4", "v7em")
|
||||
.Case("cortex-a9-mp", "v7f")
|
||||
.Case("swift", "v7s")
|
||||
.Cases("cortex-a53", "cortex-a57", "v8")
|
||||
.Default("");
|
||||
}
|
||||
|
||||
llvm::Triple::ArchType darwin::getArchTypeForDarwinArchName(StringRef Str) {
|
||||
// See arch(3) and llvm-gcc's driver-driver.c. We don't implement support for
|
||||
// archs which Darwin doesn't use.
|
||||
@ -6045,7 +6059,7 @@ void netbsd::Assemble::ConstructJob(Compilation &C, const JobAction &JA,
|
||||
// Pass the target CPU to GNU as for ARM, since the source code might
|
||||
// not have the correct .cpu annotation.
|
||||
if (getToolChain().getArch() == llvm::Triple::arm) {
|
||||
std::string MArch(getARMTargetCPU(Args, getToolChain().getTriple()));
|
||||
std::string MArch(arm::getARMTargetCPU(Args, getToolChain().getTriple()));
|
||||
CmdArgs.push_back(Args.MakeArgString("-mcpu=" + MArch));
|
||||
}
|
||||
|
||||
|
||||
@ -201,6 +201,13 @@ namespace hexagon {
|
||||
};
|
||||
} // end namespace hexagon.
|
||||
|
||||
namespace arm {
|
||||
const char* getARMTargetCPU(const llvm::opt::ArgList &Args,
|
||||
const llvm::Triple &Triple);
|
||||
const char* getARMCPUForMArch(const llvm::opt::ArgList &Args,
|
||||
const llvm::Triple &Triple);
|
||||
const char* getLLVMArchSuffixForARM(StringRef CPU);
|
||||
}
|
||||
|
||||
namespace darwin {
|
||||
llvm::Triple::ArchType getArchTypeForDarwinArchName(StringRef Str);
|
||||
|
||||
6
clang/test/Driver/arm-arch-darwin.c
Normal file
6
clang/test/Driver/arm-arch-darwin.c
Normal file
@ -0,0 +1,6 @@
|
||||
// On Darwin, arch should override CPU for triple purposes
|
||||
// RUN: %clang -target armv7m-apple-darwin -arch armv7m -mcpu=cortex-m4 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V7M-DARWIN %s
|
||||
// CHECK-V7M-DARWIN: "-cc1"{{.*}} "-triple" "thumbv7m-{{.*}} "-target-cpu" "cortex-m4"
|
||||
// RUN: %clang -target armv7m -arch armv7m -mcpu=cortex-m4 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V7M-OVERRIDDEN %s
|
||||
// CHECK-V7M-OVERRIDDEN: "-cc1"{{.*}} "-triple" "thumbv7em-{{.*}} "-target-cpu" "cortex-m4"
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user