[AMDGPU] Fix default value of glc for mubuf rtn atomics

Mubuf rtn atomics use GLC_1 thus default value for glc operand
should be -1, see https://reviews.llvm.org/D90730.
This allows us to report error when rtn atomic requires glc=1
but does not have glc operand in input.

Differential Revision: https://reviews.llvm.org/D92654
This commit is contained in:
Petar Avramovic 2020-12-07 13:59:15 +01:00
parent 2c0536b76b
commit 3a042dcd2e
3 changed files with 9 additions and 2 deletions

View File

@ -6691,7 +6691,8 @@ void AMDGPUAsmParser::cvtMubufImpl(MCInst &Inst,
addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOffset);
if (!IsAtomic || IsAtomicReturn) {
addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyGLC);
addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyGLC,
IsAtomicReturn ? -1 : 0);
}
addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySLC);

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@ -140,3 +140,9 @@ ds_write_src2_b32 v1 offset:65535
ds_write_src2_b64 v1 offset:65535
// GFX10: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
buffer_atomic_csub v5, off, s[8:11], s3 offset:4095
// GFX10: :[[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
global_atomic_csub v2, v[0:1], v2, off offset:100 slc
// GFX10: :[[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc

View File

@ -27,7 +27,7 @@ global_atomic_csub v2, v0, v2, s[2:3] glc
global_atomic_csub v2, v0, v2, s[2:3] offset:100 glc slc
// GFX10: encoding: [0x64,0x80,0xd3,0xdc,0x00,0x02,0x02,0x02]
buffer_atomic_csub v5, off, s[8:11], s3
buffer_atomic_csub v5, off, s[8:11], s3 glc
// GFX10: encoding: [0x00,0x40,0xd0,0xe0,0x00,0x05,0x02,0x03]
buffer_atomic_csub v5, off, s[8:11], s3 offset:4095 glc