[PowerPC] Add an alias for -mregnames so that full register names used in assembly. (#70255)

This option already exists on GCC and so it is being added to LLVM so
that we use the same option as them.
This commit is contained in:
Stefan Pintilie 2023-11-06 12:30:19 -05:00 committed by GitHub
parent c16b94a3bf
commit 423ad04c67
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11 changed files with 42 additions and 7 deletions

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@ -197,6 +197,7 @@ CODEGENOPT(HIPCorrectlyRoundedDivSqrt, 1, 1) ///< -fno-hip-fp32-correctly-rounde
CODEGENOPT(HIPSaveKernelArgName, 1, 0) ///< Set when -fhip-kernel-arg-name is enabled.
CODEGENOPT(UniqueInternalLinkageNames, 1, 0) ///< Internal Linkage symbols get unique names.
CODEGENOPT(SplitMachineFunctions, 1, 0) ///< Split machine functions using profile information.
CODEGENOPT(PPCUseFullRegisterNames, 1, 0) ///< Print full register names in assembly
/// When false, this attempts to generate code as if the result of an
/// overflowing conversion matches the overflowing behavior of a target's native

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@ -4789,6 +4789,12 @@ def mrop_protect : Flag<["-"], "mrop-protect">,
Group<m_ppc_Features_Group>;
def mprivileged : Flag<["-"], "mprivileged">,
Group<m_ppc_Features_Group>;
defm regnames : BoolOption<"m", "regnames",
CodeGenOpts<"PPCUseFullRegisterNames">, DefaultFalse,
PosFlag<SetTrue, [], [ClangOption, CC1Option], "Use full register names when writing assembly output">,
NegFlag<SetFalse, [], [ClangOption], "Use only register numbers when writing assembly output">>,
Group<m_Group>;
} // let Flags = [TargetSpecific]
def maix_small_local_exec_tls : Flag<["-"], "maix-small-local-exec-tls">,
Group<m_ppc_Features_Group>,

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@ -488,6 +488,8 @@ static bool initTargetOptions(DiagnosticsEngine &Diags,
Options.MCOptions.Argv0 = CodeGenOpts.Argv0;
Options.MCOptions.CommandLineArgs = CodeGenOpts.CommandLineArgs;
Options.MCOptions.AsSecureLogFile = CodeGenOpts.AsSecureLogFile;
Options.MCOptions.PPCUseFullRegisterNames =
CodeGenOpts.PPCUseFullRegisterNames;
Options.MisExpect = CodeGenOpts.MisExpect;
return true;

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@ -5014,6 +5014,10 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
Args.AddLastArg(CmdArgs, options::OPT_fthinlto_index_EQ);
}
if (Triple.isPPC())
Args.addOptInFlag(CmdArgs, options::OPT_mregnames,
options::OPT_mno_regnames);
if (Args.getLastArg(options::OPT_fthin_link_bitcode_EQ))
Args.AddLastArg(CmdArgs, options::OPT_fthin_link_bitcode_EQ);

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@ -0,0 +1,8 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang -### -target powerpc64le-unknown-linux-gnu -mcpu=pwr8 -mregnames \
// RUN: %s 2>&1 >/dev/null | FileCheck %s --check-prefix=FULLNAMES
// RUN: %clang -### -target powerpc64le-unknown-linux-gnu -mcpu=pwr8 -mno-regnames \
// RUN: %s 2>&1 >/dev/null | FileCheck %s --check-prefix=NOFULLNAMES
// FULLNAMES: -mregnames
// NOFULLNAMES-NOT: -mregnames

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@ -240,6 +240,9 @@ protected:
/// True if the target supports LEB128 directives.
bool HasLEB128Directives = true;
/// True if full register names are printed.
bool PPCUseFullRegisterNames = false;
//===--- Data Emission Directives -------------------------------------===//
/// This should be set to the directive used to get some number of zero (and
@ -710,6 +713,9 @@ public:
bool hasLEB128Directives() const { return HasLEB128Directives; }
bool useFullRegisterNames() const { return PPCUseFullRegisterNames; }
void setFullRegisterNames(bool V) { PPCUseFullRegisterNames = V; }
const char *getZeroDirective() const { return ZeroDirective; }
bool doesZeroDirectiveSupportNonZeroValue() const {
return ZeroDirectiveSupportsNonZeroValue;

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@ -89,6 +89,9 @@ public:
// functions on Darwins.
bool EmitCompactUnwindNonCanonical : 1;
// Whether or not to use full register names on PowerPC.
bool PPCUseFullRegisterNames : 1;
MCTargetOptions();
/// getABIName - If this returns a non-empty string this represents the

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@ -81,6 +81,8 @@ void LLVMTargetMachine::initAsmInfo() {
TmpAsmInfo->setRelaxELFRelocations(Options.RelaxELFRelocations);
TmpAsmInfo->setFullRegisterNames(Options.MCOptions.PPCUseFullRegisterNames);
if (Options.ExceptionModel != ExceptionHandling::None)
TmpAsmInfo->setExceptionsType(Options.ExceptionModel);

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@ -67,6 +67,7 @@ MCAsmInfo::MCAsmInfo() {
UseIntegratedAssembler = true;
ParseInlineAsmUsingAsmParser = false;
PreserveAsmComments = true;
PPCUseFullRegisterNames = false;
}
MCAsmInfo::~MCAsmInfo() = default;

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@ -19,7 +19,7 @@ MCTargetOptions::MCTargetOptions()
PreserveAsmComments(true), Dwarf64(false),
EmitDwarfUnwind(EmitDwarfUnwindType::Default),
MCUseDwarfDirectory(DefaultDwarfDirectory),
EmitCompactUnwindNonCanonical(false) {}
EmitCompactUnwindNonCanonical(false), PPCUseFullRegisterNames(false) {}
StringRef MCTargetOptions::getABIName() const {
return ABIName;

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@ -13,6 +13,7 @@
#include "MCTargetDesc/PPCInstPrinter.h"
#include "MCTargetDesc/PPCMCTargetDesc.h"
#include "MCTargetDesc/PPCPredicates.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h"
@ -596,7 +597,8 @@ void PPCInstPrinter::printTLSCall(const MCInst *MI, unsigned OpNo,
/// showRegistersWithPercentPrefix - Check if this register name should be
/// printed with a percentage symbol as prefix.
bool PPCInstPrinter::showRegistersWithPercentPrefix(const char *RegName) const {
if (!FullRegNamesWithPercent || TT.getOS() == Triple::AIX)
if ((!FullRegNamesWithPercent && !MAI.useFullRegisterNames()) ||
TT.getOS() == Triple::AIX)
return false;
switch (RegName[0]) {
@ -613,10 +615,10 @@ bool PPCInstPrinter::showRegistersWithPercentPrefix(const char *RegName) const {
/// getVerboseConditionalRegName - This method expands the condition register
/// when requested explicitly or targetting Darwin.
const char *PPCInstPrinter::getVerboseConditionRegName(unsigned RegNum,
unsigned RegEncoding)
const {
if (!FullRegNames)
const char *
PPCInstPrinter::getVerboseConditionRegName(unsigned RegNum,
unsigned RegEncoding) const {
if (!FullRegNames && !MAI.useFullRegisterNames())
return nullptr;
if (RegNum < PPC::CR0EQ || RegNum > PPC::CR7UN)
return nullptr;
@ -636,7 +638,7 @@ const char *PPCInstPrinter::getVerboseConditionRegName(unsigned RegNum,
// showRegistersWithPrefix - This method determines whether registers
// should be number-only or include the prefix.
bool PPCInstPrinter::showRegistersWithPrefix() const {
return FullRegNamesWithPercent || FullRegNames;
return FullRegNamesWithPercent || FullRegNames || MAI.useFullRegisterNames();
}
void PPCInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,