[IPRA][ARM] Disable no-CSR optimisation for ARM

This optimisation isn't generally profitable for ARM, because we can
save/restore many registers in the prologue and epilogue using the PUSH
and POP instructions, but mostly use individual LDR/STR instructions for
other spills.

Differential revision: https://reviews.llvm.org/D64910

llvm-svn: 367670
This commit is contained in:
Oliver Stannard 2019-08-02 10:23:17 +00:00
parent f6b00c279a
commit 4b7239ebac
5 changed files with 37 additions and 2 deletions

View File

@ -378,6 +378,11 @@ public:
return true;
}
/// Check if the no-CSR optimisation is profitable for the given function.
virtual bool isProfitableForNoCSROpt(const Function &F) const {
return true;
}
/// Return initial CFA offset value i.e. the one valid at the beginning of the
/// function (before any stack operations).
virtual int getInitialCFAOffset(const MachineFunction &MF) const;

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@ -171,7 +171,8 @@ bool RegUsageInfoCollector::runOnMachineFunction(MachineFunction &MF) {
SetRegAsDefined(PReg);
}
if (TargetFrameLowering::isSafeForNoCSROpt(F)) {
if (TargetFrameLowering::isSafeForNoCSROpt(F) &&
MF.getSubtarget().getFrameLowering()->isProfitableForNoCSROpt(F)) {
++NumCSROpt;
LLVM_DEBUG(dbgs() << MF.getName()
<< " function optimized for not having CSR.\n");

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@ -71,7 +71,9 @@ void TargetFrameLowering::determineCalleeSaves(MachineFunction &MF,
// When interprocedural register allocation is enabled caller saved registers
// are preferred over callee saved registers.
if (MF.getTarget().Options.EnableIPRA && isSafeForNoCSROpt(MF.getFunction()))
if (MF.getTarget().Options.EnableIPRA &&
isSafeForNoCSROpt(MF.getFunction()) &&
isProfitableForNoCSROpt(MF.getFunction()))
return;
// Get the callee saved register list...

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@ -63,6 +63,11 @@ public:
bool enableShrinkWrapping(const MachineFunction &MF) const override {
return true;
}
bool isProfitableForNoCSROpt(const Function &F) const override {
// The no-CSR optimisation is bad for code size on ARM, because we can save
// many registers with a single PUSH/POP pair.
return false;
}
private:
void emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,

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@ -0,0 +1,22 @@
; RUN: llc -mtriple armv7a--none-eabi < %s | FileCheck %s
; RUN: llc -mtriple armv7a--none-eabi < %s -enable-ipra | FileCheck %s
; Other targets disable callee-saved registers for internal functions when
; using IPRA, but that isn't profitable for ARM because the PUSH/POP
; instructions can more efficiently save registers than using individual
; LDR/STRs in the caller.
define internal void @callee() norecurse {
; CHECK-LABEL: callee:
entry:
; CHECK: push {r4, lr}
; CHECK: pop {r4, pc}
tail call void asm sideeffect "", "~{r4}"()
ret void
}
define void @caller() {
entry:
call void @callee()
ret void
}