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Add support for sparcv9 targets.
The SPARC v8 and SPARC v8 architectures are very similar, so use a base class to share most information between them. Include operating systems with known SPARC v9 ports. Also fix two issues with the SPARC v8 data layout string: SPARC v8 is a big endian target with a 64-bit aligned stack. llvm-svn: 179596
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0136943e03
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@ -4111,16 +4111,14 @@ const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
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namespace {
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class SparcV8TargetInfo : public TargetInfo {
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// Shared base class for SPARC v8 (32-bit) and SPARC v9 (64-bit).
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class SparcTargetInfo : public TargetInfo {
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static const TargetInfo::GCCRegAlias GCCRegAliases[];
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static const char * const GCCRegNames[];
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bool SoftFloat;
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public:
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SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
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// FIXME: Support Sparc quad-precision long double?
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DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
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"i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
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}
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SparcTargetInfo(const std::string &triple) : TargetInfo(triple) {}
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virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
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StringRef Name,
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bool Enabled) const {
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@ -4140,7 +4138,6 @@ public:
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virtual void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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DefineStd(Builder, "sparc", Opts);
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Builder.defineMacro("__sparcv8");
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Builder.defineMacro("__REGISTER_PREFIX__", "");
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if (SoftFloat)
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@ -4176,20 +4173,20 @@ public:
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}
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};
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const char * const SparcV8TargetInfo::GCCRegNames[] = {
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const char * const SparcTargetInfo::GCCRegNames[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
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"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
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};
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void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
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unsigned &NumNames) const {
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void SparcTargetInfo::getGCCRegNames(const char * const *&Names,
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unsigned &NumNames) const {
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Names = GCCRegNames;
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NumNames = llvm::array_lengthof(GCCRegNames);
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}
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const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
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const TargetInfo::GCCRegAlias SparcTargetInfo::GCCRegAliases[] = {
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{ { "g0" }, "r0" },
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{ { "g1" }, "r1" },
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{ { "g2" }, "r2" },
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@ -4224,11 +4221,44 @@ const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
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{ { "i7" }, "r31" },
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};
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void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
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unsigned &NumAliases) const {
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void SparcTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
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unsigned &NumAliases) const {
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Aliases = GCCRegAliases;
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NumAliases = llvm::array_lengthof(GCCRegAliases);
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}
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// SPARC v8 is the 32-bit mode selected by Triple::sparc.
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class SparcV8TargetInfo : public SparcTargetInfo {
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public:
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SparcV8TargetInfo(const std::string& triple) : SparcTargetInfo(triple) {
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// FIXME: Support Sparc quad-precision long double?
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DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
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"i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32-S64";
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}
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virtual void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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SparcTargetInfo::getTargetDefines(Opts, Builder);
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Builder.defineMacro("__sparcv8");
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}
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};
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// SPARC v9 is the 64-bit mode selected by Triple::sparcv9.
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class SparcV9TargetInfo : public SparcTargetInfo {
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public:
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SparcV9TargetInfo(const std::string& triple) : SparcTargetInfo(triple) {
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// FIXME: Support Sparc quad-precision long double?
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DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
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"i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32:64-S128";
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}
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virtual void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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SparcTargetInfo::getTargetDefines(Opts, Builder);
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Builder.defineMacro("__sparcv9");
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}
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};
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} // end anonymous namespace.
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namespace {
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@ -5199,6 +5229,24 @@ static TargetInfo *AllocateTarget(const std::string &T) {
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return new SparcV8TargetInfo(T);
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}
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case llvm::Triple::sparcv9:
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switch (os) {
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case llvm::Triple::Linux:
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return new LinuxTargetInfo<SparcV9TargetInfo>(T);
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case llvm::Triple::AuroraUX:
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return new AuroraUXTargetInfo<SparcV9TargetInfo>(T);
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case llvm::Triple::Solaris:
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return new SolarisTargetInfo<SparcV9TargetInfo>(T);
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case llvm::Triple::NetBSD:
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return new NetBSDTargetInfo<SparcV9TargetInfo>(T);
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case llvm::Triple::OpenBSD:
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return new OpenBSDTargetInfo<SparcV9TargetInfo>(T);
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case llvm::Triple::FreeBSD:
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return new FreeBSDTargetInfo<SparcV9TargetInfo>(T);
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default:
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return new SparcV9TargetInfo(T);
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}
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case llvm::Triple::tce:
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return new TCETargetInfo(T);
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@ -7,6 +7,7 @@
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// RUN: %clang_cc1 -triple powerpc %s -emit-llvm -o - | FileCheck %s
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// RUN: %clang_cc1 -triple powerpc64 %s -emit-llvm -o - | FileCheck %s
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// RUN: %clang_cc1 -triple sparc %s -emit-llvm -o - | FileCheck %s
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// RUN: %clang_cc1 -triple sparcv9 %s -emit-llvm -o - | FileCheck %s
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// RUN: %clang_cc1 -triple thumb %s -emit-llvm -o - | FileCheck %s
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int mout0;
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5
clang/test/CodeGen/sparc-target-data.c
Normal file
5
clang/test/CodeGen/sparc-target-data.c
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@ -0,0 +1,5 @@
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// RUN: %clang -target sparc-sun-solaris -o - -emit-llvm -S %s | FileCheck %s -check-prefix=V8
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// RUN: %clang -target sparcv9-sun-solaris -o - -emit-llvm -S %s | FileCheck %s -check-prefix=V9
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// V8: E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32-S64
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// V9: E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32:64-S128
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