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[X86] LowerVectorAllZero - early out if the type size is not pow2. NFC.

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This commit is contained in:
Simon Pilgrim 2023-03-23 09:42:45 +00:00
parent 61b0a492cc
commit 4f17d75b24
1 changed files with 4 additions and 4 deletions
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8
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -24167,6 +24167,10 @@ static SDValue LowerVectorAllZero(const SDLoc &DL, SDValue V, ISD::CondCode CC,
return SDValue();
}
// Quit if not convertable to legal scalar or 128/256-bit vector.
if (!llvm::has_single_bit<uint32_t>(VT.getSizeInBits()))
return SDValue();
assert((CC == ISD::SETEQ || CC == ISD::SETNE) && "Unsupported ISD::CondCode");
X86CC = (CC == ISD::SETEQ ? X86::COND_E : X86::COND_NE);
@ -24188,10 +24192,6 @@ static SDValue LowerVectorAllZero(const SDLoc &DL, SDValue V, ISD::CondCode CC,
DAG.getConstant(0, DL, IntVT));
}
// Quit if not splittable to 128/256-bit vector.
if (!llvm::has_single_bit<uint32_t>(VT.getSizeInBits()))
return SDValue();
// Split down to 128/256-bit vector.
unsigned TestSize = Subtarget.hasAVX() ? 256 : 128;
while (VT.getSizeInBits() > TestSize) {