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[lld][ARM] Add support for 16-bit thumb group relocations
This adds support for the following relocations: * R_ARM_THM_ALU_ABS_G0_NC * R_ARM_THM_ALU_ABS_G1_NC * R_ARM_THM_ALU_ABS_G2_NC * R_ARM_THM_ALU_ABS_G3 as defined in: https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst#5615static-thumb16-relocations Differential Revision: https://reviews.llvm.org/D153407
This commit is contained in:
John Brawn
parent
89ccfa1b39
commit
5421ab4625
@ -100,6 +100,10 @@ RelExpr ARM::getRelExpr(RelType type, const Symbol &s,
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case R_ARM_MOVT_ABS:
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case R_ARM_THM_MOVW_ABS_NC:
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case R_ARM_THM_MOVT_ABS:
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case R_ARM_THM_ALU_ABS_G0_NC:
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case R_ARM_THM_ALU_ABS_G1_NC:
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case R_ARM_THM_ALU_ABS_G2_NC:
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case R_ARM_THM_ALU_ABS_G3:
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return R_ABS;
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case R_ARM_THM_JUMP8:
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case R_ARM_THM_JUMP11:
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@ -681,6 +685,18 @@ void ARM::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
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((val << 4) & 0x7000) | // imm3
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(val & 0x00ff)); // imm8
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break;
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case R_ARM_THM_ALU_ABS_G3:
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write16(loc, (read16(loc) &~ 0x00ff) | ((val >> 24) & 0x00ff));
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break;
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case R_ARM_THM_ALU_ABS_G2_NC:
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write16(loc, (read16(loc) &~ 0x00ff) | ((val >> 16) & 0x00ff));
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break;
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case R_ARM_THM_ALU_ABS_G1_NC:
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write16(loc, (read16(loc) &~ 0x00ff) | ((val >> 8) & 0x00ff));
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break;
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case R_ARM_THM_ALU_ABS_G0_NC:
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write16(loc, (read16(loc) &~ 0x00ff) | (val & 0x00ff));
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break;
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case R_ARM_ALU_PC_G0:
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encodeAluGroup(loc, rel, val, 0, true);
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break;
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@ -858,6 +874,11 @@ int64_t ARM::getImplicitAddend(const uint8_t *buf, RelType type) const {
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((lo & 0x7000) >> 4) | // imm3
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(lo & 0x00ff)); // imm8
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}
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case R_ARM_THM_ALU_ABS_G0_NC:
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case R_ARM_THM_ALU_ABS_G1_NC:
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case R_ARM_THM_ALU_ABS_G2_NC:
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case R_ARM_THM_ALU_ABS_G3:
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return read16(buf) & 0xff;
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case R_ARM_ALU_PC_G0:
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case R_ARM_ALU_PC_G0_NC:
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case R_ARM_ALU_PC_G1:
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114
lld/test/ELF/arm-thumb-alu.s
Normal file
114
lld/test/ELF/arm-thumb-alu.s
Normal file
@ -0,0 +1,114 @@
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// REQUIRES: arm
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// RUN: split-file %s %t
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// RUN: llvm-mc -filetype=obj -triple=thumbv6m-unknown-linux-gnueabi %t/asm -o %t.o
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// RUN: ld.lld --script %t/lds %t.o -o %t2
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// RUN: llvm-objdump -d %t2 --triple=thumbv6m-unknown-linux-gnueabi --no-show-raw-insn | FileCheck %s
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//--- lds
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SECTIONS {
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.tests 0x00001000 : AT(0x00001000) { *(.tests) }
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.sym1 0x11223344 : AT(0x11223344) { *(.sym1) }
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.sym2 0x00ffffff : AT(0x00ffffff) { *(.sym2) }
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.fn 0x55667788 : AT(0x55667788) { *(.fn) }
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}
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//--- asm
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.section .tests, "ax", %progbits
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// CHECK-LABEL: <R_ARM_THM_ALU_ABS_G0_NC>:
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// CHECK: adds r0, #0x44
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// CHECK-NEXT: movs r0, #0x44
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// CHECK-NEXT: movs r0, #0x45
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// CHECK-NEXT: movs r0, #0x43
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// CHECK-NEXT: movs r0, #0xff
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// CHECK-NEXT: movs r0, #0x0
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// CHECK-NEXT: movs r0, #0xfe
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// CHECK-NEXT: movs r0, #0x89
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// CHECK-NEXT: movs r0, #0x8b
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R_ARM_THM_ALU_ABS_G0_NC:
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adds r0, :lower0_7:sym1
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movs r0, :lower0_7:sym1
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movs r0, :lower0_7:sym1+1
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movs r0, :lower0_7:sym1+0xff
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movs r0, :lower0_7:sym2
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movs r0, :lower0_7:sym2+1
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movs r0, :lower0_7:sym2+0xff
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movs r0, :lower0_7:fn
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movs r0, :lower0_7:fn+2
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// CHECK-LABEL: <R_ARM_THM_ALU_ABS_G1_NC>:
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// CHECK: adds r0, #0x33
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// CHECK-NEXT: movs r0, #0x33
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// CHECK-NEXT: movs r0, #0x33
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// CHECK-NEXT: movs r0, #0x34
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// CHECK-NEXT: movs r0, #0xff
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// CHECK-NEXT: movs r0, #0x0
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// CHECK-NEXT: movs r0, #0x0
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// CHECK-NEXT: movs r0, #0x77
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// CHECK-NEXT: movs r0, #0x77
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R_ARM_THM_ALU_ABS_G1_NC:
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adds r0, :lower8_15:sym1
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movs r0, :lower8_15:sym1
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movs r0, :lower8_15:sym1+1
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movs r0, :lower8_15:sym1+0xff
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movs r0, :lower8_15:sym2
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movs r0, :lower8_15:sym2+1
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movs r0, :lower8_15:sym2+0xff
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movs r0, :lower8_15:fn
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movs r0, :lower8_15:fn+2
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// CHECK-LABEL: <R_ARM_THM_ALU_ABS_G2_NC>:
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// CHECK: adds r0, #0x22
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// CHECK-NEXT: movs r0, #0x22
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// CHECK-NEXT: movs r0, #0x22
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// CHECK-NEXT: movs r0, #0x22
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// CHECK-NEXT: movs r0, #0xff
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// CHECK-NEXT: movs r0, #0x0
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// CHECK-NEXT: movs r0, #0x0
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// CHECK-NEXT: movs r0, #0x66
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// CHECK-NEXT: movs r0, #0x66
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R_ARM_THM_ALU_ABS_G2_NC:
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adds r0, :upper0_7:sym1
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movs r0, :upper0_7:sym1
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movs r0, :upper0_7:sym1+1
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movs r0, :upper0_7:sym1+0xff
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movs r0, :upper0_7:sym2
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movs r0, :upper0_7:sym2+1
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movs r0, :upper0_7:sym2+0xff
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movs r0, :upper0_7:fn
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movs r0, :upper0_7:fn+2
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// CHECK-LABEL: <R_ARM_THM_ALU_ABS_G3>:
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// CHECK: adds r0, #0x11
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// CHECK-NEXT: movs r0, #0x11
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// CHECK-NEXT: movs r0, #0x11
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// CHECK-NEXT: movs r0, #0x11
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// CHECK-NEXT: movs r0, #0x0
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// CHECK-NEXT: movs r0, #0x1
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// CHECK-NEXT: movs r0, #0x1
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// CHECK-NEXT: movs r0, #0x55
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// CHECK-NEXT: movs r0, #0x55
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R_ARM_THM_ALU_ABS_G3:
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adds r0, :upper8_15:sym1
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movs r0, :upper8_15:sym1
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movs r0, :upper8_15:sym1+1
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movs r0, :upper8_15:sym1+0xff
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movs r0, :upper8_15:sym2
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movs r0, :upper8_15:sym2+1
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movs r0, :upper8_15:sym2+0xff
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movs r0, :upper8_15:fn
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movs r0, :upper8_15:fn+2
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.section .sym1, "aw", %progbits
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sym1:
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.byte 0
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.section .sym2, "aw", %progbits
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sym2:
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.byte 0
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.section .fn, "ax", %progbits
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.thumb_func
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fn:
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bx lr
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