mirror of
https://github.com/capstone-engine/llvm-capstone.git
synced 2024-11-27 15:41:46 +00:00
Initial support for vectorization using Libmvec (GLIBC vector math library)
Differential Revision: https://reviews.llvm.org/D88154
This commit is contained in:
Venkataramanan Kumar
Sanjay Patel
parent
04e42f6254
commit
57cdc52c4d
@ -348,7 +348,7 @@ CODEGENOPT(CodeViewGHash, 1, 0)
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ENUM_CODEGENOPT(Inlining, InliningMethod, 2, NormalInlining)
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// Vector functions library to use.
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ENUM_CODEGENOPT(VecLib, VectorLibrary, 2, NoLibrary)
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ENUM_CODEGENOPT(VecLib, VectorLibrary, 3, NoLibrary)
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/// The default TLS model to use.
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ENUM_CODEGENOPT(DefaultTLSModel, TLSModel, 2, GeneralDynamicTLSModel)
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@ -54,11 +54,11 @@ public:
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enum VectorLibrary {
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NoLibrary, // Don't use any vector library.
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Accelerate, // Use the Accelerate framework.
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LIBMVEC, // GLIBC vector math library.
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MASSV, // IBM MASS vector library.
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SVML // Intel short vector math library.
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};
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enum ObjCDispatchMethodKind {
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Legacy = 0,
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NonLegacy = 1,
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@ -1582,7 +1582,7 @@ def fno_experimental_new_pass_manager : Flag<["-"], "fno-experimental-new-pass-m
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Group<f_clang_Group>, Flags<[CC1Option]>,
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HelpText<"Disables an experimental new pass manager in LLVM.">;
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def fveclib : Joined<["-"], "fveclib=">, Group<f_Group>, Flags<[CC1Option]>,
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HelpText<"Use the given vector functions library">, Values<"Accelerate,MASSV,SVML,none">;
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HelpText<"Use the given vector functions library">, Values<"Accelerate,libmvec,MASSV,SVML,none">;
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def fno_lax_vector_conversions : Flag<["-"], "fno-lax-vector-conversions">, Group<f_Group>,
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Alias<flax_vector_conversions_EQ>, AliasArgs<["none"]>;
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def fno_merge_all_constants : Flag<["-"], "fno-merge-all-constants">, Group<f_Group>,
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@ -371,6 +371,16 @@ static TargetLibraryInfoImpl *createTLII(llvm::Triple &TargetTriple,
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case CodeGenOptions::Accelerate:
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TLII->addVectorizableFunctionsFromVecLib(TargetLibraryInfoImpl::Accelerate);
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break;
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case CodeGenOptions::LIBMVEC:
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switch(TargetTriple.getArch()) {
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default:
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break;
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case llvm::Triple::x86_64:
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TLII->addVectorizableFunctionsFromVecLib
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(TargetLibraryInfoImpl::LIBMVEC_X86);
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break;
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}
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break;
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case CodeGenOptions::MASSV:
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TLII->addVectorizableFunctionsFromVecLib(TargetLibraryInfoImpl::MASSV);
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break;
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@ -749,6 +749,8 @@ static bool ParseCodeGenArgs(CodeGenOptions &Opts, ArgList &Args, InputKind IK,
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StringRef Name = A->getValue();
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if (Name == "Accelerate")
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Opts.setVecLib(CodeGenOptions::Accelerate);
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else if (Name == "libmvec")
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Opts.setVecLib(CodeGenOptions::LIBMVEC);
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else if (Name == "MASSV")
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Opts.setVecLib(CodeGenOptions::MASSV);
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else if (Name == "SVML")
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@ -73,6 +73,7 @@
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// FLTOALL-NEXT: thin
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// RUN: %clang --autocomplete=-fveclib= | FileCheck %s -check-prefix=FVECLIBALL
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// FVECLIBALL: Accelerate
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// FVECLIBALL-NEXT: libmvec
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// FVECLIBALL-NEXT: MASSV
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// FVECLIBALL-NEXT: none
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// FVECLIBALL-NEXT: SVML
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@ -1,10 +1,12 @@
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// RUN: %clang -### -c -fveclib=none %s 2>&1 | FileCheck -check-prefix CHECK-NOLIB %s
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// RUN: %clang -### -c -fveclib=Accelerate %s 2>&1 | FileCheck -check-prefix CHECK-ACCELERATE %s
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// RUN: %clang -### -c -fveclib=libmvec %s 2>&1 | FileCheck -check-prefix CHECK-libmvec %s
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// RUN: %clang -### -c -fveclib=MASSV %s 2>&1 | FileCheck -check-prefix CHECK-MASSV %s
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// RUN: not %clang -c -fveclib=something %s 2>&1 | FileCheck -check-prefix CHECK-INVALID %s
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// CHECK-NOLIB: "-fveclib=none"
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// CHECK-ACCELERATE: "-fveclib=Accelerate"
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// CHECK-libmvec: "-fveclib=libmvec"
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// CHECK-MASSV: "-fveclib=MASSV"
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// CHECK-INVALID: error: invalid value 'something' in '-fveclib=something'
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@ -88,6 +88,7 @@ public:
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enum VectorLibrary {
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NoLibrary, // Don't use any vector library.
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Accelerate, // Use Accelerate framework.
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LIBMVEC_X86,// GLIBC Vector Math library.
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MASSV, // IBM MASS vector library.
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SVML // Intel short vector math library.
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};
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@ -62,6 +62,87 @@ TLI_DEFINE_VECFUNC("acoshf", "vacoshf", 4)
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TLI_DEFINE_VECFUNC("atanhf", "vatanhf", 4)
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#elif defined(TLI_DEFINE_LIBMVEC_X86_VECFUNCS)
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// GLIBC Vector math Functions
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TLI_DEFINE_VECFUNC("sin", "_ZGVbN2v_sin", 2)
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TLI_DEFINE_VECFUNC("sin", "_ZGVdN4v_sin", 4)
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TLI_DEFINE_VECFUNC("sinf", "_ZGVbN4v_sinf", 4)
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TLI_DEFINE_VECFUNC("sinf", "_ZGVdN8v_sinf", 8)
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TLI_DEFINE_VECFUNC("llvm.sin.f64", "_ZGVbN2v_sin", 2)
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TLI_DEFINE_VECFUNC("llvm.sin.f64", "_ZGVdN4v_sin", 4)
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TLI_DEFINE_VECFUNC("llvm.sin.f32", "_ZGVbN4v_sinf", 4)
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TLI_DEFINE_VECFUNC("llvm.sin.f32", "_ZGVdN8v_sinf", 8)
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TLI_DEFINE_VECFUNC("cos", "_ZGVbN2v_cos", 2)
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TLI_DEFINE_VECFUNC("cos", "_ZGVdN4v_cos", 4)
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TLI_DEFINE_VECFUNC("cosf", "_ZGVbN4v_cosf", 4)
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TLI_DEFINE_VECFUNC("cosf", "_ZGVdN8v_cosf", 8)
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TLI_DEFINE_VECFUNC("llvm.cos.f64", "_ZGVbN2v_cos", 2)
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TLI_DEFINE_VECFUNC("llvm.cos.f64", "_ZGVdN4v_cos", 4)
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TLI_DEFINE_VECFUNC("llvm.cos.f32", "_ZGVbN4v_cosf", 4)
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TLI_DEFINE_VECFUNC("llvm.cos.f32", "_ZGVdN8v_cosf", 8)
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TLI_DEFINE_VECFUNC("pow", "_ZGVbN2vv_pow", 2)
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TLI_DEFINE_VECFUNC("pow", "_ZGVdN4vv_pow", 4)
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TLI_DEFINE_VECFUNC("powf", "_ZGVbN4vv_powf", 4)
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TLI_DEFINE_VECFUNC("powf", "_ZGVdN8vv_powf", 8)
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TLI_DEFINE_VECFUNC("__pow_finite", "_ZGVbN2vv___pow_finite", 2)
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TLI_DEFINE_VECFUNC("__pow_finite", "_ZGVdN4vv___pow_finite", 4)
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TLI_DEFINE_VECFUNC("__powf_finite", "_ZGVbN4vv___powf_finite", 4)
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TLI_DEFINE_VECFUNC("__powf_finite", "_ZGVdN8vv___powf_finite", 8)
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TLI_DEFINE_VECFUNC("llvm.pow.f64", "_ZGVbN2vv_pow", 2)
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TLI_DEFINE_VECFUNC("llvm.pow.f64", "_ZGVdN4vv_pow", 4)
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TLI_DEFINE_VECFUNC("llvm.pow.f32", "_ZGVbN4vv_powf", 4)
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TLI_DEFINE_VECFUNC("llvm.pow.f32", "_ZGVdN8vv_powf", 8)
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TLI_DEFINE_VECFUNC("exp", "_ZGVbN2v_exp", 2)
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TLI_DEFINE_VECFUNC("exp", "_ZGVdN4v_exp", 4)
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TLI_DEFINE_VECFUNC("expf", "_ZGVbN4v_expf", 4)
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TLI_DEFINE_VECFUNC("expf", "_ZGVdN8v_expf", 8)
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TLI_DEFINE_VECFUNC("__exp_finite", "_ZGVbN2v___exp_finite", 2)
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TLI_DEFINE_VECFUNC("__exp_finite", "_ZGVdN4v___exp_finite", 4)
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TLI_DEFINE_VECFUNC("__expf_finite", "_ZGVbN4v___expf_finite", 4)
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TLI_DEFINE_VECFUNC("__expf_finite", "_ZGVdN8v___expf_finite", 8)
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TLI_DEFINE_VECFUNC("llvm.exp.f64", "_ZGVbN2v_exp", 2)
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TLI_DEFINE_VECFUNC("llvm.exp.f64", "_ZGVdN4v_exp", 4)
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TLI_DEFINE_VECFUNC("llvm.exp.f32", "_ZGVbN4v_expf", 4)
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TLI_DEFINE_VECFUNC("llvm.exp.f32", "_ZGVdN8v_expf", 8)
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TLI_DEFINE_VECFUNC("log", "_ZGVbN2v_log", 2)
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TLI_DEFINE_VECFUNC("log", "_ZGVdN4v_log", 4)
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TLI_DEFINE_VECFUNC("logf", "_ZGVbN4v_logf", 4)
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TLI_DEFINE_VECFUNC("logf", "_ZGVdN8v_logf", 8)
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TLI_DEFINE_VECFUNC("__log_finite", "_ZGVbN2v___log_finite", 2)
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TLI_DEFINE_VECFUNC("__log_finite", "_ZGVdN4v___log_finite", 4)
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TLI_DEFINE_VECFUNC("__logf_finite", "_ZGVbN4v___logf_finite", 4)
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TLI_DEFINE_VECFUNC("__logf_finite", "_ZGVdN8v___logf_finite", 8)
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TLI_DEFINE_VECFUNC("llvm.log.f64", "_ZGVbN2v_log", 2)
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TLI_DEFINE_VECFUNC("llvm.log.f64", "_ZGVdN4v_log", 4)
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TLI_DEFINE_VECFUNC("llvm.log.f32", "_ZGVbN4v_logf", 4)
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TLI_DEFINE_VECFUNC("llvm.log.f32", "_ZGVdN8v_logf", 8)
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#elif defined(TLI_DEFINE_MASSV_VECFUNCS)
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// IBM MASS library's vector Functions
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@ -339,6 +420,7 @@ TLI_DEFINE_VECFUNC("__exp2f_finite", "__svml_exp2f16", 16)
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#undef TLI_DEFINE_VECFUNC
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#undef TLI_DEFINE_ACCELERATE_VECFUNCS
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#undef TLI_DEFINE_LIBMVEC_X86_VECFUNCS
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#undef TLI_DEFINE_MASSV_VECFUNCS
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#undef TLI_DEFINE_SVML_VECFUNCS
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#undef TLI_DEFINE_MASSV_VECFUNCS_NAMES
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@ -24,6 +24,8 @@ static cl::opt<TargetLibraryInfoImpl::VectorLibrary> ClVectorLibrary(
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"No vector functions library"),
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clEnumValN(TargetLibraryInfoImpl::Accelerate, "Accelerate",
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"Accelerate framework"),
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clEnumValN(TargetLibraryInfoImpl::LIBMVEC_X86, "LIBMVEC-X86",
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"GLIBC Vector Math library"),
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clEnumValN(TargetLibraryInfoImpl::MASSV, "MASSV",
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"IBM MASS vector library"),
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clEnumValN(TargetLibraryInfoImpl::SVML, "SVML",
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@ -1559,6 +1561,14 @@ void TargetLibraryInfoImpl::addVectorizableFunctionsFromVecLib(
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addVectorizableFunctions(VecFuncs);
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break;
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}
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case LIBMVEC_X86: {
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const VecDesc VecFuncs[] = {
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#define TLI_DEFINE_LIBMVEC_X86_VECFUNCS
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#include "llvm/Analysis/VecFuncs.def"
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};
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addVectorizableFunctions(VecFuncs);
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break;
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}
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case MASSV: {
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const VecDesc VecFuncs[] = {
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#define TLI_DEFINE_MASSV_VECFUNCS
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@ -0,0 +1,373 @@
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; RUN: opt -vector-library=LIBMVEC-X86 -inject-tli-mappings -loop-vectorize -S < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define void @sin_f64(double* nocapture %varray) {
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; CHECK-LABEL: @sin_f64(
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; CHECK-LABEL: vector.body
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; CHECK: [[TMP5:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP4:%.*]])
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;
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%tmp = trunc i64 %iv to i32
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%conv = sitofp i32 %tmp to double
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%call = tail call double @sin(double %conv)
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%arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
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store double %call, double* %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !1
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for.end:
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ret void
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}
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!1 = distinct !{!1, !2, !3}
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!2 = !{!"llvm.loop.vectorize.width", i32 2}
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!3 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @sin_f32(float* nocapture %varray) {
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; CHECK-LABEL: @sin_f32(
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; CHECK-LABEL: vector.body
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; CHECK: [[TMP5:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP4:%.*]])
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;
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%tmp = trunc i64 %iv to i32
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%conv = sitofp i32 %tmp to float
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%call = tail call float @sinf(float %conv)
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%arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
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store float %call, float* %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !21
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for.end:
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ret void
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}
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!21 = distinct !{!21, !22, !23}
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!22 = !{!"llvm.loop.vectorize.width", i32 8}
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!23 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @sin_f64_intrinsic(double* nocapture %varray) {
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; CHECK-LABEL: @sin_f64_intrinsic(
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; CHECK-LABEL: vector.body
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; CHECK: [[TMP5:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP4:%.*]])
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;
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%tmp = trunc i64 %iv to i32
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%conv = sitofp i32 %tmp to double
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%call = tail call double @llvm.sin.f64(double %conv)
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%arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
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store double %call, double* %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !31
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for.end:
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ret void
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}
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!31 = distinct !{!31, !32, !33}
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!32 = !{!"llvm.loop.vectorize.width", i32 2}
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!33 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @sin_f32_intrinsic(float* nocapture %varray) {
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; CHECK-LABEL: @sin_f32_intrinsic(
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; CHECK-LABEL: vector.body
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; CHECK: [[TMP5:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP4:%.*]])
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;
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%tmp = trunc i64 %iv to i32
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%conv = sitofp i32 %tmp to float
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%call = tail call float @llvm.sin.f32(float %conv)
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%arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
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store float %call, float* %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !41
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for.end:
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ret void
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}
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!41 = distinct !{!41, !42, !43}
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!42 = !{!"llvm.loop.vectorize.width", i32 8}
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!43 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @cos_f64(double* nocapture %varray) {
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; CHECK-LABEL: @cos_f64(
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; CHECK-LABEL: vector.body
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; CHECK: [[TMP5:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP4:%.*]])
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;
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%tmp = trunc i64 %iv to i32
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%conv = sitofp i32 %tmp to double
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%call = tail call double @cos(double %conv)
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%arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
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store double %call, double* %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !51
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for.end:
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ret void
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}
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!51 = distinct !{!51, !52, !53}
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!52 = !{!"llvm.loop.vectorize.width", i32 2}
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!53 = !{!"llvm.loop.vectorize.enable", i1 true}
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define void @cos_f32(float* nocapture %varray) {
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; CHECK-LABEL: @cos_f32(
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; CHECK-LABEL: vector.body
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; CHECK: [[TMP5:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP4:%.*]])
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;
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%tmp = trunc i64 %iv to i32
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%conv = sitofp i32 %tmp to float
|
||||
%call = tail call float @cosf(float %conv)
|
||||
%arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
|
||||
store float %call, float* %arrayidx, align 4
|
||||
%iv.next = add nuw nsw i64 %iv, 1
|
||||
%exitcond = icmp eq i64 %iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !61
|
||||
|
||||
for.end:
|
||||
ret void
|
||||
}
|
||||
|
||||
!61 = distinct !{!61, !62, !63}
|
||||
!62 = !{!"llvm.loop.vectorize.width", i32 8}
|
||||
!63 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @cos_f64_intrinsic(double* nocapture %varray) {
|
||||
; CHECK-LABEL: @cos_f64_intrinsic(
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: [[TMP5:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP4:%.*]])
|
||||
;
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body:
|
||||
%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
|
||||
%tmp = trunc i64 %iv to i32
|
||||
%conv = sitofp i32 %tmp to double
|
||||
%call = tail call double @llvm.cos.f64(double %conv)
|
||||
%arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
|
||||
store double %call, double* %arrayidx, align 4
|
||||
%iv.next = add nuw nsw i64 %iv, 1
|
||||
%exitcond = icmp eq i64 %iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !71
|
||||
|
||||
for.end:
|
||||
ret void
|
||||
}
|
||||
|
||||
!71 = distinct !{!71, !72, !73}
|
||||
!72 = !{!"llvm.loop.vectorize.width", i32 2}
|
||||
!73 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @cos_f32_intrinsic(float* nocapture %varray) {
|
||||
; CHECK-LABEL: @cos_f32_intrinsic(
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: [[TMP5:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP4:%.*]])
|
||||
;
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body:
|
||||
%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
|
||||
%tmp = trunc i64 %iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%call = tail call float @llvm.cos.f32(float %conv)
|
||||
%arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
|
||||
store float %call, float* %arrayidx, align 4
|
||||
%iv.next = add nuw nsw i64 %iv, 1
|
||||
%exitcond = icmp eq i64 %iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !81
|
||||
|
||||
for.end:
|
||||
ret void
|
||||
}
|
||||
|
||||
!81 = distinct !{!81, !82, !83}
|
||||
!82 = !{!"llvm.loop.vectorize.width", i32 8}
|
||||
!83 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
|
||||
define void @exp_f32(float* nocapture %varray) {
|
||||
; CHECK-LABEL: @exp_f32
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <8 x float> @_ZGVdN8v_expf
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%call = tail call fast float @expf(float %conv)
|
||||
%arrayidx = getelementptr inbounds float, float* %varray, i64 %indvars.iv
|
||||
store float %call, float* %arrayidx, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !91
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!91 = distinct !{!91, !92, !93}
|
||||
!92 = !{!"llvm.loop.vectorize.width", i32 8}
|
||||
!93 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @exp_f32_intrin(float* nocapture %varray) {
|
||||
; CHECK-LABEL: @exp_f32_intrin
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <8 x float> @_ZGVdN8v_expf
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%call = tail call fast float @llvm.exp.f32(float %conv)
|
||||
%arrayidx = getelementptr inbounds float, float* %varray, i64 %indvars.iv
|
||||
store float %call, float* %arrayidx, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !101
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!101 = distinct !{!101, !102, !103}
|
||||
!102 = !{!"llvm.loop.vectorize.width", i32 8}
|
||||
!103 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
|
||||
define void @log_f32(float* nocapture %varray) {
|
||||
; CHECK-LABEL: @log_f32
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <8 x float> @_ZGVdN8v_logf
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%call = tail call fast float @logf(float %conv)
|
||||
%arrayidx = getelementptr inbounds float, float* %varray, i64 %indvars.iv
|
||||
store float %call, float* %arrayidx, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !111
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!111 = distinct !{!111, !112, !113}
|
||||
!112 = !{!"llvm.loop.vectorize.width", i32 8}
|
||||
!113 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @pow_f32(float* nocapture %varray, float* nocapture readonly %exp) {
|
||||
; CHECK-LABEL: @pow_f32
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <8 x float> @_ZGVdN8vv_powf
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%arrayidx = getelementptr inbounds float, float* %exp, i64 %indvars.iv
|
||||
%tmp1 = load float, float* %arrayidx, align 4
|
||||
%tmp2 = tail call fast float @powf(float %conv, float %tmp1)
|
||||
%arrayidx2 = getelementptr inbounds float, float* %varray, i64 %indvars.iv
|
||||
store float %tmp2, float* %arrayidx2, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !121
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!121 = distinct !{!121, !122, !123}
|
||||
!122 = !{!"llvm.loop.vectorize.width", i32 8}
|
||||
!123 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @pow_f32_intrin(float* nocapture %varray, float* nocapture readonly %exp) {
|
||||
; CHECK-LABEL: @pow_f32_intrin
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <8 x float> @_ZGVdN8vv_powf
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%arrayidx = getelementptr inbounds float, float* %exp, i64 %indvars.iv
|
||||
%tmp1 = load float, float* %arrayidx, align 4
|
||||
%tmp2 = tail call fast float @llvm.pow.f32(float %conv, float %tmp1)
|
||||
%arrayidx2 = getelementptr inbounds float, float* %varray, i64 %indvars.iv
|
||||
store float %tmp2, float* %arrayidx2, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !131
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!131 = distinct !{!131, !132, !133}
|
||||
!132 = !{!"llvm.loop.vectorize.width", i32 8}
|
||||
!133 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
attributes #0 = { nounwind readnone }
|
||||
|
||||
declare double @sin(double) #0
|
||||
declare float @sinf(float) #0
|
||||
declare double @llvm.sin.f64(double) #0
|
||||
declare float @llvm.sin.f32(float) #0
|
||||
declare double @cos(double) #0
|
||||
declare float @cosf(float) #0
|
||||
declare double @llvm.cos.f64(double) #0
|
||||
declare float @llvm.cos.f32(float) #0
|
||||
declare float @expf(float) #0
|
||||
declare float @powf(float, float) #0
|
||||
declare float @llvm.exp.f32(float) #0
|
||||
declare float @logf(float) #0
|
||||
declare float @llvm.pow.f32(float, float) #0
|
||||
@ -0,0 +1,176 @@
|
||||
; RUN: opt -vector-library=LIBMVEC-X86 -inject-tli-mappings -loop-vectorize -S < %s | FileCheck %s
|
||||
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
||||
target triple = "x86_64-unknown-linux-gnu"
|
||||
|
||||
define void @exp_f32(float* nocapture %varray) {
|
||||
; CHECK-LABEL: @exp_f32
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <4 x float> @_ZGVbN4v___expf_finite
|
||||
; CHECK: ret
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%call = tail call fast float @__expf_finite(float %conv)
|
||||
%arrayidx = getelementptr inbounds float, float* %varray, i64 %indvars.iv
|
||||
store float %call, float* %arrayidx, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !1
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!1 = distinct !{!1, !2, !3}
|
||||
!2 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!3 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @exp_f64(double* nocapture %varray) {
|
||||
; CHECK-LABEL: @exp_f64
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <4 x double> @_ZGVdN4v___exp_finite
|
||||
; CHECK: ret
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to double
|
||||
%call = tail call fast double @__exp_finite(double %conv)
|
||||
%arrayidx = getelementptr inbounds double, double* %varray, i64 %indvars.iv
|
||||
store double %call, double* %arrayidx, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !11
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!11 = distinct !{!11, !12, !13}
|
||||
!12 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!13 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @log_f32(float* nocapture %varray) {
|
||||
; CHECK-LABEL: @log_f32
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <4 x float> @_ZGVbN4v___logf_finite
|
||||
; CHECK: ret
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%call = tail call fast float @__logf_finite(float %conv)
|
||||
%arrayidx = getelementptr inbounds float, float* %varray, i64 %indvars.iv
|
||||
store float %call, float* %arrayidx, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !21
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!21 = distinct !{!21, !22, !23}
|
||||
!22 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!23 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @log_f64(double* nocapture %varray) {
|
||||
; CHECK-LABEL: @log_f64
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <4 x double> @_ZGVdN4v___log_finite
|
||||
; CHECK: ret
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to double
|
||||
%call = tail call fast double @__log_finite(double %conv)
|
||||
%arrayidx = getelementptr inbounds double, double* %varray, i64 %indvars.iv
|
||||
store double %call, double* %arrayidx, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !31
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!31 = distinct !{!31, !32, !33}
|
||||
!32 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!33 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @pow_f32(float* nocapture %varray, float* nocapture readonly %exp) {
|
||||
; CHECK-LABEL: @pow_f32
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <4 x float> @_ZGVbN4vv___powf_finite
|
||||
; CHECK: ret
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%arrayidx = getelementptr inbounds float, float* %exp, i64 %indvars.iv
|
||||
%tmp1 = load float, float* %arrayidx, align 4
|
||||
%tmp2 = tail call fast float @__powf_finite(float %conv, float %tmp1)
|
||||
%arrayidx2 = getelementptr inbounds float, float* %varray, i64 %indvars.iv
|
||||
store float %tmp2, float* %arrayidx2, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !41
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!41 = distinct !{!41, !42, !43}
|
||||
!42 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!43 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @pow_f64(double* nocapture %varray, double* nocapture readonly %exp) {
|
||||
; CHECK-LABEL: @pow_f64
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <4 x double> @_ZGVdN4vv___pow_finite
|
||||
; CHECK: ret
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to double
|
||||
%arrayidx = getelementptr inbounds double, double* %exp, i64 %indvars.iv
|
||||
%tmp1 = load double, double* %arrayidx, align 4
|
||||
%tmp2 = tail call fast double @__pow_finite(double %conv, double %tmp1)
|
||||
%arrayidx2 = getelementptr inbounds double, double* %varray, i64 %indvars.iv
|
||||
store double %tmp2, double* %arrayidx2, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !51
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!51 = distinct !{!51, !52, !53}
|
||||
!52 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!53 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
declare float @__expf_finite(float) #0
|
||||
declare double @__exp_finite(double) #0
|
||||
declare float @__logf_finite(float) #0
|
||||
declare double @__log_finite(double) #0
|
||||
declare float @__powf_finite(float, float) #0
|
||||
declare double @__pow_finite(double, double) #0
|
||||
373
llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
Normal file
373
llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
Normal file
@ -0,0 +1,373 @@
|
||||
; RUN: opt -vector-library=LIBMVEC-X86 -inject-tli-mappings -loop-vectorize -S < %s | FileCheck %s
|
||||
|
||||
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
||||
target triple = "x86_64-unknown-linux-gnu"
|
||||
|
||||
define void @sin_f64(double* nocapture %varray) {
|
||||
; CHECK-LABEL: @sin_f64(
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: [[TMP5:%.*]] = call <4 x double> @_ZGVdN4v_sin(<4 x double> [[TMP4:%.*]])
|
||||
;
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body:
|
||||
%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
|
||||
%tmp = trunc i64 %iv to i32
|
||||
%conv = sitofp i32 %tmp to double
|
||||
%call = tail call double @sin(double %conv)
|
||||
%arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
|
||||
store double %call, double* %arrayidx, align 4
|
||||
%iv.next = add nuw nsw i64 %iv, 1
|
||||
%exitcond = icmp eq i64 %iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !1
|
||||
|
||||
for.end:
|
||||
ret void
|
||||
}
|
||||
|
||||
!1 = distinct !{!1, !2, !3}
|
||||
!2 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!3 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
|
||||
define void @sin_f32(float* nocapture %varray) {
|
||||
; CHECK-LABEL: @sin_f32(
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: [[TMP5:%.*]] = call <4 x float> @_ZGVbN4v_sinf(<4 x float> [[TMP4:%.*]])
|
||||
;
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body:
|
||||
%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
|
||||
%tmp = trunc i64 %iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%call = tail call float @sinf(float %conv)
|
||||
%arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
|
||||
store float %call, float* %arrayidx, align 4
|
||||
%iv.next = add nuw nsw i64 %iv, 1
|
||||
%exitcond = icmp eq i64 %iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !21
|
||||
|
||||
for.end:
|
||||
ret void
|
||||
}
|
||||
|
||||
!21 = distinct !{!21, !22, !23}
|
||||
!22 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!23 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @sin_f64_intrinsic(double* nocapture %varray) {
|
||||
; CHECK-LABEL: @sin_f64_intrinsic(
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: [[TMP5:%.*]] = call <4 x double> @_ZGVdN4v_sin(<4 x double> [[TMP4:%.*]])
|
||||
;
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body:
|
||||
%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
|
||||
%tmp = trunc i64 %iv to i32
|
||||
%conv = sitofp i32 %tmp to double
|
||||
%call = tail call double @llvm.sin.f64(double %conv)
|
||||
%arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
|
||||
store double %call, double* %arrayidx, align 4
|
||||
%iv.next = add nuw nsw i64 %iv, 1
|
||||
%exitcond = icmp eq i64 %iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !31
|
||||
|
||||
for.end:
|
||||
ret void
|
||||
}
|
||||
|
||||
!31 = distinct !{!31, !32, !33}
|
||||
!32 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!33 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @sin_f32_intrinsic(float* nocapture %varray) {
|
||||
; CHECK-LABEL: @sin_f32_intrinsic(
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: [[TMP5:%.*]] = call <4 x float> @_ZGVbN4v_sinf(<4 x float> [[TMP4:%.*]])
|
||||
;
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body:
|
||||
%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
|
||||
%tmp = trunc i64 %iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%call = tail call float @llvm.sin.f32(float %conv)
|
||||
%arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
|
||||
store float %call, float* %arrayidx, align 4
|
||||
%iv.next = add nuw nsw i64 %iv, 1
|
||||
%exitcond = icmp eq i64 %iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !41
|
||||
|
||||
for.end:
|
||||
ret void
|
||||
}
|
||||
|
||||
!41 = distinct !{!41, !42, !43}
|
||||
!42 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!43 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @cos_f64(double* nocapture %varray) {
|
||||
; CHECK-LABEL: @cos_f64(
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: [[TMP5:%.*]] = call <4 x double> @_ZGVdN4v_cos(<4 x double> [[TMP4:%.*]])
|
||||
;
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body:
|
||||
%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
|
||||
%tmp = trunc i64 %iv to i32
|
||||
%conv = sitofp i32 %tmp to double
|
||||
%call = tail call double @cos(double %conv)
|
||||
%arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
|
||||
store double %call, double* %arrayidx, align 4
|
||||
%iv.next = add nuw nsw i64 %iv, 1
|
||||
%exitcond = icmp eq i64 %iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !51
|
||||
|
||||
for.end:
|
||||
ret void
|
||||
}
|
||||
|
||||
!51 = distinct !{!51, !52, !53}
|
||||
!52 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!53 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @cos_f32(float* nocapture %varray) {
|
||||
; CHECK-LABEL: @cos_f32(
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: [[TMP5:%.*]] = call <4 x float> @_ZGVbN4v_cosf(<4 x float> [[TMP4:%.*]])
|
||||
;
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body:
|
||||
%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
|
||||
%tmp = trunc i64 %iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%call = tail call float @cosf(float %conv)
|
||||
%arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
|
||||
store float %call, float* %arrayidx, align 4
|
||||
%iv.next = add nuw nsw i64 %iv, 1
|
||||
%exitcond = icmp eq i64 %iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !61
|
||||
|
||||
for.end:
|
||||
ret void
|
||||
}
|
||||
|
||||
!61 = distinct !{!61, !62, !63}
|
||||
!62 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!63 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @cos_f64_intrinsic(double* nocapture %varray) {
|
||||
; CHECK-LABEL: @cos_f64_intrinsic(
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: [[TMP5:%.*]] = call <4 x double> @_ZGVdN4v_cos(<4 x double> [[TMP4:%.*]])
|
||||
;
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body:
|
||||
%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
|
||||
%tmp = trunc i64 %iv to i32
|
||||
%conv = sitofp i32 %tmp to double
|
||||
%call = tail call double @llvm.cos.f64(double %conv)
|
||||
%arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
|
||||
store double %call, double* %arrayidx, align 4
|
||||
%iv.next = add nuw nsw i64 %iv, 1
|
||||
%exitcond = icmp eq i64 %iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !71
|
||||
|
||||
for.end:
|
||||
ret void
|
||||
}
|
||||
|
||||
!71 = distinct !{!71, !72, !73}
|
||||
!72 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!73 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @cos_f32_intrinsic(float* nocapture %varray) {
|
||||
; CHECK-LABEL: @cos_f32_intrinsic(
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: [[TMP5:%.*]] = call <4 x float> @_ZGVbN4v_cosf(<4 x float> [[TMP4:%.*]])
|
||||
;
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body:
|
||||
%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
|
||||
%tmp = trunc i64 %iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%call = tail call float @llvm.cos.f32(float %conv)
|
||||
%arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
|
||||
store float %call, float* %arrayidx, align 4
|
||||
%iv.next = add nuw nsw i64 %iv, 1
|
||||
%exitcond = icmp eq i64 %iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !81
|
||||
|
||||
for.end:
|
||||
ret void
|
||||
}
|
||||
|
||||
!81 = distinct !{!81, !82, !83}
|
||||
!82 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!83 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
|
||||
define void @exp_f32(float* nocapture %varray) {
|
||||
; CHECK-LABEL: @exp_f32
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <4 x float> @_ZGVbN4v_expf
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%call = tail call fast float @expf(float %conv)
|
||||
%arrayidx = getelementptr inbounds float, float* %varray, i64 %indvars.iv
|
||||
store float %call, float* %arrayidx, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !91
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!91 = distinct !{!91, !92, !93}
|
||||
!92 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!93 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @exp_f32_intrin(float* nocapture %varray) {
|
||||
; CHECK-LABEL: @exp_f32_intrin
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <4 x float> @_ZGVbN4v_expf
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%call = tail call fast float @llvm.exp.f32(float %conv)
|
||||
%arrayidx = getelementptr inbounds float, float* %varray, i64 %indvars.iv
|
||||
store float %call, float* %arrayidx, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !101
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!101 = distinct !{!101, !102, !103}
|
||||
!102 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!103 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
|
||||
define void @log_f32(float* nocapture %varray) {
|
||||
; CHECK-LABEL: @log_f32
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <4 x float> @_ZGVbN4v_logf
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%call = tail call fast float @logf(float %conv)
|
||||
%arrayidx = getelementptr inbounds float, float* %varray, i64 %indvars.iv
|
||||
store float %call, float* %arrayidx, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !111
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!111 = distinct !{!111, !112, !113}
|
||||
!112 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!113 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @pow_f32(float* nocapture %varray, float* nocapture readonly %exp) {
|
||||
; CHECK-LABEL: @pow_f32
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <4 x float> @_ZGVbN4vv_powf
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%arrayidx = getelementptr inbounds float, float* %exp, i64 %indvars.iv
|
||||
%tmp1 = load float, float* %arrayidx, align 4
|
||||
%tmp2 = tail call fast float @powf(float %conv, float %tmp1)
|
||||
%arrayidx2 = getelementptr inbounds float, float* %varray, i64 %indvars.iv
|
||||
store float %tmp2, float* %arrayidx2, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !121
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!121 = distinct !{!121, !122, !123}
|
||||
!122 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!123 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
define void @pow_f32_intrin(float* nocapture %varray, float* nocapture readonly %exp) {
|
||||
; CHECK-LABEL: @pow_f32_intrin
|
||||
; CHECK-LABEL: vector.body
|
||||
; CHECK: <4 x float> @_ZGVbN4vv_powf
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body, %entry
|
||||
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||
%tmp = trunc i64 %indvars.iv to i32
|
||||
%conv = sitofp i32 %tmp to float
|
||||
%arrayidx = getelementptr inbounds float, float* %exp, i64 %indvars.iv
|
||||
%tmp1 = load float, float* %arrayidx, align 4
|
||||
%tmp2 = tail call fast float @llvm.pow.f32(float %conv, float %tmp1)
|
||||
%arrayidx2 = getelementptr inbounds float, float* %varray, i64 %indvars.iv
|
||||
store float %tmp2, float* %arrayidx2, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp eq i64 %indvars.iv.next, 1000
|
||||
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !131
|
||||
|
||||
for.end: ; preds = %for.body
|
||||
ret void
|
||||
}
|
||||
|
||||
!131 = distinct !{!131, !132, !133}
|
||||
!132 = !{!"llvm.loop.vectorize.width", i32 4}
|
||||
!133 = !{!"llvm.loop.vectorize.enable", i1 true}
|
||||
|
||||
attributes #0 = { nounwind readnone }
|
||||
|
||||
declare double @sin(double) #0
|
||||
declare float @sinf(float) #0
|
||||
declare double @llvm.sin.f64(double) #0
|
||||
declare float @llvm.sin.f32(float) #0
|
||||
declare double @cos(double) #0
|
||||
declare float @cosf(float) #0
|
||||
declare double @llvm.cos.f64(double) #0
|
||||
declare float @llvm.cos.f32(float) #0
|
||||
declare float @expf(float) #0
|
||||
declare float @powf(float, float) #0
|
||||
declare float @llvm.exp.f32(float) #0
|
||||
declare float @logf(float) #0
|
||||
declare float @llvm.pow.f32(float, float) #0
|
||||
@ -3,6 +3,8 @@
|
||||
; RUN: opt -vector-library=MASSV -inject-tli-mappings -S < %s | FileCheck %s --check-prefixes=COMMON,MASSV
|
||||
; RUN: opt -vector-library=MASSV -passes=inject-tli-mappings -S < %s | FileCheck %s --check-prefixes=COMMON,MASSV
|
||||
; RUN: opt -vector-library=Accelerate -inject-tli-mappings -S < %s | FileCheck %s --check-prefixes=COMMON,ACCELERATE
|
||||
; RUN: opt -vector-library=LIBMVEC-X86 -inject-tli-mappings -S < %s | FileCheck %s --check-prefixes=COMMON,LIBMVEC-X86
|
||||
; RUN: opt -vector-library=LIBMVEC-X86 -passes=inject-tli-mappings -S < %s | FileCheck %s --check-prefixes=COMMON,LIBMVEC-X86
|
||||
; RUN: opt -vector-library=Accelerate -passes=inject-tli-mappings -S < %s | FileCheck %s --check-prefixes=COMMON,ACCELERATE
|
||||
|
||||
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
||||
@ -21,6 +23,9 @@ target triple = "x86_64-unknown-linux-gnu"
|
||||
; MASSV-SAME: i8* bitcast (<4 x float> (<4 x float>)* @__log10f4_massv to i8*)
|
||||
; ACCELERATE-SAME: [1 x i8*] [
|
||||
; ACCELERATE-SAME: i8* bitcast (<4 x float> (<4 x float>)* @vlog10f to i8*)
|
||||
; LIBMVEC-X86-SAME: [2 x i8*] [
|
||||
; LIBMVEC-X86-SAME: i8* bitcast (<2 x double> (<2 x double>)* @_ZGVbN2v_sin to i8*),
|
||||
; LIBMVEC-X86-SAME: i8* bitcast (<4 x double> (<4 x double>)* @_ZGVdN4v_sin to i8*)
|
||||
; COMMON-SAME: ], section "llvm.metadata"
|
||||
|
||||
define double @sin_f64(double %in) {
|
||||
@ -28,6 +33,7 @@ define double @sin_f64(double %in) {
|
||||
; SVML: call double @sin(double %{{.*}}) #[[SIN:[0-9]+]]
|
||||
; MASSV: call double @sin(double %{{.*}}) #[[SIN:[0-9]+]]
|
||||
; ACCELERATE: call double @sin(double %{{.*}})
|
||||
; LIBMVEC-X86: call double @sin(double %{{.*}}) #[[SIN:[0-9]+]]
|
||||
; No mapping of "sin" to a vector function for Accelerate.
|
||||
; ACCELERATE-NOT: _ZGV_LLVM_{{.*}}_sin({{.*}})
|
||||
%call = tail call double @sin(double %in)
|
||||
@ -39,10 +45,12 @@ declare double @sin(double) #0
|
||||
define float @call_llvm.log10.f32(float %in) {
|
||||
; COMMON-LABEL: @call_llvm.log10.f32(
|
||||
; SVML: call float @llvm.log10.f32(float %{{.*}})
|
||||
; LIBMVEC-X86: call float @llvm.log10.f32(float %{{.*}})
|
||||
; MASSV: call float @llvm.log10.f32(float %{{.*}}) #[[LOG10:[0-9]+]]
|
||||
; ACCELERATE: call float @llvm.log10.f32(float %{{.*}}) #[[LOG10:[0-9]+]]
|
||||
; No mapping of "llvm.log10.f32" to a vector function for SVML.
|
||||
; SVML-NOT: _ZGV_LLVM_{{.*}}_llvm.log10.f32({{.*}})
|
||||
; LIBMVEC-X86-NOT: _ZGV_LLVM_{{.*}}_llvm.log10.f32({{.*}})
|
||||
%call = tail call float @llvm.log10.f32(float %in)
|
||||
ret float %call
|
||||
}
|
||||
@ -62,3 +70,7 @@ attributes #0 = { nounwind readnone }
|
||||
|
||||
; ACCELERATE: attributes #[[LOG10]] = { "vector-function-abi-variant"=
|
||||
; ACCELERATE-SAME: "_ZGV_LLVM_N4v_llvm.log10.f32(vlog10f)" }
|
||||
|
||||
; LIBMVEC-X86: attributes #[[SIN]] = { "vector-function-abi-variant"=
|
||||
; LIBMVEC-X86-SAME: "_ZGV_LLVM_N2v_sin(_ZGVbN2v_sin),
|
||||
; LIBMVEC-X86-SAME: _ZGV_LLVM_N4v_sin(_ZGVdN4v_sin)" }
|
||||
|
||||
Loading…
Reference in New Issue
Block a user